r10                60 arch/alpha/include/uapi/asm/ptrace.h 	unsigned long r10;
r10               260 arch/alpha/kernel/process.c 		childstack->r10 = kthread_arg;
r10               304 arch/alpha/kernel/process.c 	dest[10] = sw->r10;
r10                86 arch/alpha/kernel/ptrace.c 	PT_REG(	   r8), SW_REG(	   r9), SW_REG(	  r10), SW_REG(	 r11),
r10               169 arch/alpha/kernel/signal.c 	err |= __get_user(sw->r10, sc->sc_regs+10);
r10               292 arch/alpha/kernel/signal.c 	err |= __put_user(sw->r10  , sc->sc_regs+10);
r10                84 arch/arc/include/asm/entry-arcv2.h 	; _HARD saves r10 clobbered by _SOFT as scratch hence comes first
r10                91 arch/arc/include/asm/entry-arcv2.h 	lr	r10, [eret]
r10                93 arch/arc/include/asm/entry-arcv2.h 	ST2	r10, r11, PT_ret
r10                95 arch/arc/include/asm/entry-arcv2.h 	lr	r10, [ecr]
r10                97 arch/arc/include/asm/entry-arcv2.h 	ST2	r10, r11, PT_event
r10                99 arch/arc/include/asm/entry-arcv2.h 	; OUTPUT: r10 has ECR expected by EV_Trap
r10               115 arch/arc/include/asm/entry-arcv2.h 	ST2	r10, r11, PT_r10
r10               119 arch/arc/include/asm/entry-arcv2.h 	lr	r10, [lp_end]
r10               121 arch/arc/include/asm/entry-arcv2.h 	ST2	r10, r11, PT_lpe
r10               151 arch/arc/include/asm/entry-arcv2.h 	lr	r10, [AUX_USER_SP]	; U mode SP
r10               154 arch/arc/include/asm/entry-arcv2.h 	mov.nz	r10, sp
r10               155 arch/arc/include/asm/entry-arcv2.h 	add.nz	r10, r10, SZ_PT_REGS	; K mode SP
r10               157 arch/arc/include/asm/entry-arcv2.h 	st	r10, [sp, PT_sp]	; SP (pt_regs->sp)
r10               184 arch/arc/include/asm/entry-arcv2.h 	ld	r10, [sp, PT_sp]	; SP (pt_regs->sp)
r10               185 arch/arc/include/asm/entry-arcv2.h 	sr	r10, [AUX_USER_SP]
r10               202 arch/arc/include/asm/entry-arcv2.h 	LD2	r10, r11, PT_lpe
r10               203 arch/arc/include/asm/entry-arcv2.h 	sr	r10, [lp_end]
r10               206 arch/arc/include/asm/entry-arcv2.h 	ld	r10, [sp, PT_lpc]	; lp_count can't be target of LD
r10               207 arch/arc/include/asm/entry-arcv2.h 	mov	lp_count, r10
r10               214 arch/arc/include/asm/entry-arcv2.h 	LD2	r10, r11, PT_r10
r10               224 arch/arc/include/asm/entry-arcv2.h 	; _SOFT clobbers r10 restored by _HARD hence the order
r10               244 arch/arc/include/asm/entry-arcv2.h 	ld	r10, [sp, PT_event + 4]
r10               245 arch/arc/include/asm/entry-arcv2.h 	sr	r10, [erbta]
r10               247 arch/arc/include/asm/entry-arcv2.h 	LD2	r10, r11, PT_ret
r10               248 arch/arc/include/asm/entry-arcv2.h 	sr	r10, [eret]
r10               198 arch/arc/include/asm/entry-compact.h 	lr	r10, [ecr]
r10               199 arch/arc/include/asm/entry-compact.h 	st      r10, [sp, PT_event]    /* EV_Trap expects r10 to have ECR */
r10                66 arch/arc/include/asm/entry.h 	PUSH	r10
r10                74 arch/arc/include/asm/entry.h 	POP	r10
r10                35 arch/arc/include/asm/ptrace.h 	unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
r10                96 arch/arc/include/asm/ptrace.h 	unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;
r10                24 arch/arc/include/asm/unwind.h 	unsigned long r10;
r10                83 arch/arc/include/asm/unwind.h 	PTREGS_INFO(r10), \
r10                40 arch/arc/include/uapi/asm/ptrace.h 		unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
r10                59 arch/arc/kernel/asm-offsets.c 	DEFINE(PT_r10, offsetof(struct pt_regs, r10));
r10                59 arch/arc/kernel/ptrace.c 	REG_O_ONE(scratch.r10, &ptregs->r10);
r10               149 arch/arc/kernel/ptrace.c 	REG_IN_ONE(scratch.r10, &ptregs->r10);
r10                82 arch/arc/kernel/signal.c 	uregs.scratch.r10	= regs->r10;
r10               127 arch/arc/kernel/signal.c 	regs->r10	= uregs.scratch.r10;
r10                80 arch/arm/kernel/ptrace.c 	REG_OFFSET_NAME(r10),
r10                72 arch/csky/abiv1/inc/abi/entry.h 	stw	r10, (sp, 16)
r10               105 arch/csky/abiv1/inc/abi/entry.h 	ldw	r10, (sp, 16)
r10                10 arch/csky/abiv1/inc/abi/switch_context.h 	unsigned long r10;
r10                20 arch/csky/abiv2/inc/abi/switch_context.h 	unsigned long r10;
r10                59 arch/csky/kernel/process.c 		childstack->r10 = kthread_arg;
r10               112 arch/hexagon/include/asm/elf.h 	DEST.r10 = REGS->r10;		\
r10               114 arch/hexagon/include/uapi/asm/registers.h 			unsigned long r10;
r10                24 arch/hexagon/include/uapi/asm/user.h 	unsigned long r10;
r10                30 arch/hexagon/kernel/kgdb.c 	{ "r10", GDB_SIZEOF_REG, offsetof(struct pt_regs, r10)},
r10                47 arch/hexagon/kernel/vm_events.c 		regs->r10,
r10                63 arch/ia64/include/asm/ptrace.h 	return regs->r10 != -1;
r10               842 arch/ia64/include/asm/sal.h 	long r8; long r9; long r10; long r11;
r10                35 arch/ia64/include/asm/syscall.h 	return regs->r10 == -1 ? regs->r8:0;
r10                51 arch/ia64/include/asm/syscall.h 		regs->r10 = -1;
r10                54 arch/ia64/include/asm/syscall.h 		regs->r10 = 0;
r10                86 arch/ia64/include/uapi/asm/ptrace.h 	unsigned long r10;		/* scratch (return value register 2) */
r10                80 arch/ia64/kernel/asm-offsets.c 	DEFINE(IA64_PT_REGS_R10_OFFSET, offsetof (struct pt_regs, r10));
r10               923 arch/ia64/kernel/mca.c 	copy_reg(&ms->pmsa_gr[10-1], ms->pmsa_nat_bits, &regs->r10, nat);
r10               103 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r16]=r10,24;							\
r10               111 arch/ia64/kernel/minstate.h 	mov r10=ar.ssd;										\
r10               212 arch/ia64/kernel/minstate.h 	st8 [r25]=r10;      	/* ar.ssd */	\
r10               130 arch/ia64/kernel/process.c 	printk("r8  : %016lx r9  : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
r10               352 arch/ia64/kernel/signal.c 		if ((long) scr->pt.r10 != -1)
r10               219 arch/ia64/kernel/unaligned.c 	RPT(r8), RPT(r9), RPT(r10), RPT(r11),
r10               205 arch/ia64/kernel/unwind.c 		offsetof(struct pt_regs, r10),
r10                49 arch/microblaze/include/asm/syscall.h 	case 5: return regs->r10;
r10                67 arch/microblaze/include/asm/syscall.h 		regs->r10 = val;
r10               111 arch/microblaze/include/uapi/asm/elf.h 	_r->r8 =  _r->r9 =  _r->r10 = _r->r11 =		\
r10                28 arch/microblaze/include/uapi/asm/ptrace.h 	microblaze_reg_t r10;
r10                40 arch/microblaze/kernel/asm-offsets.c 	DEFINE(PT_R10, offsetof(struct pt_regs, r10));
r10                35 arch/microblaze/kernel/process.c 				regs->r9, regs->r10, regs->r11, regs->r12);
r10               117 arch/microblaze/kernel/process.c 		childregs->r21 = childregs->r10;
r10                69 arch/microblaze/kernel/signal.c 	COPY(r10);	COPY(r11);	COPY(r12);	COPY(r13);
r10               130 arch/microblaze/kernel/signal.c 	COPY(r10);	COPY(r11);	COPY(r12);	COPY(r13);
r10               956 arch/mips/kernel/ptrace.c 	REG_OFFSET_NAME(r10, regs[10]),
r10                22 arch/nds32/include/asm/processor.h 	unsigned long r10;
r10                40 arch/nios2/include/asm/elf.h 	pr_reg[2]  = regs->r10;						\
r10                47 arch/nios2/include/asm/entry.h 	stw	r10, PT_R10(sp)
r10                74 arch/nios2/include/asm/entry.h 	ldw	r10, PT_R10(sp)
r10                25 arch/nios2/include/asm/ptrace.h 	unsigned long  r10;
r10                38 arch/nios2/kernel/asm-offsets.c 	OFFSET(PT_R10, pt_regs, r10);
r10                30 arch/nios2/kernel/kgdb.c 	{ "r10", GDB_SIZEOF_REG, offsetof(struct pt_regs, r10) },
r10                87 arch/nios2/kernel/process.c 		regs->r9,  regs->r10, regs->r11, regs->r12);
r10               183 arch/nios2/kernel/process.c 		fp->r8, fp->r9, fp->r10, fp->r11);
r10                61 arch/nios2/kernel/signal.c 	err |= __get_user(regs->r10, &gregs[9]);
r10               143 arch/nios2/kernel/signal.c 	err |= __put_user(regs->r10, &gregs[9]);
r10                43 arch/parisc/include/asm/asmregs.h r10:	.reg	%r10
r10               172 arch/parisc/include/asm/assembly.h 	STREG %r10, PT_GR10(\regs)
r10               206 arch/parisc/include/asm/assembly.h 	LDREG PT_GR10(\regs), %r10
r10               336 arch/parisc/include/asm/assembly.h 	std	 %r10,	 -88(%r30)
r10               358 arch/parisc/include/asm/assembly.h 	ldd	 -88(%r30),   %r10
r10               380 arch/parisc/include/asm/assembly.h 	stw	 %r10,	-100(%r30)
r10               402 arch/parisc/include/asm/assembly.h 	ldw	-100(%r30),   %r10
r10                17 arch/powerpc/crypto/aes-spe-regs.h #define rT1 r10
r10               477 arch/powerpc/include/asm/epapr_hcalls.h 	register unsigned long r10 asm("r10") = in[7];
r10               483 arch/powerpc/include/asm/epapr_hcalls.h 		       "=r"(r7), "=r"(r8), "=r"(r9), "=r"(r10), "=r"(r11),
r10               486 arch/powerpc/include/asm/epapr_hcalls.h 		       "r"(r9), "r"(r10), "r"(r11)
r10               495 arch/powerpc/include/asm/epapr_hcalls.h 	out[6] = r10;
r10                97 arch/powerpc/include/asm/exception-64e.h 	std	r10,EX_TLB_R10(r12);					    \
r10                98 arch/powerpc/include/asm/exception-64e.h 	mfcr	r10;							    \
r10               109 arch/powerpc/include/asm/exception-64e.h 	std	r10,EX_TLB_CR(r12);					    \
r10               135 arch/powerpc/include/asm/exception-64e.h 	ld	r10,EX_TLB_R10(r12);					    \
r10               163 arch/powerpc/include/asm/exception-64e.h 	mflr	r10;							    \
r10               166 arch/powerpc/include/asm/exception-64e.h 	std	r10,EX_TLB_LR(r12);
r10               135 arch/powerpc/include/asm/fsl_hcalls.h 	register uintptr_t r10 __asm__("r10");
r10               152 arch/powerpc/include/asm/fsl_hcalls.h 	r10 = *propvalue_len;
r10               157 arch/powerpc/include/asm/fsl_hcalls.h 		  "+r" (r8), "+r" (r9), "+r" (r10)
r10               189 arch/powerpc/include/asm/fsl_hcalls.h 	register uintptr_t r10 __asm__("r10");
r10               206 arch/powerpc/include/asm/fsl_hcalls.h 	r10 = propvalue_len;
r10               211 arch/powerpc/include/asm/fsl_hcalls.h 		  "+r" (r8), "+r" (r9), "+r" (r10)
r10                29 arch/powerpc/include/asm/ftrace.h 	stw	r10,40(r1);			\
r10                47 arch/powerpc/include/asm/ftrace.h 	lwz	r10,40(r1);			\
r10                53 arch/powerpc/include/asm/ppc_asm.h 	ld	r10,PACALPPACAPTR(r13);	/* get ptr to VPA */		\
r10                55 arch/powerpc/include/asm/ppc_asm.h 	addi	r10,r10,LPPACA_DTLIDX;					\
r10                56 arch/powerpc/include/asm/ppc_asm.h 	LDX_BE	r10,0,r10;		/* get log write index */	\
r10                57 arch/powerpc/include/asm/ppc_asm.h 	cmpd	cr1,r11,r10;						\
r10                61 arch/powerpc/include/asm/ppc_asm.h 	andi.	r10,r12,MSR_PR;		/* Restore cr0 (coming from user) */ \
r10               556 arch/powerpc/include/asm/ppc_asm.h #define	r10	%r10
r10                15 arch/powerpc/kernel/head_32.h 	mtspr	SPRN_SPRG_SCRATCH0,r10
r10                17 arch/powerpc/kernel/head_32.h 	mfcr	r10
r10                35 arch/powerpc/kernel/head_32.h 	stw	r10,_CCR(r11)		/* save registers */
r10                38 arch/powerpc/kernel/head_32.h 	mfspr	r10,SPRN_SPRG_SCRATCH0
r10                39 arch/powerpc/kernel/head_32.h 	stw	r10,GPR10(r11)
r10                42 arch/powerpc/kernel/head_32.h 	mflr	r10
r10                43 arch/powerpc/kernel/head_32.h 	stw	r10,_LINK(r11)
r10                52 arch/powerpc/kernel/head_32.h 	li	r10,MSR_KERNEL & ~(MSR_IR|MSR_DR) /* can take exceptions */
r10                53 arch/powerpc/kernel/head_32.h 	MTMSRD(r10)			/* (except for mach check in rtas) */
r10                56 arch/powerpc/kernel/head_32.h 	lis	r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
r10                57 arch/powerpc/kernel/head_32.h 	addi	r10,r10,STACK_FRAME_REGS_MARKER@l
r10                58 arch/powerpc/kernel/head_32.h 	stw	r10,8(r11)
r10                65 arch/powerpc/kernel/head_32.h 	mfcr	r10
r10                69 arch/powerpc/kernel/head_32.h 	rlwinm	r10,r10,0,4,2	/* Clear SO bit in CR */
r10                71 arch/powerpc/kernel/head_32.h 	stw	r10,_CCR(r11)		/* save registers */
r10                72 arch/powerpc/kernel/head_32.h 	mfspr	r10,SPRN_SRR0
r10                78 arch/powerpc/kernel/head_32.h 	stw	r10,_NIP(r11)
r10                82 arch/powerpc/kernel/head_32.h 	LOAD_REG_IMMEDIATE(r10, MSR_KERNEL & ~(MSR_IR|MSR_DR)) /* can take exceptions */
r10                83 arch/powerpc/kernel/head_32.h 	MTMSRD(r10)			/* (except for mach check in rtas) */
r10                85 arch/powerpc/kernel/head_32.h 	lis	r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
r10                87 arch/powerpc/kernel/head_32.h 	addi	r10,r10,STACK_FRAME_REGS_MARKER@l
r10                90 arch/powerpc/kernel/head_32.h 	stw	r10,8(r11)
r10               130 arch/powerpc/kernel/head_32.h 	LOAD_REG_IMMEDIATE(r10, MSR_KERNEL)
r10               131 arch/powerpc/kernel/head_32.h 	rlwimi	r10, r9, 0, MSR_EE
r10               133 arch/powerpc/kernel/head_32.h 	LOAD_REG_IMMEDIATE(r10, MSR_KERNEL | MSR_EE)
r10               138 arch/powerpc/kernel/head_32.h 	mtspr	SPRN_SRR1,r10
r10               175 arch/powerpc/kernel/head_32.h 	li	r10,trap;					\
r10               176 arch/powerpc/kernel/head_32.h 	stw	r10,_TRAP(r11);					\
r10               177 arch/powerpc/kernel/head_32.h 	LOAD_REG_IMMEDIATE(r10, msr);				\
r10                48 arch/powerpc/kernel/head_booke.h 	mtspr	SPRN_SPRG_WSCRATCH0, r10;	/* save one register */	     \
r10                49 arch/powerpc/kernel/head_booke.h 	mfspr	r10, SPRN_SPRG_THREAD;					     \
r10                50 arch/powerpc/kernel/head_booke.h 	stw	r11, THREAD_NORMSAVE(0)(r10);				     \
r10                51 arch/powerpc/kernel/head_booke.h 	stw	r13, THREAD_NORMSAVE(2)(r10);				     \
r10                60 arch/powerpc/kernel/head_booke.h 	lwz	r11, TASK_STACK - THREAD(r10);				     \
r10                68 arch/powerpc/kernel/head_booke.h 	lwz	r12, THREAD_NORMSAVE(0)(r10);				     \
r10                70 arch/powerpc/kernel/head_booke.h 	lwz	r13, THREAD_NORMSAVE(2)(r10); /* restore r13 */		     \
r10                71 arch/powerpc/kernel/head_booke.h 	mflr	r10;							     \
r10                72 arch/powerpc/kernel/head_booke.h 	stw	r10,_LINK(r11);						     \
r10                80 arch/powerpc/kernel/head_booke.h 	lis	r10, STACK_FRAME_REGS_MARKER@ha;/* exception frame marker */ \
r10                81 arch/powerpc/kernel/head_booke.h 	addi	r10, r10, STACK_FRAME_REGS_MARKER@l;			     \
r10                82 arch/powerpc/kernel/head_booke.h 	stw	r10, 8(r11);						     \
r10                87 arch/powerpc/kernel/head_booke.h 	mfspr	r10, SPRN_SPRG_THREAD
r10                90 arch/powerpc/kernel/head_booke.h 	mtspr	SPRN_SPRG_WSCRATCH0, r10
r10                91 arch/powerpc/kernel/head_booke.h 	stw	r11, THREAD_NORMSAVE(0)(r10)
r10                92 arch/powerpc/kernel/head_booke.h 	stw	r13, THREAD_NORMSAVE(2)(r10)
r10               100 arch/powerpc/kernel/head_booke.h 	lwz	r13, THREAD_NORMSAVE(2)(r10)
r10               108 arch/powerpc/kernel/head_booke.h 	lwz	r11, TASK_STACK - THREAD(r10)
r10               133 arch/powerpc/kernel/head_booke.h 	addi	r2,r10,-THREAD
r10               134 arch/powerpc/kernel/head_booke.h 	stw	r11,PT_REGS(r10)
r10               137 arch/powerpc/kernel/head_booke.h 	lwz	r12,THREAD_DBCR0(r10)
r10               148 arch/powerpc/kernel/head_booke.h 	lwz	r10, TASK_CPU(r2)
r10               149 arch/powerpc/kernel/head_booke.h 	slwi	r10, r10, 3
r10               150 arch/powerpc/kernel/head_booke.h 	add	r11, r11, r10
r10               168 arch/powerpc/kernel/head_booke.h 	lis	r10, MSR_KERNEL@h
r10               169 arch/powerpc/kernel/head_booke.h 	ori	r10, r10, MSR_KERNEL@l
r10               170 arch/powerpc/kernel/head_booke.h 	rlwimi	r10, r9, 0, MSR_EE
r10               172 arch/powerpc/kernel/head_booke.h 	lis	r10, (MSR_KERNEL | MSR_EE)@h
r10               173 arch/powerpc/kernel/head_booke.h 	ori	r10, r10, (MSR_KERNEL | MSR_EE)@l
r10               175 arch/powerpc/kernel/head_booke.h 	mtspr	SPRN_SRR1,r10
r10               234 arch/powerpc/kernel/head_booke.h 	stw	r10,GPR10(r8);						     \
r10               239 arch/powerpc/kernel/head_booke.h 	BOOKE_CLEAR_BTB(r10)						\
r10               247 arch/powerpc/kernel/head_booke.h 	lwz	r10,GPR10(r8);		/* copy regs from exception stack  */\
r10               249 arch/powerpc/kernel/head_booke.h 	stw	r10,GPR10(r11);						     \
r10               250 arch/powerpc/kernel/head_booke.h 	lwz	r10,GPR11(r8);						     \
r10               252 arch/powerpc/kernel/head_booke.h 	stw	r10,GPR11(r11);						     \
r10               258 arch/powerpc/kernel/head_booke.h 	mflr	r10;							     \
r10               259 arch/powerpc/kernel/head_booke.h 	stw	r10,_LINK(r11);						     \
r10               290 arch/powerpc/kernel/head_booke.h 	mtspr	SPRN_SPRG_WSCRATCH0, r10;	/* save one register */	     \
r10               291 arch/powerpc/kernel/head_booke.h 	mfspr	r10, SPRN_SPRG_THREAD;					     \
r10               292 arch/powerpc/kernel/head_booke.h 	stw	r11, THREAD_NORMSAVE(0)(r10);				     \
r10               294 arch/powerpc/kernel/head_booke.h 	stw	r13, THREAD_NORMSAVE(2)(r10);				     \
r10               329 arch/powerpc/kernel/head_booke.h 	li	r10,trap;					\
r10               330 arch/powerpc/kernel/head_booke.h 	stw	r10,_TRAP(r11);					\
r10               331 arch/powerpc/kernel/head_booke.h 	lis	r10,msr@h;					\
r10               332 arch/powerpc/kernel/head_booke.h 	ori	r10,r10,msr@l;					\
r10               370 arch/powerpc/kernel/head_booke.h 	mfspr	r10,SPRN_DBSR;		/* check single-step/branch taken */  \
r10               371 arch/powerpc/kernel/head_booke.h 	andis.	r10,r10,(DBSR_IC|DBSR_BT)@h;				      \
r10               374 arch/powerpc/kernel/head_booke.h 	lis	r10,interrupt_base@h;	/* check if exception in vectors */   \
r10               375 arch/powerpc/kernel/head_booke.h 	ori	r10,r10,interrupt_base@l;				      \
r10               376 arch/powerpc/kernel/head_booke.h 	cmplw	r12,r10;						      \
r10               379 arch/powerpc/kernel/head_booke.h 	lis	r10,interrupt_end@h;					      \
r10               380 arch/powerpc/kernel/head_booke.h 	ori	r10,r10,interrupt_end@l;				      \
r10               381 arch/powerpc/kernel/head_booke.h 	cmplw	r12,r10;						      \
r10               386 arch/powerpc/kernel/head_booke.h 	lis	r10,(DBSR_IC|DBSR_BT)@h;	/* clear the IC event */      \
r10               387 arch/powerpc/kernel/head_booke.h 	mtspr	SPRN_DBSR,r10;						      \
r10               389 arch/powerpc/kernel/head_booke.h 	lwz	r10,_CCR(r11);						      \
r10               392 arch/powerpc/kernel/head_booke.h 	mtcrf	0x80,r10;						      \
r10               399 arch/powerpc/kernel/head_booke.h 	lwz	r10,GPR10(r8);						      \
r10               423 arch/powerpc/kernel/head_booke.h 	mfspr	r10,SPRN_DBSR;		/* check single-step/branch taken */  \
r10               424 arch/powerpc/kernel/head_booke.h 	andis.	r10,r10,(DBSR_IC|DBSR_BT)@h;				      \
r10               427 arch/powerpc/kernel/head_booke.h 	lis	r10,interrupt_base@h;	/* check if exception in vectors */   \
r10               428 arch/powerpc/kernel/head_booke.h 	ori	r10,r10,interrupt_base@l;				      \
r10               429 arch/powerpc/kernel/head_booke.h 	cmplw	r12,r10;						      \
r10               432 arch/powerpc/kernel/head_booke.h 	lis	r10,interrupt_end@h;					      \
r10               433 arch/powerpc/kernel/head_booke.h 	ori	r10,r10,interrupt_end@l;				      \
r10               434 arch/powerpc/kernel/head_booke.h 	cmplw	r12,r10;						      \
r10               439 arch/powerpc/kernel/head_booke.h 	lis	r10,(DBSR_IC|DBSR_BT)@h;	/* clear the IC event */      \
r10               440 arch/powerpc/kernel/head_booke.h 	mtspr	SPRN_DBSR,r10;						      \
r10               442 arch/powerpc/kernel/head_booke.h 	lwz	r10,_CCR(r11);						      \
r10               445 arch/powerpc/kernel/head_booke.h 	mtcrf	0x80,r10;						      \
r10               452 arch/powerpc/kernel/head_booke.h 	lwz	r10,GPR10(r8);						      \
r10                57 arch/s390/include/asm/vx-insn.h 	.ifc \gr,%r10
r10                38 arch/unicore32/include/asm/thread_info.h 	__u32	r10;
r10               114 arch/x86/entry/calling.h 	pushq   %r10		/* pt_regs->r10 */
r10               161 arch/x86/entry/calling.h 	popq %r10
r10                56 arch/x86/entry/common.c 				    regs->si, regs->dx, regs->r10);
r10               103 arch/x86/entry/common.c 			sd.args[3] = regs->r10;
r10               207 arch/x86/events/intel/ds.c 	u64 r8,  r9,  r10, r11;
r10               215 arch/x86/events/intel/ds.c 	u64 r8,  r9,  r10, r11;
r10               227 arch/x86/events/intel/ds.c 	u64 r8,  r9,  r10, r11;
r10               256 arch/x86/events/intel/ds.c 	u64 r8,  r9,  r10, r11;
r10              1414 arch/x86/events/intel/ds.c 		regs->r10 = pebs->r10;
r10              1495 arch/x86/events/intel/ds.c 	regs->r10 = gprs->r10;
r10               145 arch/x86/ia32/ia32_aout.c 	regs->r8 = regs->r9 = regs->r10 = regs->r11 = regs->r12 =
r10               243 arch/x86/ia32/ia32_aout.c 	regs->r8 = regs->r9 = regs->r10 = regs->r11 =
r10               178 arch/x86/include/asm/elf.h 	regs->r8 = regs->r9 = regs->r10 = regs->r11 = 0;
r10               216 arch/x86/include/asm/elf.h 	(pr_reg)[7] = (regs)->r10;				\
r10               105 arch/x86/include/asm/inst.h 	.ifc \r64,%r10
r10               109 arch/x86/include/asm/kexec.h 		asm volatile("movq %%r10,%0" : "=m"(newregs->r10));
r10               188 arch/x86/include/asm/kexec.h 	uint64_t r10;
r10               826 arch/x86/include/asm/paravirt.h 	COND_PUSH(set, CLBR_R10, r10);		\
r10               830 arch/x86/include/asm/paravirt.h 	COND_POP(set, CLBR_R10, r10);		\
r10               207 arch/x86/include/asm/perf_event.h 	u64 r8, r9, r10, r11, r12, r13, r14, r15;
r10                69 arch/x86/include/asm/ptrace.h 	unsigned long r10;
r10               134 arch/x86/include/asm/syscall.h 		*args++ = regs->r10;
r10               158 arch/x86/include/asm/syscall.h 		regs->r10 = *args++;
r10                15 arch/x86/include/asm/syscall_wrapper.h 		,,regs->r10,,regs->r8,,regs->r9)			\
r10                61 arch/x86/include/asm/unwind_hints.h 	.elseif \base == %r10
r10                77 arch/x86/include/asm/user_64.h 	unsigned long	r10;
r10               107 arch/x86/include/asm/xen/interface_64.h     uint64_t r10;
r10               120 arch/x86/include/uapi/asm/kvm.h 	__u64 r8,  r9,  r10, r11;
r10                57 arch/x86/include/uapi/asm/ptrace.h 	unsigned long r10;
r10               241 arch/x86/include/uapi/asm/sigcontext.h 	__u64				r10;
r10               328 arch/x86/include/uapi/asm/sigcontext.h 	__u64				r10;
r10                65 arch/x86/kernel/asm-offsets_64.c 	ENTRY(r10);
r10                74 arch/x86/kernel/kgdb.c 	{ "r10", 8, offsetof(struct pt_regs, r10) },
r10                51 arch/x86/kernel/perf_regs.c 	PT_REGS_OFFSET(PERF_REG_X86_R10, r10),
r10               163 arch/x86/kernel/perf_regs.c 	regs_user_copy->r10 = user_regs->r10;
r10                88 arch/x86/kernel/process_64.c 	       regs->r10, regs->r11, regs->r12);
r10                73 arch/x86/kernel/ptrace.c 	REG_OFFSET_NAME(r10),
r10               124 arch/x86/kernel/signal.c 		COPY(r10);
r10               184 arch/x86/kernel/signal.c 		put_user_ex(regs->r10, &sc->r10);
r10               478 arch/x86/kernel/unwind_orc.c 		if (!get_reg(state, offsetof(struct pt_regs, r10), &sp)) {
r10               787 arch/x86/kernel/uprobes.c 			reg_offset = offsetof(struct pt_regs, r10);
r10                32 arch/x86/kvm/kvm_cache_regs.h BUILD_KVM_GPR_ACCESSORS(r10, R10)
r10              5778 arch/x86/kvm/svm.c 		  [r10]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R10])),
r10              8652 arch/x86/kvm/x86.c 	regs->r10 = kvm_r10_read(vcpu);
r10              8688 arch/x86/kvm/x86.c 	kvm_r10_write(vcpu, regs->r10);
r10               413 arch/x86/lib/insn-eval.c 		offsetof(struct pt_regs, r10),
r10               261 arch/x86/mm/pf_in.c 		rv = (unsigned char *)&regs->r10;
r10               369 arch/x86/mm/pf_in.c 		rv = &regs->r10;
r10               187 arch/x86/um/signal.c 	GETREG(R10, r10);
r10               264 arch/x86/um/signal.c 	PUTREG(R10, r10);
r10               418 drivers/crypto/chelsio/chtls/chtls_io.c 	req_wr->r10 = 0;
r10               246 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h 	__be64 r10;
r10              2152 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h 	__be64 r10;
r10              2805 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h 				__u8   r10[5];
r10              2811 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h 				__u8   r10[2];
r10              3453 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h 			__be64 r10;
r10              4019 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h 	u8   r10;
r10               258 drivers/net/wireless/broadcom/b43/radio_2055.c #define RADIOREGS(r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, \
r10               270 drivers/net/wireless/broadcom/b43/radio_2055.c 	.radio_lgen_tune1	= r10,	\
r10              3026 drivers/net/wireless/broadcom/b43/radio_2056.c 		   r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
r10              3039 drivers/net/wireless/broadcom/b43/radio_2056.c 	.radio_syn_reserved_addr27	= r10,	\
r10               117 drivers/net/wireless/broadcom/b43/radio_2057.c 		   r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
r10               129 drivers/net/wireless/broadcom/b43/radio_2057.c 	.radio_logen_mx2g_tune			= r10,	\
r10               149 drivers/net/wireless/broadcom/b43/radio_2057.c 		      r10, r11, r12, r13, r14, r15, r16, r17) \
r10               160 drivers/net/wireless/broadcom/b43/radio_2057.c 	.radio_logen_mx2g_tune			= r10,	\
r10                23 drivers/net/wireless/broadcom/b43/radio_2059.c 		  r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
r10                35 drivers/net/wireless/broadcom/b43/radio_2059.c 	.radio_syn41			= r10,	\
r10               351 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c 	__le32		r10;	/* sl/v7 */
r10               953 sound/soc/codecs/tscs42xx.c 		rc, r12, r1b_h, re, rf, r10, r11)	\
r10               968 sound/soc/codecs/tscs42xx.c 			{R_PLLCTL10, r10,   0xFF},	\
r10               120 tools/arch/x86/include/uapi/asm/kvm.h 	__u64 r8,  r9,  r10, r11;
r10                23 tools/perf/arch/powerpc/util/perf_regs.c 	SMPL_REG(r10, PERF_REG_POWERPC_R10),
r10                79 tools/perf/arch/x86/util/dwarf-regs.c 	REG_OFFSET_NAME_64("%r10",	r10),
r10                99 tools/perf/arch/x86/util/perf_regs.c 	SDT_NAME_REG(r10b, r10),
r10               100 tools/perf/arch/x86/util/perf_regs.c 	SDT_NAME_REG(r10w, r10),
r10               101 tools/perf/arch/x86/util/perf_regs.c 	SDT_NAME_REG(r10d, r10),
r10               170 tools/perf/util/intel-pt-decoder/intel-pt-decoder.h 				uint64_t r10;
r10               108 tools/testing/selftests/kvm/lib/x86_64/processor.c 		regs->r8, regs->r9, regs->r10, regs->r11);
r10                57 tools/testing/selftests/kvm/x86_64/sync_regs_test.c 	REG_COMPARE(r10);
r10                53 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h 	ld	r10,PACALPPACAPTR(r13);	/* get ptr to VPA */		\
r10                55 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h 	addi	r10,r10,LPPACA_DTLIDX;					\
r10                56 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h 	LDX_BE	r10,0,r10;		/* get log write index */	\
r10                57 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h 	cmpd	cr1,r11,r10;						\
r10                61 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h 	andi.	r10,r12,MSR_PR;		/* Restore cr0 (coming from user) */ \
r10               556 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h #define	r10	%r10
r10                12 tools/testing/selftests/x86/check_initial_reg_state.c unsigned long r8, r9, r10, r11, r12, r13, r14, r15;
r10                65 tools/testing/selftests/x86/check_initial_reg_state.c 	    || r8 || r9 || r10 || r11 || r12 || r13 || r14 || r15
r10                81 tools/testing/selftests/x86/check_initial_reg_state.c 		SHOW(r10);
r10                24 tools/testing/selftests/x86/ptrace_syscall.c # define user_arg3		r10
r10                61 tools/testing/selftests/x86/test_syscall_vdso.c 	uint64_t r8,  r9,  r10, r11;
r10               121 tools/testing/selftests/x86/test_syscall_vdso.c 	printf(" 8:%016llx  9:%016llx 10:%016llx 11:%016llx\n", regs64.r8 ,  regs64.r9 ,  regs64.r10,  regs64.r11);