qphy_setbits     1345 drivers/phy/qualcomm/phy-qcom-qmp.c 		qphy_setbits(dp_com, QPHY_V3_DP_COM_POWER_DOWN_CTRL,
qphy_setbits     1348 drivers/phy/qualcomm/phy-qcom-qmp.c 		qphy_setbits(dp_com, QPHY_V3_DP_COM_RESET_OVRD_CTRL,
qphy_setbits     1352 drivers/phy/qualcomm/phy-qcom-qmp.c 		qphy_setbits(dp_com, QPHY_V3_DP_COM_PHY_MODE_CTRL,
qphy_setbits     1362 drivers/phy/qualcomm/phy-qcom-qmp.c 		qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
qphy_setbits     1365 drivers/phy/qualcomm/phy-qcom-qmp.c 		qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);
qphy_setbits     1376 drivers/phy/qualcomm/phy-qcom-qmp.c 		qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL],
qphy_setbits     1422 drivers/phy/qualcomm/phy-qcom-qmp.c 		qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL],
qphy_setbits     1426 drivers/phy/qualcomm/phy-qcom-qmp.c 		qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
qphy_setbits     1525 drivers/phy/qualcomm/phy-qcom-qmp.c 		qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);
qphy_setbits     1538 drivers/phy/qualcomm/phy-qcom-qmp.c 	qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
qphy_setbits     1581 drivers/phy/qualcomm/phy-qcom-qmp.c 		qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
qphy_setbits     1625 drivers/phy/qualcomm/phy-qcom-qmp.c 	qphy_setbits(pcs, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR);
qphy_setbits     1633 drivers/phy/qualcomm/phy-qcom-qmp.c 	qphy_setbits(pcs, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], intr_mask);
qphy_setbits     1649 drivers/phy/qualcomm/phy-qcom-qmp.c 		qphy_setbits(pcs_misc, QPHY_V3_PCS_MISC_CLAMP_ENABLE, CLAMP_EN);
qphy_setbits     1654 drivers/phy/qualcomm/phy-qcom-qmp.c 	qphy_setbits(pcs, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR);