ql_write32        100 drivers/staging/qlge/qlge_dbg.c 	ql_write32(qdev, XG_SERDES_ADDR, reg | PROC_ADDR_R);
ql_write32        396 drivers/staging/qlge/qlge_dbg.c 		ql_write32(qdev, NIC_ETS, i << 29 | 0x08000000);
ql_write32        401 drivers/staging/qlge/qlge_dbg.c 		ql_write32(qdev, CNA_ETS, i << 29 | 0x08000000);
ql_write32        413 drivers/staging/qlge/qlge_dbg.c 		ql_write32(qdev, INTR_EN,
ql_write32        526 drivers/staging/qlge/qlge_dbg.c 			ql_write32(qdev, PRB_MX_ADDR, probe);
ql_write32        533 drivers/staging/qlge/qlge_dbg.c 			ql_write32(qdev, PRB_MX_ADDR, probe);
ql_write32        582 drivers/staging/qlge/qlge_dbg.c 			ql_write32(qdev, RT_IDX, val);
ql_write32        666 drivers/staging/qlge/qlge_dbg.c 				ql_write32(qdev, MAC_ADDR_IDX, val);
ql_write32       1360 drivers/staging/qlge/qlge_dbg.c 		ql_write32(qdev, INTR_EN, qdev->intr_context[i].intr_read_mask);
ql_write32        141 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, SEM, sem_bits | sem_mask);
ql_write32        158 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, SEM, sem_mask);
ql_write32        245 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, ICB_L, (u32) map);
ql_write32        246 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, ICB_H, (u32) (map >> 32));
ql_write32        250 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, CFG, (mask | value));
ql_write32        278 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
ql_write32        292 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
ql_write32        307 drivers/staging/qlge/qlge_main.c 				ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
ql_write32        351 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_IDX, (offset++) |
ql_write32        354 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_DATA, lower);
ql_write32        360 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_IDX, (offset++) |
ql_write32        364 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_DATA, upper);
ql_write32        384 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
ql_write32        387 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_DATA, lower);
ql_write32        393 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
ql_write32        396 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_DATA, upper);
ql_write32        402 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_IDX, (offset) |	/* offset */
ql_write32        416 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_DATA, cam_output);
ql_write32        432 drivers/staging/qlge/qlge_main.c 			ql_write32(qdev, MAC_ADDR_IDX, offset |	/* offset */
ql_write32        505 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, RT_IDX,
ql_write32        611 drivers/staging/qlge/qlge_main.c 		ql_write32(qdev, RT_IDX, value);
ql_write32        612 drivers/staging/qlge/qlge_main.c 		ql_write32(qdev, RT_DATA, enable ? mask : 0);
ql_write32        620 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, INTR_EN, (INTR_EN_EI << 16) | INTR_EN_EI);
ql_write32        625 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, INTR_EN, (INTR_EN_EI << 16));
ql_write32        644 drivers/staging/qlge/qlge_main.c 		ql_write32(qdev, INTR_EN,
ql_write32        652 drivers/staging/qlge/qlge_main.c 		ql_write32(qdev, INTR_EN,
ql_write32        674 drivers/staging/qlge/qlge_main.c 		ql_write32(qdev, INTR_EN,
ql_write32        730 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, FLASH_ADDR, FLASH_ADDR_R | offset);
ql_write32        873 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, XGMAC_DATA, data);
ql_write32        875 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, XGMAC_ADDR, reg);
ql_write32        892 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, XGMAC_ADDR, reg | XGMAC_ADDR_R);
ql_write32       1019 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, STS, ((qdev->port_init << 16) | qdev->port_init));
ql_write32       2345 drivers/staging/qlge/qlge_main.c 		ql_write32(qdev, NIC_RCV_CFG, NIC_RCV_CFG_VLAN_MASK |
ql_write32       2348 drivers/staging/qlge/qlge_main.c 		ql_write32(qdev, NIC_RCV_CFG, NIC_RCV_CFG_VLAN_MASK);
ql_write32       2538 drivers/staging/qlge/qlge_main.c 		ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
ql_write32       3762 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, SYS, mask | value);
ql_write32       3771 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, NIC_RCV_CFG, (mask | value));
ql_write32       3774 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
ql_write32       3784 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, FSC, mask | value);
ql_write32       3786 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, SPLT_HDR, SPLT_LEN);
ql_write32       3793 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, RST_FO, RST_FO_RR_MASK | RST_FO_RR_RCV_FUNC_CQ);
ql_write32       3803 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, MGMT_RCV_CFG, mask);
ql_write32       3804 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, MGMT_RCV_CFG, mask | value);
ql_write32       3888 drivers/staging/qlge/qlge_main.c 	ql_write32(qdev, RST_FO, (RST_FO_FR << 16) | RST_FO_FR);
ql_write32         13 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, CSR, CSR_CMD_CLR_PAUSE);
ql_write32         23 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, CSR, CSR_CMD_SET_PAUSE);
ql_write32         40 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, CSR, CSR_CMD_SET_RST);
ql_write32         44 drivers/staging/qlge/qlge_mpi.c 			ql_write32(qdev, CSR, CSR_CMD_CLR_RST);
ql_write32         61 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, PROC_ADDR, reg | PROC_ADDR_R);
ql_write32         80 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, PROC_DATA, data);
ql_write32         82 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, PROC_ADDR, reg);
ql_write32        194 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, CSR, CSR_CMD_SET_H2R_INT);
ql_write32        227 drivers/staging/qlge/qlge_mpi.c 		ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
ql_write32        294 drivers/staging/qlge/qlge_mpi.c 		ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
ql_write32        516 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
ql_write32        540 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
ql_write32        596 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
ql_write32        606 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
ql_write32       1244 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
ql_write32       1258 drivers/staging/qlge/qlge_mpi.c 	ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);