qce_write          36 drivers/crypto/qce/common.c 		qce_write(qce, offset + i * sizeof(u32), val[i]);
qce_write          45 drivers/crypto/qce/common.c 		qce_write(qce, offset + i * sizeof(u32), 0);
qce_write         202 drivers/crypto/qce/common.c 	qce_write(qce, REG_ENCR_XTS_DU_SIZE, xtsdusize);
qce_write         213 drivers/crypto/qce/common.c 	qce_write(qce, REG_STATUS, 0);
qce_write         214 drivers/crypto/qce/common.c 	qce_write(qce, REG_CONFIG, config);
qce_write         219 drivers/crypto/qce/common.c 	qce_write(qce, REG_GOPROC, BIT(GO_SHIFT) | BIT(RESULTS_DUMP_SHIFT));
qce_write         244 drivers/crypto/qce/common.c 		qce_write(qce, REG_AUTH_SEG_CFG, 0);
qce_write         245 drivers/crypto/qce/common.c 		qce_write(qce, REG_ENCR_SEG_CFG, 0);
qce_write         246 drivers/crypto/qce/common.c 		qce_write(qce, REG_ENCR_SEG_SIZE, 0);
qce_write         292 drivers/crypto/qce/common.c 	qce_write(qce, REG_AUTH_SEG_CFG, auth_cfg);
qce_write         293 drivers/crypto/qce/common.c 	qce_write(qce, REG_AUTH_SEG_SIZE, req->nbytes);
qce_write         294 drivers/crypto/qce/common.c 	qce_write(qce, REG_AUTH_SEG_START, 0);
qce_write         295 drivers/crypto/qce/common.c 	qce_write(qce, REG_ENCR_SEG_CFG, 0);
qce_write         296 drivers/crypto/qce/common.c 	qce_write(qce, REG_SEG_SIZE, req->nbytes);
qce_write         300 drivers/crypto/qce/common.c 	qce_write(qce, REG_CONFIG, config);
qce_write         333 drivers/crypto/qce/common.c 	qce_write(qce, REG_AUTH_SEG_CFG, auth_cfg);
qce_write         366 drivers/crypto/qce/common.c 	qce_write(qce, REG_ENCR_SEG_CFG, encr_cfg);
qce_write         367 drivers/crypto/qce/common.c 	qce_write(qce, REG_ENCR_SEG_SIZE, rctx->cryptlen);
qce_write         368 drivers/crypto/qce/common.c 	qce_write(qce, REG_ENCR_SEG_START, offset & 0xffff);
qce_write         371 drivers/crypto/qce/common.c 		qce_write(qce, REG_CNTR_MASK, ~0);
qce_write         372 drivers/crypto/qce/common.c 		qce_write(qce, REG_CNTR_MASK0, ~0);
qce_write         373 drivers/crypto/qce/common.c 		qce_write(qce, REG_CNTR_MASK1, ~0);
qce_write         374 drivers/crypto/qce/common.c 		qce_write(qce, REG_CNTR_MASK2, ~0);
qce_write         377 drivers/crypto/qce/common.c 	qce_write(qce, REG_SEG_SIZE, totallen);
qce_write         381 drivers/crypto/qce/common.c 	qce_write(qce, REG_CONFIG, config);