CRn 53 arch/arm/include/asm/cp15.h #define __ACCESS_CP15(CRn, Op1, CRm, Op2) \ CRn 54 arch/arm/include/asm/cp15.h "mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32 CRn 17 arch/arm/include/asm/kvm_hyp.h #define __ACCESS_VFP(CRn) \ CRn 18 arch/arm/include/asm/kvm_hyp.h "mrc", "mcr", __stringify(p10, 7, %0, CRn, cr0, 0), u32 CRn 381 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 5), is32, CRn 385 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 2), Op2( 0), is32, CRn 389 arch/arm/kvm/coproc.c { CRn( 1), CRm( 0), Op1( 0), Op2( 1), is32, CRn 393 arch/arm/kvm/coproc.c { CRn( 1), CRm( 0), Op1( 0), Op2( 2), is32, CRn 398 arch/arm/kvm/coproc.c { CRn(2), CRm( 0), Op1( 0), Op2( 0), is32, CRn 400 arch/arm/kvm/coproc.c { CRn(2), CRm( 0), Op1( 0), Op2( 1), is32, CRn 402 arch/arm/kvm/coproc.c { CRn( 2), CRm( 0), Op1( 0), Op2( 2), is32, CRn 408 arch/arm/kvm/coproc.c { CRn( 3), CRm( 0), Op1( 0), Op2( 0), is32, CRn 412 arch/arm/kvm/coproc.c { CRn( 5), CRm( 0), Op1( 0), Op2( 0), is32, CRn 414 arch/arm/kvm/coproc.c { CRn( 5), CRm( 0), Op1( 0), Op2( 1), is32, CRn 416 arch/arm/kvm/coproc.c { CRn( 5), CRm( 1), Op1( 0), Op2( 0), is32, CRn 418 arch/arm/kvm/coproc.c { CRn( 5), CRm( 1), Op1( 0), Op2( 1), is32, CRn 422 arch/arm/kvm/coproc.c { CRn( 6), CRm( 0), Op1( 0), Op2( 0), is32, CRn 424 arch/arm/kvm/coproc.c { CRn( 6), CRm( 0), Op1( 0), Op2( 2), is32, CRn 433 arch/arm/kvm/coproc.c { CRn( 7), CRm( 6), Op1( 0), Op2( 2), is32, access_dcsw}, CRn 434 arch/arm/kvm/coproc.c { CRn( 7), CRm(10), Op1( 0), Op2( 2), is32, access_dcsw}, CRn 435 arch/arm/kvm/coproc.c { CRn( 7), CRm(14), Op1( 0), Op2( 2), is32, access_dcsw}, CRn 439 arch/arm/kvm/coproc.c { CRn( 9), CRm( 0), Op1( 1), Op2( 2), is32, CRn 441 arch/arm/kvm/coproc.c { CRn( 9), CRm( 0), Op1( 1), Op2( 3), is32, access_l2ectlr}, CRn 446 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 0), is32, access_pmcr}, CRn 447 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 1), is32, access_pmcntenset}, CRn 448 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 2), is32, access_pmcntenclr}, CRn 449 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 3), is32, access_pmovsr}, CRn 450 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 5), is32, access_pmselr}, CRn 451 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 6), is32, access_pmceid0}, CRn 452 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 7), is32, access_pmceid1}, CRn 453 arch/arm/kvm/coproc.c { CRn( 9), CRm(13), Op1( 0), Op2( 0), is32, access_pmccntr}, CRn 454 arch/arm/kvm/coproc.c { CRn( 9), CRm(13), Op1( 0), Op2( 1), is32, access_pmxevtyper}, CRn 455 arch/arm/kvm/coproc.c { CRn( 9), CRm(13), Op1( 0), Op2( 2), is32, access_pmxevcntr}, CRn 456 arch/arm/kvm/coproc.c { CRn( 9), CRm(14), Op1( 0), Op2( 0), is32, access_pmuserenr}, CRn 457 arch/arm/kvm/coproc.c { CRn( 9), CRm(14), Op1( 0), Op2( 1), is32, access_pmintenset}, CRn 458 arch/arm/kvm/coproc.c { CRn( 9), CRm(14), Op1( 0), Op2( 2), is32, access_pmintenclr}, CRn 461 arch/arm/kvm/coproc.c { CRn(10), CRm( 2), Op1( 0), Op2( 0), is32, CRn 463 arch/arm/kvm/coproc.c { CRn(10), CRm( 2), Op1( 0), Op2( 1), is32, CRn 467 arch/arm/kvm/coproc.c { CRn(10), CRm( 3), Op1( 0), Op2( 0), is32, CRn 469 arch/arm/kvm/coproc.c { CRn(10), CRm( 3), Op1( 0), Op2( 1), is32, CRn 476 arch/arm/kvm/coproc.c { CRn(12), CRm( 0), Op1( 0), Op2( 0), is32, CRn 484 arch/arm/kvm/coproc.c { CRn(12), CRm(12), Op1( 0), Op2(5), is32, access_gic_sre }, CRn 487 arch/arm/kvm/coproc.c { CRn(13), CRm( 0), Op1( 0), Op2( 1), is32, CRn 489 arch/arm/kvm/coproc.c { CRn(13), CRm( 0), Op1( 0), Op2( 2), is32, CRn 491 arch/arm/kvm/coproc.c { CRn(13), CRm( 0), Op1( 0), Op2( 3), is32, CRn 493 arch/arm/kvm/coproc.c { CRn(13), CRm( 0), Op1( 0), Op2( 4), is32, CRn 500 arch/arm/kvm/coproc.c { CRn(14), CRm( 1), Op1( 0), Op2( 0), is32, CRn 504 arch/arm/kvm/coproc.c { CRn(14), CRm( 2), Op1( 0), Op2( 0), is32, access_cntp_tval }, CRn 505 arch/arm/kvm/coproc.c { CRn(14), CRm( 2), Op1( 0), Op2( 1), is32, access_cntp_ctl }, CRn 508 arch/arm/kvm/coproc.c { CRn(15), CRm( 0), Op1( 4), Op2( 0), is32, access_cbar}, CRn 547 arch/arm/kvm/coproc.c val = (x)->CRn << 11; \ CRn 578 arch/arm/kvm/coproc.c trace_kvm_emulate_cp15_imp(params->Op1, params->Rt1, params->CRn, CRn 611 arch/arm/kvm/coproc.c params.CRn = (kvm_vcpu_get_hsr(vcpu) >> 1) & 0xf; CRn 681 arch/arm/kvm/coproc.c params.CRn = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf; CRn 735 arch/arm/kvm/coproc.c params->CRn = ((id & KVM_REG_ARM_32_CRN_MASK) CRn 753 arch/arm/kvm/coproc.c params->CRn = ((id & KVM_REG_ARM_CRM_MASK) CRn 837 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 0), is32, NULL, get_MIDR }, CRn 838 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 1), is32, NULL, get_CTR }, CRn 839 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 2), is32, NULL, get_TCMTR }, CRn 840 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 3), is32, NULL, get_TLBTR }, CRn 841 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 6), is32, NULL, get_REVIDR }, CRn 843 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 1), Op2( 1), is32, NULL, get_CLIDR }, CRn 844 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 1), Op2( 7), is32, NULL, get_AIDR }, CRn 846 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 0), is32, NULL, get_ID_PFR0 }, CRn 847 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 1), is32, NULL, get_ID_PFR1 }, CRn 848 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 2), is32, NULL, get_ID_DFR0 }, CRn 849 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 3), is32, NULL, get_ID_AFR0 }, CRn 850 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 4), is32, NULL, get_ID_MMFR0 }, CRn 851 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 5), is32, NULL, get_ID_MMFR1 }, CRn 852 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 6), is32, NULL, get_ID_MMFR2 }, CRn 853 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 7), is32, NULL, get_ID_MMFR3 }, CRn 855 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 0), is32, NULL, get_ID_ISAR0 }, CRn 856 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 1), is32, NULL, get_ID_ISAR1 }, CRn 857 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 2), is32, NULL, get_ID_ISAR2 }, CRn 858 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 3), is32, NULL, get_ID_ISAR3 }, CRn 859 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 4), is32, NULL, get_ID_ISAR4 }, CRn 860 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 5), is32, NULL, get_ID_ISAR5 }, CRn 1304 arch/arm/kvm/coproc.c val |= (reg->CRn << KVM_REG_ARM_CRM_SHIFT); CRn 1310 arch/arm/kvm/coproc.c val |= (reg->CRn << KVM_REG_ARM_32_CRN_SHIFT); CRn 11 arch/arm/kvm/coproc.h unsigned long CRn; CRn 23 arch/arm/kvm/coproc.h unsigned long CRn; CRn 50 arch/arm/kvm/coproc.h p->CRn, p->Op1, p->is_write ? "write" : "read"); CRn 54 arch/arm/kvm/coproc.h p->CRn, p->CRm, p->Op1, p->Op2, CRn 106 arch/arm/kvm/coproc.h if (i1->CRn != i2->CRn) CRn 107 arch/arm/kvm/coproc.h return i1->CRn - i2->CRn; CRn 118 arch/arm/kvm/coproc.h #define CRn(_x) .CRn = _x CRn 120 arch/arm/kvm/coproc.h #define CRm64(_x) .CRn = _x, .CRm = 0 CRn 24 arch/arm/kvm/coproc_a15.c { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32, CRn 27 arch/arm/kvm/coproc_a7.c { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32, CRn 12 arch/arm/kvm/trace.h TP_PROTO(unsigned long Op1, unsigned long Rt1, unsigned long CRn, CRn 14 arch/arm/kvm/trace.h TP_ARGS(Op1, Rt1, CRn, CRm, Op2, is_write), CRn 19 arch/arm/kvm/trace.h __field( unsigned int, CRn ) CRn 29 arch/arm/kvm/trace.h __entry->CRn = CRn; CRn 36 arch/arm/kvm/trace.h __entry->Op1, __entry->Rt1, __entry->CRn, CRn 318 arch/arm64/kvm/sys_regs.c (u32)r->CRn, (u32)r->CRm, (u32)r->Op2); CRn 767 arch/arm64/kvm/sys_regs.c if (r->CRn == 9 && r->CRm == 13) { CRn 784 arch/arm64/kvm/sys_regs.c } else if (r->CRn == 0 && r->CRm == 9) { CRn 790 arch/arm64/kvm/sys_regs.c } else if (r->CRn == 14 && (r->CRm & 12) == 8) { CRn 826 arch/arm64/kvm/sys_regs.c if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 1) { CRn 830 arch/arm64/kvm/sys_regs.c } else if (r->CRn == 14 && (r->CRm & 12) == 12) { CRn 983 arch/arm64/kvm/sys_regs.c (u32)(x)->CRn, (u32)(x)->CRm, (u32)(x)->Op2); CRn 1078 arch/arm64/kvm/sys_regs.c (u32)r->CRn, (u32)r->CRm, (u32)r->Op2); CRn 1338 arch/arm64/kvm/sys_regs.c Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \ CRn 1722 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n }, \ CRn 1724 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n }, \ CRn 1726 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n }, \ CRn 1728 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n } CRn 1731 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_xvr, NULL, n } CRn 1740 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 0), Op2( 0), trap_dbgidr }, CRn 1742 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 0), Op2( 2), trap_raz_wi }, CRn 1746 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 1), Op2( 0), trap_raz_wi }, CRn 1749 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 2), Op2( 0), trap_debug32 }, CRn 1751 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 2), Op2( 2), trap_debug32 }, CRn 1754 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 3), Op2( 0), trap_raz_wi }, CRn 1756 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 3), Op2( 2), trap_raz_wi }, CRn 1761 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 6), Op2( 0), trap_raz_wi }, CRn 1763 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 6), Op2( 2), trap_raz_wi }, CRn 1766 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 7), Op2( 0), trap_debug32 }, CRn 1778 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 0), Op2( 0), trap_raz_wi }, CRn 1782 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 0), Op2( 4), trap_raz_wi }, CRn 1785 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 1), Op2( 4), trap_oslsr_el1 }, CRn 1789 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 3), Op2( 4), trap_raz_wi }, CRn 1792 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 4), Op2( 4), trap_raz_wi }, CRn 1806 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 2), CRm( 0), Op2( 0), trap_raz_wi }, CRn 1809 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 0), Op2( 7), trap_raz_wi }, CRn 1811 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 1), Op2( 7), trap_raz_wi }, CRn 1813 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 2), Op2( 7), trap_raz_wi }, CRn 1815 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 8), Op2( 6), trap_raz_wi }, CRn 1817 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 9), Op2( 6), trap_raz_wi }, CRn 1819 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm(14), Op2( 6), trap_dbgauthstatus_el1 }, CRn 1834 arch/arm64/kvm/sys_regs.c { Op1(0), CRn(0b1110), \ CRn 1841 arch/arm64/kvm/sys_regs.c { Op1(0), CRn(0b1110), \ CRn 1851 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 0), Op2( 1), access_ctr }, CRn 1852 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 0), Op2( 0), access_vm_reg, NULL, c1_SCTLR }, CRn 1853 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 2), CRm( 0), Op2( 0), access_vm_reg, NULL, c2_TTBR0 }, CRn 1854 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, c2_TTBR1 }, CRn 1855 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, c2_TTBCR }, CRn 1856 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 3), CRm( 0), Op2( 0), access_vm_reg, NULL, c3_DACR }, CRn 1857 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, c5_DFSR }, CRn 1858 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL, c5_IFSR }, CRn 1859 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 5), CRm( 1), Op2( 0), access_vm_reg, NULL, c5_ADFSR }, CRn 1860 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 5), CRm( 1), Op2( 1), access_vm_reg, NULL, c5_AIFSR }, CRn 1861 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 6), CRm( 0), Op2( 0), access_vm_reg, NULL, c6_DFAR }, CRn 1862 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 6), CRm( 0), Op2( 2), access_vm_reg, NULL, c6_IFAR }, CRn 1867 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 6), Op2( 2), access_dcsw }, CRn 1868 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm(10), Op2( 2), access_dcsw }, CRn 1869 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm(14), Op2( 2), access_dcsw }, CRn 1872 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 0), access_pmcr }, CRn 1873 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 1), access_pmcnten }, CRn 1874 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 2), access_pmcnten }, CRn 1875 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 3), access_pmovs }, CRn 1876 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 4), access_pmswinc }, CRn 1877 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 5), access_pmselr }, CRn 1878 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 6), access_pmceid }, CRn 1879 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 7), access_pmceid }, CRn 1880 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(13), Op2( 0), access_pmu_evcntr }, CRn 1881 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(13), Op2( 1), access_pmu_evtyper }, CRn 1882 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(13), Op2( 2), access_pmu_evcntr }, CRn 1883 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(14), Op2( 0), access_pmuserenr }, CRn 1884 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(14), Op2( 1), access_pminten }, CRn 1885 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(14), Op2( 2), access_pminten }, CRn 1886 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(14), Op2( 3), access_pmovs }, CRn 1888 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(10), CRm( 2), Op2( 0), access_vm_reg, NULL, c10_PRRR }, CRn 1889 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(10), CRm( 2), Op2( 1), access_vm_reg, NULL, c10_NMRR }, CRn 1890 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(10), CRm( 3), Op2( 0), access_vm_reg, NULL, c10_AMAIR0 }, CRn 1891 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, c10_AMAIR1 }, CRn 1894 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(12), CRm(12), Op2( 5), access_gic_sre }, CRn 1896 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, c13_CID }, CRn 1967 arch/arm64/kvm/sys_regs.c { Op1(0), CRn(14), CRm(15), Op2(7), access_pmu_evtyper }, CRn 1969 arch/arm64/kvm/sys_regs.c { Op1(1), CRn( 0), CRm( 0), Op2(0), access_ccsidr }, CRn 1970 arch/arm64/kvm/sys_regs.c { Op1(1), CRn( 0), CRm( 0), Op2(1), access_clidr }, CRn 1971 arch/arm64/kvm/sys_regs.c { Op1(2), CRn( 0), CRm( 0), Op2(0), access_csselr, NULL, c0_CSSELR }, CRn 1975 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, c2_TTBR0 }, CRn 1976 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 9), Op2( 0), access_pmu_evcntr }, CRn 1977 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI1R */ CRn 1978 arch/arm64/kvm/sys_regs.c { Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, c2_TTBR1 }, CRn 1979 arch/arm64/kvm/sys_regs.c { Op1( 1), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_ASGI1R */ CRn 1980 arch/arm64/kvm/sys_regs.c { Op1( 2), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI0R */ CRn 2137 arch/arm64/kvm/sys_regs.c params.CRn = 0; CRn 2190 arch/arm64/kvm/sys_regs.c params.CRn = (hsr >> 10) & 0xf; CRn 2300 arch/arm64/kvm/sys_regs.c params.CRn = (esr >> 10) & 0xf; CRn 2334 arch/arm64/kvm/sys_regs.c params->CRn = ((id & KVM_REG_ARM64_SYSREG_CRN_MASK) CRn 2633 arch/arm64/kvm/sys_regs.c (reg->CRn << KVM_REG_ARM64_SYSREG_CRN_SHIFT) | CRn 17 arch/arm64/kvm/sys_regs.h u8 CRn; CRn 33 arch/arm64/kvm/sys_regs.h u8 CRn; CRn 69 arch/arm64/kvm/sys_regs.h p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); CRn 131 arch/arm64/kvm/sys_regs.h if (i1->CRn != i2->CRn) CRn 132 arch/arm64/kvm/sys_regs.h return i1->CRn - i2->CRn; CRn 145 arch/arm64/kvm/sys_regs.h #define CRn(_x) .CRn = _x CRn 152 arch/arm64/kvm/sys_regs.h CRn(sys_reg_CRn(reg)), CRm(sys_reg_CRm(reg)), \ CRn 49 arch/arm64/kvm/sys_regs_generic_v8.c { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001), CRn 166 arch/arm64/kvm/trace.h __field(u8, CRn) CRn 178 arch/arm64/kvm/trace.h __entry->CRn = reg->CRn; CRn 185 arch/arm64/kvm/trace.h __entry->Op0, __entry->Op1, __entry->CRn,