CRm 53 arch/arm/include/asm/cp15.h #define __ACCESS_CP15(CRn, Op1, CRm, Op2) \ CRm 54 arch/arm/include/asm/cp15.h "mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32 CRm 55 arch/arm/include/asm/cp15.h #define __ACCESS_CP15_64(Op1, CRm) \ CRm 56 arch/arm/include/asm/cp15.h "mrrc", "mcrr", __stringify(p15, Op1, %Q0, %R0, CRm), u64 CRm 381 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 5), is32, CRm 385 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 2), Op2( 0), is32, CRm 389 arch/arm/kvm/coproc.c { CRn( 1), CRm( 0), Op1( 0), Op2( 1), is32, CRm 393 arch/arm/kvm/coproc.c { CRn( 1), CRm( 0), Op1( 0), Op2( 2), is32, CRm 398 arch/arm/kvm/coproc.c { CRn(2), CRm( 0), Op1( 0), Op2( 0), is32, CRm 400 arch/arm/kvm/coproc.c { CRn(2), CRm( 0), Op1( 0), Op2( 1), is32, CRm 402 arch/arm/kvm/coproc.c { CRn( 2), CRm( 0), Op1( 0), Op2( 2), is32, CRm 408 arch/arm/kvm/coproc.c { CRn( 3), CRm( 0), Op1( 0), Op2( 0), is32, CRm 412 arch/arm/kvm/coproc.c { CRn( 5), CRm( 0), Op1( 0), Op2( 0), is32, CRm 414 arch/arm/kvm/coproc.c { CRn( 5), CRm( 0), Op1( 0), Op2( 1), is32, CRm 416 arch/arm/kvm/coproc.c { CRn( 5), CRm( 1), Op1( 0), Op2( 0), is32, CRm 418 arch/arm/kvm/coproc.c { CRn( 5), CRm( 1), Op1( 0), Op2( 1), is32, CRm 422 arch/arm/kvm/coproc.c { CRn( 6), CRm( 0), Op1( 0), Op2( 0), is32, CRm 424 arch/arm/kvm/coproc.c { CRn( 6), CRm( 0), Op1( 0), Op2( 2), is32, CRm 433 arch/arm/kvm/coproc.c { CRn( 7), CRm( 6), Op1( 0), Op2( 2), is32, access_dcsw}, CRm 434 arch/arm/kvm/coproc.c { CRn( 7), CRm(10), Op1( 0), Op2( 2), is32, access_dcsw}, CRm 435 arch/arm/kvm/coproc.c { CRn( 7), CRm(14), Op1( 0), Op2( 2), is32, access_dcsw}, CRm 439 arch/arm/kvm/coproc.c { CRn( 9), CRm( 0), Op1( 1), Op2( 2), is32, CRm 441 arch/arm/kvm/coproc.c { CRn( 9), CRm( 0), Op1( 1), Op2( 3), is32, access_l2ectlr}, CRm 446 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 0), is32, access_pmcr}, CRm 447 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 1), is32, access_pmcntenset}, CRm 448 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 2), is32, access_pmcntenclr}, CRm 449 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 3), is32, access_pmovsr}, CRm 450 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 5), is32, access_pmselr}, CRm 451 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 6), is32, access_pmceid0}, CRm 452 arch/arm/kvm/coproc.c { CRn( 9), CRm(12), Op1( 0), Op2( 7), is32, access_pmceid1}, CRm 453 arch/arm/kvm/coproc.c { CRn( 9), CRm(13), Op1( 0), Op2( 0), is32, access_pmccntr}, CRm 454 arch/arm/kvm/coproc.c { CRn( 9), CRm(13), Op1( 0), Op2( 1), is32, access_pmxevtyper}, CRm 455 arch/arm/kvm/coproc.c { CRn( 9), CRm(13), Op1( 0), Op2( 2), is32, access_pmxevcntr}, CRm 456 arch/arm/kvm/coproc.c { CRn( 9), CRm(14), Op1( 0), Op2( 0), is32, access_pmuserenr}, CRm 457 arch/arm/kvm/coproc.c { CRn( 9), CRm(14), Op1( 0), Op2( 1), is32, access_pmintenset}, CRm 458 arch/arm/kvm/coproc.c { CRn( 9), CRm(14), Op1( 0), Op2( 2), is32, access_pmintenclr}, CRm 461 arch/arm/kvm/coproc.c { CRn(10), CRm( 2), Op1( 0), Op2( 0), is32, CRm 463 arch/arm/kvm/coproc.c { CRn(10), CRm( 2), Op1( 0), Op2( 1), is32, CRm 467 arch/arm/kvm/coproc.c { CRn(10), CRm( 3), Op1( 0), Op2( 0), is32, CRm 469 arch/arm/kvm/coproc.c { CRn(10), CRm( 3), Op1( 0), Op2( 1), is32, CRm 476 arch/arm/kvm/coproc.c { CRn(12), CRm( 0), Op1( 0), Op2( 0), is32, CRm 484 arch/arm/kvm/coproc.c { CRn(12), CRm(12), Op1( 0), Op2(5), is32, access_gic_sre }, CRm 487 arch/arm/kvm/coproc.c { CRn(13), CRm( 0), Op1( 0), Op2( 1), is32, CRm 489 arch/arm/kvm/coproc.c { CRn(13), CRm( 0), Op1( 0), Op2( 2), is32, CRm 491 arch/arm/kvm/coproc.c { CRn(13), CRm( 0), Op1( 0), Op2( 3), is32, CRm 493 arch/arm/kvm/coproc.c { CRn(13), CRm( 0), Op1( 0), Op2( 4), is32, CRm 500 arch/arm/kvm/coproc.c { CRn(14), CRm( 1), Op1( 0), Op2( 0), is32, CRm 504 arch/arm/kvm/coproc.c { CRn(14), CRm( 2), Op1( 0), Op2( 0), is32, access_cntp_tval }, CRm 505 arch/arm/kvm/coproc.c { CRn(14), CRm( 2), Op1( 0), Op2( 1), is32, access_cntp_ctl }, CRm 508 arch/arm/kvm/coproc.c { CRn(15), CRm( 0), Op1( 4), Op2( 0), is32, access_cbar}, CRm 548 arch/arm/kvm/coproc.c val |= (x)->CRm << 7; \ CRm 579 arch/arm/kvm/coproc.c params->CRm, params->Op2, params->is_write); CRm 619 arch/arm/kvm/coproc.c params.CRm = 0; CRm 676 arch/arm/kvm/coproc.c params.CRm = (kvm_vcpu_get_hsr(vcpu) >> 1) & 0xf; CRm 737 arch/arm/kvm/coproc.c params->CRm = ((id & KVM_REG_ARM_CRM_MASK) CRm 758 arch/arm/kvm/coproc.c params->CRm = 0; CRm 837 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 0), is32, NULL, get_MIDR }, CRm 838 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 1), is32, NULL, get_CTR }, CRm 839 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 2), is32, NULL, get_TCMTR }, CRm 840 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 3), is32, NULL, get_TLBTR }, CRm 841 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 0), Op2( 6), is32, NULL, get_REVIDR }, CRm 843 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 1), Op2( 1), is32, NULL, get_CLIDR }, CRm 844 arch/arm/kvm/coproc.c { CRn( 0), CRm( 0), Op1( 1), Op2( 7), is32, NULL, get_AIDR }, CRm 846 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 0), is32, NULL, get_ID_PFR0 }, CRm 847 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 1), is32, NULL, get_ID_PFR1 }, CRm 848 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 2), is32, NULL, get_ID_DFR0 }, CRm 849 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 3), is32, NULL, get_ID_AFR0 }, CRm 850 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 4), is32, NULL, get_ID_MMFR0 }, CRm 851 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 5), is32, NULL, get_ID_MMFR1 }, CRm 852 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 6), is32, NULL, get_ID_MMFR2 }, CRm 853 arch/arm/kvm/coproc.c { CRn( 0), CRm( 1), Op1( 0), Op2( 7), is32, NULL, get_ID_MMFR3 }, CRm 855 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 0), is32, NULL, get_ID_ISAR0 }, CRm 856 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 1), is32, NULL, get_ID_ISAR1 }, CRm 857 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 2), is32, NULL, get_ID_ISAR2 }, CRm 858 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 3), is32, NULL, get_ID_ISAR3 }, CRm 859 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 4), is32, NULL, get_ID_ISAR4 }, CRm 860 arch/arm/kvm/coproc.c { CRn( 0), CRm( 2), Op1( 0), Op2( 5), is32, NULL, get_ID_ISAR5 }, CRm 1309 arch/arm/kvm/coproc.c val |= (reg->CRm << KVM_REG_ARM_CRM_SHIFT); CRm 12 arch/arm/kvm/coproc.h unsigned long CRm; CRm 24 arch/arm/kvm/coproc.h unsigned long CRm; CRm 54 arch/arm/kvm/coproc.h p->CRn, p->CRm, p->Op1, p->Op2, CRm 108 arch/arm/kvm/coproc.h if (i1->CRm != i2->CRm) CRm 109 arch/arm/kvm/coproc.h return i1->CRm - i2->CRm; CRm 119 arch/arm/kvm/coproc.h #define CRm(_x) .CRm = _x CRm 120 arch/arm/kvm/coproc.h #define CRm64(_x) .CRn = _x, .CRm = 0 CRm 24 arch/arm/kvm/coproc_a15.c { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32, CRm 27 arch/arm/kvm/coproc_a7.c { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32, CRm 13 arch/arm/kvm/trace.h unsigned long CRm, unsigned long Op2, bool is_write), CRm 14 arch/arm/kvm/trace.h TP_ARGS(Op1, Rt1, CRn, CRm, Op2, is_write), CRm 20 arch/arm/kvm/trace.h __field( unsigned int, CRm ) CRm 30 arch/arm/kvm/trace.h __entry->CRm = CRm; CRm 37 arch/arm/kvm/trace.h __entry->CRm, __entry->Op2) CRm 99 arch/arm64/include/asm/sysreg.h #define __SYS_BARRIER_INSN(CRm, op2, Rt) \ CRm 100 arch/arm64/include/asm/sysreg.h __emit_inst(0xd5000000 | sys_insn(0, 3, 3, (CRm), (op2)) | ((Rt) & 0x1f)) CRm 318 arch/arm64/kvm/sys_regs.c (u32)r->CRn, (u32)r->CRm, (u32)r->Op2); CRm 767 arch/arm64/kvm/sys_regs.c if (r->CRn == 9 && r->CRm == 13) { CRm 784 arch/arm64/kvm/sys_regs.c } else if (r->CRn == 0 && r->CRm == 9) { CRm 790 arch/arm64/kvm/sys_regs.c } else if (r->CRn == 14 && (r->CRm & 12) == 8) { CRm 795 arch/arm64/kvm/sys_regs.c idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); CRm 826 arch/arm64/kvm/sys_regs.c if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 1) { CRm 830 arch/arm64/kvm/sys_regs.c } else if (r->CRn == 14 && (r->CRm & 12) == 12) { CRm 831 arch/arm64/kvm/sys_regs.c idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); CRm 927 arch/arm64/kvm/sys_regs.c if (r->CRm & 0x2) CRm 983 arch/arm64/kvm/sys_regs.c (u32)(x)->CRn, (u32)(x)->CRm, (u32)(x)->Op2); CRm 1078 arch/arm64/kvm/sys_regs.c (u32)r->CRn, (u32)r->CRm, (u32)r->Op2); CRm 1338 arch/arm64/kvm/sys_regs.c Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \ CRm 1722 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n }, \ CRm 1724 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n }, \ CRm 1726 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n }, \ CRm 1728 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n } CRm 1731 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_xvr, NULL, n } CRm 1740 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 0), Op2( 0), trap_dbgidr }, CRm 1742 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 0), Op2( 2), trap_raz_wi }, CRm 1746 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 1), Op2( 0), trap_raz_wi }, CRm 1749 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 2), Op2( 0), trap_debug32 }, CRm 1751 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 2), Op2( 2), trap_debug32 }, CRm 1754 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 3), Op2( 0), trap_raz_wi }, CRm 1756 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 3), Op2( 2), trap_raz_wi }, CRm 1761 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 6), Op2( 0), trap_raz_wi }, CRm 1763 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 6), Op2( 2), trap_raz_wi }, CRm 1766 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 7), Op2( 0), trap_debug32 }, CRm 1778 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 0), Op2( 0), trap_raz_wi }, CRm 1782 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 0), Op2( 4), trap_raz_wi }, CRm 1785 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 1), Op2( 4), trap_oslsr_el1 }, CRm 1789 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 3), Op2( 4), trap_raz_wi }, CRm 1792 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 4), Op2( 4), trap_raz_wi }, CRm 1806 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 2), CRm( 0), Op2( 0), trap_raz_wi }, CRm 1809 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 0), Op2( 7), trap_raz_wi }, CRm 1811 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 1), Op2( 7), trap_raz_wi }, CRm 1813 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 2), Op2( 7), trap_raz_wi }, CRm 1815 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 8), Op2( 6), trap_raz_wi }, CRm 1817 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 9), Op2( 6), trap_raz_wi }, CRm 1819 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm(14), Op2( 6), trap_dbgauthstatus_el1 }, CRm 1825 arch/arm64/kvm/sys_regs.c { Op1( 0), CRm( 1), .access = trap_raz_wi }, CRm 1828 arch/arm64/kvm/sys_regs.c { Op1( 0), CRm( 2), .access = trap_raz_wi }, CRm 1835 arch/arm64/kvm/sys_regs.c CRm((0b1000 | (((n) >> 3) & 0x3))), Op2(((n) & 0x7)), \ CRm 1842 arch/arm64/kvm/sys_regs.c CRm((0b1100 | (((n) >> 3) & 0x3))), Op2(((n) & 0x7)), \ CRm 1851 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 0), Op2( 1), access_ctr }, CRm 1852 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 0), Op2( 0), access_vm_reg, NULL, c1_SCTLR }, CRm 1853 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 2), CRm( 0), Op2( 0), access_vm_reg, NULL, c2_TTBR0 }, CRm 1854 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, c2_TTBR1 }, CRm 1855 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, c2_TTBCR }, CRm 1856 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 3), CRm( 0), Op2( 0), access_vm_reg, NULL, c3_DACR }, CRm 1857 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, c5_DFSR }, CRm 1858 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL, c5_IFSR }, CRm 1859 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 5), CRm( 1), Op2( 0), access_vm_reg, NULL, c5_ADFSR }, CRm 1860 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 5), CRm( 1), Op2( 1), access_vm_reg, NULL, c5_AIFSR }, CRm 1861 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 6), CRm( 0), Op2( 0), access_vm_reg, NULL, c6_DFAR }, CRm 1862 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 6), CRm( 0), Op2( 2), access_vm_reg, NULL, c6_IFAR }, CRm 1867 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 6), Op2( 2), access_dcsw }, CRm 1868 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm(10), Op2( 2), access_dcsw }, CRm 1869 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm(14), Op2( 2), access_dcsw }, CRm 1872 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 0), access_pmcr }, CRm 1873 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 1), access_pmcnten }, CRm 1874 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 2), access_pmcnten }, CRm 1875 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 3), access_pmovs }, CRm 1876 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 4), access_pmswinc }, CRm 1877 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 5), access_pmselr }, CRm 1878 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 6), access_pmceid }, CRm 1879 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(12), Op2( 7), access_pmceid }, CRm 1880 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(13), Op2( 0), access_pmu_evcntr }, CRm 1881 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(13), Op2( 1), access_pmu_evtyper }, CRm 1882 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(13), Op2( 2), access_pmu_evcntr }, CRm 1883 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(14), Op2( 0), access_pmuserenr }, CRm 1884 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(14), Op2( 1), access_pminten }, CRm 1885 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(14), Op2( 2), access_pminten }, CRm 1886 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 9), CRm(14), Op2( 3), access_pmovs }, CRm 1888 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(10), CRm( 2), Op2( 0), access_vm_reg, NULL, c10_PRRR }, CRm 1889 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(10), CRm( 2), Op2( 1), access_vm_reg, NULL, c10_NMRR }, CRm 1890 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(10), CRm( 3), Op2( 0), access_vm_reg, NULL, c10_AMAIR0 }, CRm 1891 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, c10_AMAIR1 }, CRm 1894 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(12), CRm(12), Op2( 5), access_gic_sre }, CRm 1896 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, c13_CID }, CRm 1967 arch/arm64/kvm/sys_regs.c { Op1(0), CRn(14), CRm(15), Op2(7), access_pmu_evtyper }, CRm 1969 arch/arm64/kvm/sys_regs.c { Op1(1), CRn( 0), CRm( 0), Op2(0), access_ccsidr }, CRm 1970 arch/arm64/kvm/sys_regs.c { Op1(1), CRn( 0), CRm( 0), Op2(1), access_clidr }, CRm 1971 arch/arm64/kvm/sys_regs.c { Op1(2), CRn( 0), CRm( 0), Op2(0), access_csselr, NULL, c0_CSSELR }, CRm 1975 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, c2_TTBR0 }, CRm 1976 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 9), Op2( 0), access_pmu_evcntr }, CRm 1977 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI1R */ CRm 1978 arch/arm64/kvm/sys_regs.c { Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, c2_TTBR1 }, CRm 1979 arch/arm64/kvm/sys_regs.c { Op1( 1), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_ASGI1R */ CRm 1980 arch/arm64/kvm/sys_regs.c { Op1( 2), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI0R */ CRm 2131 arch/arm64/kvm/sys_regs.c params.CRm = (hsr >> 1) & 0xf; CRm 2187 arch/arm64/kvm/sys_regs.c params.CRm = (hsr >> 1) & 0xf; CRm 2301 arch/arm64/kvm/sys_regs.c params.CRm = (esr >> 1) & 0xf; CRm 2336 arch/arm64/kvm/sys_regs.c params->CRm = ((id & KVM_REG_ARM64_SYSREG_CRM_MASK) CRm 2634 arch/arm64/kvm/sys_regs.c (reg->CRm << KVM_REG_ARM64_SYSREG_CRM_SHIFT) | CRm 18 arch/arm64/kvm/sys_regs.h u8 CRm; CRm 34 arch/arm64/kvm/sys_regs.h u8 CRm; CRm 69 arch/arm64/kvm/sys_regs.h p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); CRm 133 arch/arm64/kvm/sys_regs.h if (i1->CRm != i2->CRm) CRm 134 arch/arm64/kvm/sys_regs.h return i1->CRm - i2->CRm; CRm 146 arch/arm64/kvm/sys_regs.h #define CRm(_x) .CRm = _x CRm 152 arch/arm64/kvm/sys_regs.h CRn(sys_reg_CRn(reg)), CRm(sys_reg_CRm(reg)), \ CRm 49 arch/arm64/kvm/sys_regs_generic_v8.c { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001), CRm 167 arch/arm64/kvm/trace.h __field(u8, CRm) CRm 179 arch/arm64/kvm/trace.h __entry->CRm = reg->CRm; CRm 186 arch/arm64/kvm/trace.h __entry->CRm, __entry->Op2,