pp_smu_nv_clock_table  867 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		struct pp_smu *pp, struct pp_smu_nv_clock_table *max_clocks)
pp_smu_nv_clock_table 3094 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct pp_smu_nv_clock_table max_clocks)
pp_smu_nv_clock_table 3160 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct pp_smu_nv_clock_table *max_clocks, unsigned int *uclk_states, unsigned int num_states)
pp_smu_nv_clock_table 3394 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct pp_smu_nv_clock_table max_clocks = {0};
pp_smu_nv_clock_table  142 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h 		struct pp_smu_nv_clock_table max_clocks);
pp_smu_nv_clock_table  231 drivers/gpu/drm/amd/display/dc/dm_pp_smu.h 			struct pp_smu_nv_clock_table *max_clocks);
pp_smu_nv_clock_table  537 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 	int (*get_max_sustainable_clocks_by_dc)(struct smu_context *smu, struct pp_smu_nv_clock_table *max_clocks);
pp_smu_nv_clock_table 1599 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 		struct pp_smu_nv_clock_table *max_clocks)