pp_atomfwctrl_get_gpu_pll_dividers_vega10  218 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h int pp_atomfwctrl_get_gpu_pll_dividers_vega10(struct pp_hwmgr *hwmgr,
pp_atomfwctrl_get_gpu_pll_dividers_vega10 1491 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(
pp_atomfwctrl_get_gpu_pll_dividers_vega10 1584 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr,
pp_atomfwctrl_get_gpu_pll_dividers_vega10 1644 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr,
pp_atomfwctrl_get_gpu_pll_dividers_vega10 1785 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(
pp_atomfwctrl_get_gpu_pll_dividers_vega10 1932 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr,
pp_atomfwctrl_get_gpu_pll_dividers_vega10 1984 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr,
pp_atomfwctrl_get_gpu_pll_dividers_vega10 2000 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr,