post             18080 arch/m68k/ifpsp060/src/fpsp.S # if the addressing mode is post-increment or pre-decrement,
post             1358 arch/mips/include/asm/octeon/cvmx-sriox-defs.h 		uint64_t post:8;
post             1360 arch/mips/include/asm/octeon/cvmx-sriox-defs.h 		uint64_t post:8;
post             1462 arch/mips/include/asm/octeon/cvmx-sriox-defs.h 		uint64_t post:8;
post             1464 arch/mips/include/asm/octeon/cvmx-sriox-defs.h 		uint64_t post:8;
post              514 arch/x86/include/asm/paravirt_types.h 		      pre, post, ...)					\
post              524 arch/x86/include/asm/paravirt_types.h 				     post				\
post              534 arch/x86/include/asm/paravirt_types.h 				     post				\
post              545 arch/x86/include/asm/paravirt_types.h #define __PVOP_CALL(rettype, op, pre, post, ...)			\
post              547 arch/x86/include/asm/paravirt_types.h 		      EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
post              549 arch/x86/include/asm/paravirt_types.h #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...)			\
post              552 arch/x86/include/asm/paravirt_types.h 		      pre, post, ##__VA_ARGS__)
post              555 arch/x86/include/asm/paravirt_types.h #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...)	\
post              561 arch/x86/include/asm/paravirt_types.h 			     post					\
post              569 arch/x86/include/asm/paravirt_types.h #define __PVOP_VCALL(op, pre, post, ...)				\
post              572 arch/x86/include/asm/paravirt_types.h 		       pre, post, ##__VA_ARGS__)
post              574 arch/x86/include/asm/paravirt_types.h #define __PVOP_VCALLEESAVE(op, pre, post, ...)				\
post              577 arch/x86/include/asm/paravirt_types.h 		      pre, post, ##__VA_ARGS__)
post              244 arch/x86/mm/mmio-mod.c 			.post_handler = post,
post              120 drivers/acpi/acpi_video.c 	u8 post:1;		/* can configure the head to */
post             1098 drivers/acpi/acpi_video.c 		video->flags.post = 1;
post             2076 drivers/acpi/acpi_video.c 	       video->flags.post ? "yes" : "no");
post             8080 drivers/gpu/drm/i915/intel_pm.c 	int post = (vidfreq & 0x3000) >> 12;
post             8086 drivers/gpu/drm/i915/intel_pm.c 	freq = ((div * 133333) / ((1<<post) * pre));
post               10 drivers/gpu/drm/nouveau/include/nvkm/subdev/devinit.h 	bool post;
post               62 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c 	if (init && init->func->post)
post               63 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c 		ret = init->func->post(init, init->post);
post               74 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c 		init->post = true;
post               88 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c 		init->post = init->force_post;
post               58 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c 	.post = nv04_devinit_post,
post               57 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c 	.post = nv04_devinit_post,
post              104 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c 	base->post = ((nvkm_rd32(device, 0x2240c) & BIT(1)) == 0);
post              111 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c 	.post = nv04_devinit_post,
post               51 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c 	.post = nv04_devinit_post,
post               82 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c pmu_load(struct nv50_devinit *init, u8 type, bool post,
post               92 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c 	if (!post)
post              109 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c gm200_devinit_preos(struct nv50_devinit *init, bool post)
post              114 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c 	pmu_load(init, 0x01, post, NULL, NULL);
post              118 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c gm200_devinit_post(struct nvkm_devinit *base, bool post)
post              135 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c 	ret = pmu_load(init, 0x04, post, &exec, &args);
post              142 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c 	if (post) {
post              150 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c 	if (post) {
post              158 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c 	if (post) {
post              168 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c 	gm200_devinit_preos(init, post);
post              176 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c 	.post = gm200_devinit_post,
post              142 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c 	.post = nv04_devinit_post,
post               69 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.c 	.post = gm200_devinit_post,
post               58 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c 	.post = nv04_devinit_post,
post              414 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	if (!init->base.post) {
post              422 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 			init->base.post = true;
post              456 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	.post = nv04_devinit_post,
post              133 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c 	.post = nv04_devinit_post,
post              103 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv10.c 	.post = nv04_devinit_post,
post               33 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv1a.c 	.post = nv04_devinit_post,
post               69 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv20.c 	.post = nv04_devinit_post,
post              103 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 	if (!base->post) {
post              106 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 			base->post = true;
post              112 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 	if (!base->post) {
post              116 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 			base->post = true;
post              137 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 	while (init->base.post && dcb_outp_parse(bios, i, &ver, &hdr, &outp)) {
post              169 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 	.post = nv04_devinit_post,
post               11 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/priv.h 	int  (*post)(struct nvkm_devinit *, bool post);
post               69 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c tu102_devinit_post(struct nvkm_devinit *base, bool post)
post               72 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c 	gm200_devinit_preos(init, post);
post               79 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c 	.post = tu102_devinit_post,
post             2929 drivers/infiniband/core/mad.c 	int post, ret;
post             2973 drivers/infiniband/core/mad.c 		post = (++recv_queue->count < recv_queue->max_active);
post             2991 drivers/infiniband/core/mad.c 	} while (post);
post              756 drivers/infiniband/hw/hfi1/pcie.c #define eq_value(pre, curr, post) \
post              760 drivers/infiniband/hw/hfi1/pcie.c 	| (((u32)(post)) << \
post              590 drivers/infiniband/hw/qib/qib_iba7322.c 	u8 post;
post             7365 drivers/infiniband/hw/qib/qib_iba7322.c 	pack_ent |= tp->post << DDS_ENT_POST_LSB;
post             8202 drivers/infiniband/hw/qib/qib_iba7322.c 	deemph |= (txdds->post & SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
post              820 drivers/irqchip/irq-gic-v3-its.c 			goto post;					\
post              826 drivers/irqchip/irq-gic-v3-its.c post:									\
post               97 drivers/md/dm-crypt.c 	int (*post)(struct crypt_config *cc, u8 *iv,
post              775 drivers/md/dm-crypt.c 	.post	   = crypt_iv_lmk_post
post              784 drivers/md/dm-crypt.c 	.post	   = crypt_iv_tcw_post
post             1053 drivers/md/dm-crypt.c 	if (!r && cc->iv_gen_ops && cc->iv_gen_ops->post)
post             1054 drivers/md/dm-crypt.c 		r = cc->iv_gen_ops->post(cc, org_iv, dmreq);
post             1127 drivers/md/dm-crypt.c 	if (!r && cc->iv_gen_ops && cc->iv_gen_ops->post)
post             1128 drivers/md/dm-crypt.c 		r = cc->iv_gen_ops->post(cc, org_iv, dmreq);
post             1690 drivers/md/dm-crypt.c 	if (!error && cc->iv_gen_ops && cc->iv_gen_ops->post)
post             1691 drivers/md/dm-crypt.c 		error = cc->iv_gen_ops->post(cc, org_iv_of_dmreq(cc, dmreq), dmreq);
post             3619 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c #define WC_TX_FIR(post, main, pre) \
post             3620 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 	((post << MDIO_WC_REG_TX_FIR_TAP_POST_TAP_OFFSET) | \
post              338 drivers/scsi/aacraid/rx.c 		} * post;
post              349 drivers/scsi/aacraid/rx.c 		post = dma_alloc_coherent(&dev->pdev->dev,
post              352 drivers/scsi/aacraid/rx.c 		if (unlikely(post == NULL)) {
post              357 drivers/scsi/aacraid/rx.c 		post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS);
post              358 drivers/scsi/aacraid/rx.c 		post->Post_Address = cpu_to_le32(baddr);
post              363 drivers/scsi/aacraid/rx.c 				  post, paddr);
post             1619 drivers/scsi/be2iscsi/be_cmds.c 	u32 loop, post, rdy = 0;
post             1623 drivers/scsi/be2iscsi/be_cmds.c 		post = beiscsi_get_post_stage(phba);
post             1624 drivers/scsi/be2iscsi/be_cmds.c 		if (post & POST_ERROR_BIT)
post             1626 drivers/scsi/be2iscsi/be_cmds.c 		if ((post & POST_STAGE_MASK) == POST_STAGE_ARMFW_RDY) {
post             1635 drivers/scsi/be2iscsi/be_cmds.c 			      "BC_%d : FW not ready 0x%x\n", post);
post             1849 drivers/scsi/be2iscsi/be_cmds.c 	u32 post, status;
post             1852 drivers/scsi/be2iscsi/be_cmds.c 	post = beiscsi_get_post_stage(phba);
post             1853 drivers/scsi/be2iscsi/be_cmds.c 	status = post & POST_STAGE_MASK;
post             1858 drivers/scsi/be2iscsi/be_cmds.c 			      "BC_%d : HBA error recoverable: 0x%x\n", post);
post             1862 drivers/scsi/be2iscsi/be_cmds.c 			      "BC_%d : HBA in UE: 0x%x\n", post);
post              957 drivers/scsi/initio.c 				(*tmp->post) ((u8 *) host, (u8 *) tmp);
post              990 drivers/scsi/initio.c 					(*tmp->post) ((u8 *) host, (u8 *) tmp);
post             1128 drivers/scsi/initio.c 				(*scb->post) ((u8 *) host, (u8 *) scb);
post             2541 drivers/scsi/initio.c 	cblk->post = i91uSCBPost;	/* i91u's callback routine      */
post              384 drivers/scsi/initio.h 	void (*post) (u8 *, u8 *);	/*4C POST routine */
post             4522 drivers/scsi/ips.c 	uint32_t post;
post             4530 drivers/scsi/ips.c 	post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
post             4533 drivers/scsi/ips.c 	if (post == 0)
post              432 drivers/spi/spi-imx.c 	unsigned int pre, post;
post              438 drivers/spi/spi-imx.c 	post = fls(fin) - fls(fspi);
post              439 drivers/spi/spi-imx.c 	if (fin > fspi << post)
post              440 drivers/spi/spi-imx.c 		post++;
post              444 drivers/spi/spi-imx.c 	post = max(4U, post) - 4;
post              445 drivers/spi/spi-imx.c 	if (unlikely(post > 0xf)) {
post              451 drivers/spi/spi-imx.c 	pre = DIV_ROUND_UP(fin, fspi << post) - 1;
post              454 drivers/spi/spi-imx.c 			__func__, fin, fspi, post, pre);
post              457 drivers/spi/spi-imx.c 	*fres = (fin / (pre + 1)) >> post;
post              460 drivers/spi/spi-imx.c 		(post << MX51_ECSPI_CTRL_POSTDIV_OFFSET);
post               78 drivers/tty/serial/8250/serial_cs.c 	int (*post)(struct pcmcia_device *);
post              203 drivers/tty/serial/8250/serial_cs.c 		.post	= quirk_post_ibm,
post              670 drivers/tty/serial/8250/serial_cs.c 	if (info->quirk && info->quirk->post)
post              671 drivers/tty/serial/8250/serial_cs.c 		if (info->quirk->post(link))
post              107 drivers/usb/chipidea/usbmisc_imx.c 	int (*post)(struct imx_usbmisc_data *data);
post              611 drivers/usb/chipidea/usbmisc_imx.c 	.post = usbmisc_imx25_post,
post              678 drivers/usb/chipidea/usbmisc_imx.c 	if (!usbmisc->ops->post)
post              680 drivers/usb/chipidea/usbmisc_imx.c 	return usbmisc->ops->post(data);
post               40 drivers/video/fbdev/matrox/matroxfb_DAC1064.c 			      unsigned int *post)
post               60 drivers/video/fbdev/matrox/matroxfb_DAC1064.c 	*post = p;
post              285 drivers/video/fbdev/matrox/matroxfb_Ti3026.c 			    int *feed, int *post)
post              293 drivers/video/fbdev/matrox/matroxfb_Ti3026.c 	fvco >>= (*post = lpost);
post              227 drivers/video/fbdev/matrox/matroxfb_maven.c 		unsigned int* in, unsigned int* feed, unsigned int* post,
post              283 drivers/video/fbdev/matrox/matroxfb_maven.c 				*post = p;
post              294 drivers/video/fbdev/matrox/matroxfb_maven.c 	dprintk(KERN_ERR "clk: %02X %02X %02X %d %d\n", *in, *feed, *post, fxtal, fwant);
post              300 drivers/video/fbdev/matrox/matroxfb_maven.c 		unsigned int* in, unsigned int* feed, unsigned int* post,
post              317 drivers/video/fbdev/matrox/matroxfb_maven.c 	*post = p;
post              322 drivers/video/fbdev/matrox/matroxfb_maven.c 		unsigned int* in, unsigned int* feed, unsigned int* post) {
post              336 drivers/video/fbdev/matrox/matroxfb_maven.c 	*post = p;
post              130 drivers/video/fbdev/matrox/matroxfb_misc.c 		unsigned int* in, unsigned int* feed, unsigned int* post) {
post              179 drivers/video/fbdev/matrox/matroxfb_misc.c 				*post = p;
post              186 drivers/video/fbdev/matrox/matroxfb_misc.c 	dprintk(KERN_ERR "clk: %02X %02X %02X %d %d %d\n", *in, *feed, *post, fxtal, bestvco, fwant);
post                9 drivers/video/fbdev/matrox/matroxfb_misc.h 	unsigned int* in, unsigned int* feed, unsigned int* post);
post               13 drivers/video/fbdev/matrox/matroxfb_misc.h 				unsigned int *post)
post               15 drivers/video/fbdev/matrox/matroxfb_misc.h 	return matroxfb_PLL_calcclock(&minfo->features.pll, freq, fmax, in, feed, post);
post              150 drivers/video/fbdev/pm3fb.c 	int f, pre, post;
post              157 drivers/video/fbdev/pm3fb.c 			for (post = 0; post < 5; post++) {
post              158 drivers/video/fbdev/pm3fb.c 				freq = ((2*PM3_REF_CLOCK * f) >> post) / pre;
post              166 drivers/video/fbdev/pm3fb.c 					*postscale = post;
post             3625 fs/ocfs2/refcounttree.c 			     struct ocfs2_post_refcount *post)
post             3663 fs/ocfs2/refcounttree.c 	context->post_refcount = post;
post             3687 fs/ocfs2/refcounttree.c 			    struct ocfs2_post_refcount *post)
post             3718 fs/ocfs2/refcounttree.c 	if (post)
post             3719 fs/ocfs2/refcounttree.c 		credits += post->credits;
post             3744 fs/ocfs2/refcounttree.c 	if (post && post->func) {
post             3745 fs/ocfs2/refcounttree.c 		ret = post->func(inode, handle, post->para);
post               78 fs/ocfs2/refcounttree.h 			     struct ocfs2_post_refcount *post);
post               96 fs/ocfs2/refcounttree.h 			    struct ocfs2_post_refcount *post);
post               29 fs/overlayfs/namei.c 			      size_t prelen, const char *post)
post               34 fs/overlayfs/namei.c 	buf = ovl_get_redirect_xattr(dentry, prelen + strlen(post));
post               54 fs/overlayfs/namei.c 	strcat(buf, post);
post              196 fs/overlayfs/namei.c 			     size_t prelen, const char *post,
post              201 fs/overlayfs/namei.c 	bool last_element = !post[0];
post              263 fs/overlayfs/namei.c 	err = ovl_check_redirect(this, d, prelen, post);
post             1699 include/linux/pci.h static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
post               21 sound/core/pcm_timer.c 	unsigned long rate, mult, fsize, l, post;
post               37 sound/core/pcm_timer.c 	post = 1;
post               40 sound/core/pcm_timer.c 		post *= 2;
post               49 sound/core/pcm_timer.c 	runtime->timer_resolution = (mult * fsize / rate) * post;
post             1612 tools/perf/util/probe-finder.c 			goto post;
post             1619 tools/perf/util/probe-finder.c 			goto post;
post             1657 tools/perf/util/probe-finder.c post: