port_sel           56 drivers/ata/pata_icside.c 		u8 port_sel;
port_sel          235 drivers/ata/pata_icside.c 	writeb(state->port[ap->port_no].port_sel, state->ioc_base);
port_sel          422 drivers/ata/pata_icside.c 	state->port[0].port_sel = sel;
port_sel          423 drivers/ata/pata_icside.c 	state->port[1].port_sel = sel | 1;
port_sel          137 drivers/block/paride/ppc6lnx.c 	ppc->cur_ctrl |= port_sel;
port_sel          149 drivers/block/paride/ppc6lnx.c 	ppc->cur_ctrl &= ~port_sel;
port_sel          164 drivers/block/paride/ppc6lnx.c 	ppc->cur_ctrl |= port_sel;
port_sel          189 drivers/block/paride/ppc6lnx.c 				ppc->cur_ctrl &= ~(port_sel | port_init);
port_sel          191 drivers/block/paride/ppc6lnx.c 				ppc->cur_ctrl &= ~port_sel;
port_sel          213 drivers/block/paride/ppc6lnx.c 		ppc->cur_ctrl |= port_sel;
port_sel          219 drivers/block/paride/ppc6lnx.c 	outb((ppc->org_ctrl | port_sel), ppc->lpt_addr + 2);
port_sel         1196 drivers/gpu/drm/i915/display/intel_display.c 		u32 port_sel;
port_sel         1199 drivers/gpu/drm/i915/display/intel_display.c 		port_sel = I915_READ(PP_ON_DELAYS(0)) & PANEL_PORT_SELECT_MASK;
port_sel         1201 drivers/gpu/drm/i915/display/intel_display.c 		switch (port_sel) {
port_sel         1215 drivers/gpu/drm/i915/display/intel_display.c 			MISSING_CASE(port_sel);
port_sel         1223 drivers/gpu/drm/i915/display/intel_display.c 		u32 port_sel;
port_sel         1226 drivers/gpu/drm/i915/display/intel_display.c 		port_sel = I915_READ(PP_ON_DELAYS(0)) & PANEL_PORT_SELECT_MASK;
port_sel         1228 drivers/gpu/drm/i915/display/intel_display.c 		WARN_ON(port_sel != PANEL_PORT_SELECT_LVDS);
port_sel          929 drivers/gpu/drm/i915/display/intel_dp.c 		u32 port_sel = I915_READ(PP_ON_DELAYS(pipe)) &
port_sel          932 drivers/gpu/drm/i915/display/intel_dp.c 		if (port_sel != PANEL_PORT_SELECT_VLV(port))
port_sel         6533 drivers/gpu/drm/i915/display/intel_dp.c 	u32 pp_on, pp_off, port_sel = 0;
port_sel         6576 drivers/gpu/drm/i915/display/intel_dp.c 		port_sel = PANEL_PORT_SELECT_VLV(port);
port_sel         6580 drivers/gpu/drm/i915/display/intel_dp.c 			port_sel = PANEL_PORT_SELECT_DPA;
port_sel         6583 drivers/gpu/drm/i915/display/intel_dp.c 			port_sel = PANEL_PORT_SELECT_DPC;
port_sel         6586 drivers/gpu/drm/i915/display/intel_dp.c 			port_sel = PANEL_PORT_SELECT_DPD;
port_sel         6594 drivers/gpu/drm/i915/display/intel_dp.c 	pp_on |= port_sel;
port_sel          270 drivers/i2c/busses/i2c-piix4.c 	u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status, port_sel;
port_sel          381 drivers/i2c/busses/i2c-piix4.c 		port_sel = inb_p(SB800_PIIX4_SMB_IDX + 1);
port_sel          382 drivers/i2c/busses/i2c-piix4.c 		piix4_port_sel_sb800 = (port_sel & 0x01) ?
port_sel         1550 drivers/rapidio/rio.c 	u32 port_sel = RIO_INVALID_ROUTE;
port_sel         1566 drivers/rapidio/rio.c 			port_sel = (RIO_INVALID_ROUTE << 24) |
port_sel         1578 drivers/rapidio/rio.c 					port_sel);
port_sel          253 drivers/scsi/cxlflash/lunmgt.c 		lli->port_sel |= CHAN2PORTMASK(chan);
port_sel          265 drivers/scsi/cxlflash/lunmgt.c 			lli->port_sel &= ~CHAN2PORTMASK(chan);
port_sel          266 drivers/scsi/cxlflash/lunmgt.c 			if (lli->port_sel == 0U)
port_sel          272 drivers/scsi/cxlflash/lunmgt.c 		__func__, lli->port_sel, chan, lli->lun_id[chan]);
port_sel          501 drivers/scsi/cxlflash/main.c 	cmd->rcb.port_sel = CHAN2PORTMASK(sdev->channel);
port_sel          629 drivers/scsi/cxlflash/main.c 	cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel);
port_sel         1233 drivers/scsi/cxlflash/main.c 	u64 port_sel;
port_sel         1236 drivers/scsi/cxlflash/main.c 	port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel);
port_sel         1237 drivers/scsi/cxlflash/main.c 	port_sel &= ~(1ULL << port);
port_sel         1238 drivers/scsi/cxlflash/main.c 	writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
port_sel         1254 drivers/scsi/cxlflash/main.c 	port_sel |= (1ULL << port);
port_sel         1255 drivers/scsi/cxlflash/main.c 	writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
port_sel         1258 drivers/scsi/cxlflash/main.c 	dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel);
port_sel           48 drivers/scsi/cxlflash/sislite.h 		u32 port_sel;	/* this is a selection mask:
port_sel          523 drivers/scsi/cxlflash/sislite.h 			u8 port_sel;
port_sel          528 drivers/scsi/cxlflash/superpipe.c 			u32 port_sel)
port_sel          552 drivers/scsi/cxlflash/superpipe.c 	dummy.port_sel = port_sel;
port_sel           58 drivers/scsi/cxlflash/superpipe.h 	u32 port_sel;		/* What port to use for this LUN */
port_sel          577 drivers/scsi/cxlflash/vlun.c 				     lli->port_sel));
port_sel          850 drivers/scsi/cxlflash/vlun.c 			if (lli->port_sel & (1 << k)) {
port_sel          900 drivers/scsi/cxlflash/vlun.c 	nports = get_num_ports(lli->port_sel);
port_sel          913 drivers/scsi/cxlflash/vlun.c 			if (!(lli->port_sel & (1 << k)))
port_sel          926 drivers/scsi/cxlflash/vlun.c 			if (!(lli->port_sel & (1 << k)))
port_sel          940 drivers/scsi/cxlflash/vlun.c 		chan = PORTMASK2CHAN(lli->port_sel);
port_sel         1059 drivers/scsi/cxlflash/vlun.c 	if (get_num_ports(lli->port_sel) > 1)