CRTC_INTERLACE_HALVE_V 632 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 174 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 2059 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 210 drivers/gpu/drm/armada/armada_crtc.c drm_mode_set_crtcinfo(adj, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 860 drivers/gpu/drm/drm_modes.c if (adjust_flags & CRTC_INTERLACE_HALVE_V) { CRTC_INTERLACE_HALVE_V 1915 drivers/gpu/drm/drm_modes.c drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 2051 drivers/gpu/drm/drm_modes.c drm_mode_set_crtcinfo(out, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 541 drivers/gpu/drm/drm_probe_helper.c drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 891 drivers/gpu/drm/gma500/cdv_intel_dp.c drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 296 drivers/gpu/drm/gma500/cdv_intel_lvds.c CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 707 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 412 drivers/gpu/drm/gma500/psb_intel_lvds.c CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 250 drivers/gpu/drm/nouveau/dispnv50/head.c drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V | CRTC_STEREO_DOUBLE); CRTC_INTERLACE_HALVE_V 594 drivers/gpu/drm/omapdrm/dss/venc.c drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 1691 drivers/gpu/drm/radeon/radeon_atombios.c drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 1282 drivers/gpu/drm/radeon/radeon_combios.c drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 794 drivers/gpu/drm/radeon/radeon_connectors.c drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); CRTC_INTERLACE_HALVE_V 352 drivers/gpu/drm/radeon/radeon_encoders.c drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);