pm8001_cw32 388 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 1, SPC_IBW_AXI_TRANSLATION_LOW, shiftValue); pm8001_cw32 437 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, offset, 0x80001501); pm8001_cw32 447 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, offset, 0x80001501); pm8001_cw32 465 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, 0xd8, 0x8000C016); pm8001_cw32 502 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, offset, value); pm8001_cw32 512 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, offset, value); pm8001_cw32 531 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPC_MSGU_CFG_TABLE_UPDATE); pm8001_cw32 692 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 1, 0x0033c0, 0x1); pm8001_cw32 693 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 1, 0x0033c4, 0x0); pm8001_cw32 715 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPC_MSGU_CFG_TABLE_RESET); pm8001_cw32 781 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, SPC_RB6_OFFSET, pm8001_cw32 783 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, SPC_RB6_OFFSET, RB6_MAGIC_NUMBER_RST); pm8001_cw32 843 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_IOP, 0x0); pm8001_cw32 855 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_AAP1, 0x0); pm8001_cw32 860 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT_ENABLE, 0x0); pm8001_cw32 865 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT, regVal); pm8001_cw32 870 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT_ENABLE, 0x0); pm8001_cw32 875 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT, regVal); pm8001_cw32 884 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0, signature); pm8001_cw32 912 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, GSM_CONFIG_RESET, regVal); pm8001_cw32 924 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK, 0x0); pm8001_cw32 935 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK, 0x0); pm8001_cw32 946 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK, 0x0); pm8001_cw32 968 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, GPIO_GPIO_0_0UTPUT_CTL_OFFSET, regVal); pm8001_cw32 984 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, SPC_REG_RESET, regVal); pm8001_cw32 992 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, SPC_REG_RESET, regVal); pm8001_cw32 1003 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, SPC_REG_RESET, regVal); pm8001_cw32 1030 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, GSM_CONFIG_RESET, regVal); pm8001_cw32 1042 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK, regVal1); pm8001_cw32 1049 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK, regVal2); pm8001_cw32 1056 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK, regVal3); pm8001_cw32 1073 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 2, SPC_REG_RESET, regVal); pm8001_cw32 1112 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); pm8001_cw32 1113 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); pm8001_cw32 1159 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 1, SPC_REG_RESET, regVal); pm8001_cw32 1167 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 1, SPC_REG_RESET, regVal); pm8001_cw32 1215 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); pm8001_cw32 1216 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); pm8001_cw32 1226 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_MASK_ALL); pm8001_cw32 1243 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 0, msi_index, MSIX_INTERRUPT_ENABLE); pm8001_cw32 1245 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, value); pm8001_cw32 1260 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, 0, msi_index, MSIX_INTERRUPT_DISABLE); pm8001_cw32 1365 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, circularQ->pi_pci_bar, pm8001_cw32 1402 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, circularQ->ci_pci_bar, circularQ->ci_offset, pm8001_cw32 1463 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, pm8001_cw32 1476 drivers/scsi/pm8001/pm8001_hwi.c pm8001_cw32(pm8001_ha, circularQ->ci_pci_bar, pm8001_cw32 54 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, shift_value); pm8001_cw32 119 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, pm8001_cw32 209 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, pm8001_cw32 218 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, pm8001_cw32 669 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_UPDATE); pm8001_cw32 1172 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_RESET); pm8001_cw32 1243 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, SPCv_NORMAL_RESET_VALUE); pm8001_cw32 1325 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, 0x11); pm8001_cw32 1350 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); pm8001_cw32 1351 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); pm8001_cw32 1361 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL); pm8001_cw32 1375 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, (u32)(mask & 0xFFFFFFFF)); pm8001_cw32 1395 drivers/scsi/pm8001/pm80xx_hwi.c pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, (u32)(mask & 0xFFFFFFFF));