plane 118 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane, plane 122 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane, plane 143 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void handle_cursor_update(struct drm_plane *plane, plane 1174 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane; plane 1250 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_plane_in_state(dm->cached_state, plane, new_plane_state, i) { plane 2165 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane; plane 2169 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane = kzalloc(sizeof(struct drm_plane), GFP_KERNEL); plane 2170 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!plane) { plane 2174 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->type = plane_type; plane 2186 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = amdgpu_dm_plane_init(dm, plane, possible_crtcs, plane_cap); plane 2190 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c kfree(plane); plane 2195 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mode_info->planes[plane_id] = plane; plane 2241 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c const struct dc_plane_cap *plane; plane 2258 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane = &dm->dc->caps.planes[i]; plane 2261 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c DRM_PLANE_TYPE_PRIMARY, plane)) { plane 2277 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dc_plane_cap *plane = &dm->dc->caps.planes[i]; plane 2279 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type != DC_PLANE_TYPE_DCN_UNIVERSAL) plane 2282 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!plane->blends_with_above || !plane->blends_with_below) plane 2285 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!plane->pixel_format_support.argb8888) plane 2289 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c DRM_PLANE_TYPE_OVERLAY, plane)) { plane 2900 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane_state->plane->type != DRM_PLANE_TYPE_OVERLAY) plane 4294 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane; plane 4296 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_for_each_plane_mask(plane, dev, new_crtc_state->plane_mask) { plane 4297 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 4307 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane; plane 4310 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_for_each_plane_mask(plane, state->dev, new_crtc_state->plane_mask) { plane 4314 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 4317 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_plane_state = drm_atomic_get_new_plane_state(state, plane); plane 4432 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void dm_drm_plane_reset(struct drm_plane *plane) plane 4436 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->state) plane 4437 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->funcs->atomic_destroy_state(plane, plane->state); plane 4443 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c __drm_atomic_helper_plane_reset(plane, &amdgpu_state->base); plane 4447 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_drm_plane_duplicate_state(struct drm_plane *plane) plane 4451 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c old_dm_plane_state = to_dm_plane_state(plane->state); plane 4456 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c __drm_atomic_helper_plane_duplicate_state(plane, &dm_plane_state->base); plane 4466 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c void dm_drm_plane_destroy_state(struct drm_plane *plane, plane 4474 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_atomic_helper_plane_destroy_state(plane, state); plane 4486 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int dm_plane_helper_prepare_fb(struct drm_plane *plane, plane 4502 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_plane_state_old = to_dm_plane_state(plane->state); plane 4526 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type != DRM_PLANE_TYPE_CURSOR) plane 4571 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void dm_plane_helper_cleanup_fb(struct drm_plane *plane, plane 4592 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int dm_plane_atomic_check(struct drm_plane *plane, plane 4595 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = plane->dev->dev_private; plane 4616 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int dm_plane_atomic_async_check(struct drm_plane *plane, plane 4620 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type != DRM_PLANE_TYPE_CURSOR) plane 4626 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void dm_plane_atomic_async_update(struct drm_plane *plane, plane 4630 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_atomic_get_old_plane_state(new_state->state, plane); plane 4632 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c swap(plane->state->fb, new_state->fb); plane 4634 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->src_x = new_state->src_x; plane 4635 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->src_y = new_state->src_y; plane 4636 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->src_w = new_state->src_w; plane 4637 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->src_h = new_state->src_h; plane 4638 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->crtc_x = new_state->crtc_x; plane 4639 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->crtc_y = new_state->crtc_y; plane 4640 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->crtc_w = new_state->crtc_w; plane 4641 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->crtc_h = new_state->crtc_h; plane 4643 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c handle_cursor_update(plane, old_state); plane 4686 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int get_plane_formats(const struct drm_plane *plane, plane 4698 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c switch (plane->type) { plane 4734 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane, plane 4742 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c num_formats = get_plane_formats(plane, plane_cap, formats, plane 4745 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c res = drm_universal_plane_init(dm->adev->ddev, plane, possible_crtcs, plane 4747 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c NULL, plane->type, NULL); plane 4751 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type == DRM_PLANE_TYPE_OVERLAY && plane 4756 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_plane_create_alpha_property(plane); plane 4757 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_plane_create_blend_mode_property(plane, blend_caps); plane 4760 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type == DRM_PLANE_TYPE_PRIMARY && plane 4764 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane, plane 4772 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_plane_helper_add(plane, &dm_plane_helper_funcs); plane 4775 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->funcs->reset) plane 4776 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->funcs->reset(plane); plane 4782 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane, plane 4804 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane, plane 5362 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc, plane 5373 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!crtc || !plane->state->fb) plane 5376 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if ((plane->state->crtc_w > amdgpu_crtc->max_cursor_width) || plane 5377 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c (plane->state->crtc_h > amdgpu_crtc->max_cursor_height)) { plane 5380 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->crtc_w, plane 5381 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->crtc_h); plane 5385 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c x = plane->state->crtc_x; plane 5386 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c y = plane->state->crtc_y; plane 5415 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void handle_cursor_update(struct drm_plane *plane, plane 5418 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = plane->dev->dev_private; plane 5419 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_framebuffer *afb = to_amdgpu_framebuffer(plane->state->fb); plane 5420 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc = afb ? plane->state->crtc : old_plane_state->crtc; plane 5428 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!plane->state->fb && !old_plane_state->fb) plane 5434 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->crtc_w, plane 5435 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->crtc_h); plane 5437 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = get_cursor_position(plane, crtc, &position); plane 5452 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_crtc->cursor_width = plane->state->crtc_w; plane 5453 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_crtc->cursor_height = plane->state->crtc_h; plane 5458 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c attributes.width = plane->state->crtc_w; plane 5459 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c attributes.height = plane->state->crtc_h; plane 5654 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane; plane 5662 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, plane 5664 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 5665 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c handle_cursor_update(plane, old_plane_state); plane 5677 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane; plane 5717 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { plane 5726 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 5793 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_plane_state->plane->index, plane 5818 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane == pcrtc->primary) plane 6443 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane = disconnected_acrtc->base.primary; plane 6475 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane_state = drm_atomic_get_plane_state(state, plane); plane 6849 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane, plane 6917 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane, plane 6940 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type == DRM_PLANE_TYPE_CURSOR) { plane 6942 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_atomic_plane_disabling(plane->state, new_plane_state)) plane 6957 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c needs_reset = should_reset_plane(state, plane, old_plane_state, plane 6976 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->base.id, old_plane_crtc->base.id); plane 7001 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (drm_atomic_plane_disabling(plane->state, new_plane_state)) plane 7023 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->base.id, new_plane_crtc->base.id); plane 7083 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane; plane 7120 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, j) { plane 7132 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 7265 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_plane *plane; plane 7308 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { plane 7309 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 7322 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_for_each_plane_mask(plane, state->dev, crtc->state->plane_mask) { plane 7323 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 7327 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_atomic_get_plane_state(state, plane); plane 7337 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_plane_in_state_reverse(state, plane, old_plane_state, new_plane_state, i) { plane 7338 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = dm_update_plane_state(dc, state, plane, plane 7370 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_plane_in_state_reverse(state, plane, old_plane_state, new_plane_state, i) { plane 7371 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = dm_update_plane_state(dc, state, plane, plane 987 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c struct dc_plane_state *plane = plane 991 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c if (plane->format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) { plane 993 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c if ((plane->src_rect.width > 1920 || plane 994 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c plane->src_rect.height > 1080)) plane 1163 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c struct dc_plane_state *plane = plane 1167 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (plane->format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) { plane 1169 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (plane->src_rect.width > plane->dst_rect.width || plane 1170 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c plane->src_rect.height > plane->dst_rect.height) plane 1173 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (plane->src_rect.width >= 3840) plane 1177 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (plane->src_rect.width >= 3840) plane 1179 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (!plane->dcc.enable) plane 858 drivers/gpu/drm/amd/display/modules/freesync/freesync.c const struct dc_plane_state *plane, plane 875 drivers/gpu/drm/amd/display/modules/freesync/freesync.c unsigned int oldest_index = plane->time.index + 1; plane 881 drivers/gpu/drm/amd/display/modules/freesync/freesync.c plane->time.prev_update_time_in_us; plane 886 drivers/gpu/drm/amd/display/modules/freesync/freesync.c plane->time.time_elapsed_in_us[i]; plane 889 drivers/gpu/drm/amd/display/modules/freesync/freesync.c plane->time.time_elapsed_in_us[oldest_index]; plane 157 drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h const struct dc_plane_state *plane, plane 16 drivers/gpu/drm/arc/arcpgu.h struct drm_plane *plane; plane 160 drivers/gpu/drm/arc/arcpgu_crtc.c static void arc_pgu_plane_atomic_update(struct drm_plane *plane, plane 166 drivers/gpu/drm/arc/arcpgu_crtc.c if (!plane->state->crtc || !plane->state->fb) plane 169 drivers/gpu/drm/arc/arcpgu_crtc.c arcpgu = crtc_to_arcpgu_priv(plane->state->crtc); plane 170 drivers/gpu/drm/arc/arcpgu_crtc.c gem = drm_fb_cma_get_gem_obj(plane->state->fb, 0); plane 178 drivers/gpu/drm/arc/arcpgu_crtc.c static void arc_pgu_plane_destroy(struct drm_plane *plane) plane 180 drivers/gpu/drm/arc/arcpgu_crtc.c drm_plane_cleanup(plane); plane 195 drivers/gpu/drm/arc/arcpgu_crtc.c struct drm_plane *plane = NULL; plane 199 drivers/gpu/drm/arc/arcpgu_crtc.c plane = devm_kzalloc(drm->dev, sizeof(*plane), GFP_KERNEL); plane 200 drivers/gpu/drm/arc/arcpgu_crtc.c if (!plane) plane 206 drivers/gpu/drm/arc/arcpgu_crtc.c ret = drm_universal_plane_init(drm, plane, 0xff, &arc_pgu_plane_funcs, plane 213 drivers/gpu/drm/arc/arcpgu_crtc.c drm_plane_helper_add(plane, &arc_pgu_plane_helper_funcs); plane 214 drivers/gpu/drm/arc/arcpgu_crtc.c arcpgu->plane = plane; plane 216 drivers/gpu/drm/arc/arcpgu_crtc.c return plane; plane 201 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c struct drm_plane_state *plane_st = state->plane->state; plane 539 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct drm_plane *plane; plane 541 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c drm_for_each_plane(plane, &kms->base) { plane 542 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c if (plane->type != DRM_PLANE_TYPE_PRIMARY) plane 545 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c kplane = to_kplane(plane); plane 548 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c return plane; plane 239 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane) plane 245 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c if (plane >= fb->format->num_planes) { plane 250 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c obj = drm_fb_cma_get_gem_obj(fb, plane); plane 252 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c offset = fb->offsets[plane]; plane 254 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c block_w = drm_format_info_block_width(fb->format, plane); plane 255 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c block_sz = fb->format->char_per_block[plane]; plane 256 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c plane_x = x / (plane ? fb->format->hsub : 1); plane 257 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c plane_y = y / (plane ? fb->format->vsub : 1); plane 260 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c + plane_y * fb->pitches[plane]; plane 44 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane); plane 125 drivers/gpu/drm/arm/display/komeda/komeda_kms.c struct drm_plane *a = node->base.plane; plane 126 drivers/gpu/drm/arm/display/komeda/komeda_kms.c struct drm_plane *b = new->base.plane; plane 148 drivers/gpu/drm/arm/display/komeda/komeda_kms.c struct drm_plane *plane; plane 158 drivers/gpu/drm/arm/display/komeda/komeda_kms.c drm_for_each_plane_mask(plane, crtc->dev, crtc_st->plane_mask) { plane 159 drivers/gpu/drm/arm/display/komeda/komeda_kms.c plane_st = drm_atomic_get_plane_state(state, plane); plane 173 drivers/gpu/drm/arm/display/komeda/komeda_kms.c plane = plane_st->plane; plane 186 drivers/gpu/drm/arm/display/komeda/komeda_kms.c plane->base.id, plane->name, plane 190 drivers/gpu/drm/arm/display/komeda/komeda_kms.c if (has_bit(drm_plane_index(plane), kcrtc->slave_planes)) plane 173 drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h struct drm_plane *plane; plane 337 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c plane_st->state, plane_st->plane, plane_st->crtc); plane 835 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c struct drm_plane *plane = kplane_st->base.plane; plane 840 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c layer->base.name, plane->base.id, plane->name, plane 848 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c err = komeda_scaler_validate(plane, kcrtc_st, dflow); plane 1038 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c struct drm_plane *plane = kplane_st->base.plane; plane 1049 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c plane->base.id, plane->name, plane 1071 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c err = komeda_merger_validate(pipe->merger, plane, kcrtc_st, plane 20 drivers/gpu/drm/arm/display/komeda/komeda_plane.c struct komeda_plane *kplane = to_kplane(st->plane); plane 32 drivers/gpu/drm/arm/display/komeda/komeda_plane.c st->plane->name, st->normalized_zpos, plane 73 drivers/gpu/drm/arm/display/komeda/komeda_plane.c komeda_plane_atomic_check(struct drm_plane *plane, plane 76 drivers/gpu/drm/arm/display/komeda/komeda_plane.c struct komeda_plane *kplane = to_kplane(plane); plane 117 drivers/gpu/drm/arm/display/komeda/komeda_plane.c komeda_plane_atomic_update(struct drm_plane *plane, plane 127 drivers/gpu/drm/arm/display/komeda/komeda_plane.c static void komeda_plane_destroy(struct drm_plane *plane) plane 129 drivers/gpu/drm/arm/display/komeda/komeda_plane.c drm_plane_cleanup(plane); plane 131 drivers/gpu/drm/arm/display/komeda/komeda_plane.c kfree(to_kplane(plane)); plane 134 drivers/gpu/drm/arm/display/komeda/komeda_plane.c static void komeda_plane_reset(struct drm_plane *plane) plane 137 drivers/gpu/drm/arm/display/komeda/komeda_plane.c struct komeda_plane *kplane = to_kplane(plane); plane 139 drivers/gpu/drm/arm/display/komeda/komeda_plane.c if (plane->state) plane 140 drivers/gpu/drm/arm/display/komeda/komeda_plane.c __drm_atomic_helper_plane_destroy_state(plane->state); plane 142 drivers/gpu/drm/arm/display/komeda/komeda_plane.c kfree(plane->state); plane 143 drivers/gpu/drm/arm/display/komeda/komeda_plane.c plane->state = NULL; plane 153 drivers/gpu/drm/arm/display/komeda/komeda_plane.c plane->state = &state->base; plane 154 drivers/gpu/drm/arm/display/komeda/komeda_plane.c plane->state->plane = plane; plane 159 drivers/gpu/drm/arm/display/komeda/komeda_plane.c komeda_plane_atomic_duplicate_state(struct drm_plane *plane) plane 163 drivers/gpu/drm/arm/display/komeda/komeda_plane.c if (WARN_ON(!plane->state)) plane 170 drivers/gpu/drm/arm/display/komeda/komeda_plane.c __drm_atomic_helper_plane_duplicate_state(plane, &new->base); plane 176 drivers/gpu/drm/arm/display/komeda/komeda_plane.c komeda_plane_atomic_destroy_state(struct drm_plane *plane, plane 184 drivers/gpu/drm/arm/display/komeda/komeda_plane.c komeda_plane_format_mod_supported(struct drm_plane *plane, plane 187 drivers/gpu/drm/arm/display/komeda/komeda_plane.c struct komeda_dev *mdev = plane->dev->dev_private; plane 188 drivers/gpu/drm/arm/display/komeda/komeda_plane.c struct komeda_plane *kplane = to_kplane(plane); plane 226 drivers/gpu/drm/arm/display/komeda/komeda_plane.c struct drm_plane *plane) plane 235 drivers/gpu/drm/arm/display/komeda/komeda_plane.c kcrtc->slave_planes |= BIT(drm_plane_index(plane)); plane 254 drivers/gpu/drm/arm/display/komeda/komeda_plane.c struct drm_plane *plane; plane 262 drivers/gpu/drm/arm/display/komeda/komeda_plane.c plane = &kplane->base; plane 268 drivers/gpu/drm/arm/display/komeda/komeda_plane.c err = drm_universal_plane_init(&kms->base, plane, plane 280 drivers/gpu/drm/arm/display/komeda/komeda_plane.c drm_plane_helper_add(plane, &komeda_plane_helper_funcs); plane 282 drivers/gpu/drm/arm/display/komeda/komeda_plane.c err = drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0, plane 287 drivers/gpu/drm/arm/display/komeda/komeda_plane.c err = drm_plane_create_alpha_property(plane); plane 291 drivers/gpu/drm/arm/display/komeda/komeda_plane.c err = drm_plane_create_blend_mode_property(plane, plane 298 drivers/gpu/drm/arm/display/komeda/komeda_plane.c err = drm_plane_create_color_properties(plane, plane 309 drivers/gpu/drm/arm/display/komeda/komeda_plane.c err = drm_plane_create_zpos_property(plane, layer->base.id, 0, 8); plane 313 drivers/gpu/drm/arm/display/komeda/komeda_plane.c komeda_set_crtc_plane_mask(kms, c->pipeline, plane); plane 317 drivers/gpu/drm/arm/display/komeda/komeda_plane.c komeda_plane_destroy(plane); plane 231 drivers/gpu/drm/arm/hdlcd_crtc.c static int hdlcd_plane_atomic_check(struct drm_plane *plane, plane 258 drivers/gpu/drm/arm/hdlcd_crtc.c static void hdlcd_plane_atomic_update(struct drm_plane *plane, plane 261 drivers/gpu/drm/arm/hdlcd_crtc.c struct drm_framebuffer *fb = plane->state->fb; plane 269 drivers/gpu/drm/arm/hdlcd_crtc.c dest_h = drm_rect_height(&plane->state->dst); plane 270 drivers/gpu/drm/arm/hdlcd_crtc.c scanout_start = drm_fb_cma_get_gem_addr(fb, plane->state, 0); plane 272 drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd = plane->dev->dev_private; plane 296 drivers/gpu/drm/arm/hdlcd_crtc.c struct drm_plane *plane = NULL; plane 300 drivers/gpu/drm/arm/hdlcd_crtc.c plane = devm_kzalloc(drm->dev, sizeof(*plane), GFP_KERNEL); plane 301 drivers/gpu/drm/arm/hdlcd_crtc.c if (!plane) plane 307 drivers/gpu/drm/arm/hdlcd_crtc.c ret = drm_universal_plane_init(drm, plane, 0xff, &hdlcd_plane_funcs, plane 314 drivers/gpu/drm/arm/hdlcd_crtc.c drm_plane_helper_add(plane, &hdlcd_plane_helper_funcs); plane 315 drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd->plane = plane; plane 317 drivers/gpu/drm/arm/hdlcd_crtc.c return plane; plane 13 drivers/gpu/drm/arm/hdlcd_drv.h struct drm_plane *plane; plane 254 drivers/gpu/drm/arm/malidp_crtc.c struct drm_plane *plane; plane 271 drivers/gpu/drm/arm/malidp_crtc.c drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { plane 272 drivers/gpu/drm/arm/malidp_crtc.c struct malidp_plane *mp = to_malidp_plane(plane); plane 342 drivers/gpu/drm/arm/malidp_crtc.c struct drm_plane *plane; plane 374 drivers/gpu/drm/arm/malidp_crtc.c drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { plane 390 drivers/gpu/drm/arm/malidp_crtc.c drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { plane 391 drivers/gpu/drm/arm/malidp_crtc.c struct malidp_plane *mp = to_malidp_plane(plane); plane 523 drivers/gpu/drm/arm/malidp_crtc.c struct drm_plane *primary = NULL, *plane; plane 532 drivers/gpu/drm/arm/malidp_crtc.c drm_for_each_plane(plane, drm) { plane 533 drivers/gpu/drm/arm/malidp_crtc.c if (plane->type == DRM_PLANE_TYPE_PRIMARY) { plane 534 drivers/gpu/drm/arm/malidp_crtc.c primary = plane; plane 70 drivers/gpu/drm/arm/malidp_planes.c static void malidp_de_plane_destroy(struct drm_plane *plane) plane 72 drivers/gpu/drm/arm/malidp_planes.c struct malidp_plane *mp = to_malidp_plane(plane); plane 74 drivers/gpu/drm/arm/malidp_planes.c drm_plane_cleanup(plane); plane 83 drivers/gpu/drm/arm/malidp_planes.c static void malidp_plane_reset(struct drm_plane *plane) plane 85 drivers/gpu/drm/arm/malidp_planes.c struct malidp_plane_state *state = to_malidp_plane_state(plane->state); plane 90 drivers/gpu/drm/arm/malidp_planes.c plane->state = NULL; plane 93 drivers/gpu/drm/arm/malidp_planes.c __drm_atomic_helper_plane_reset(plane, &state->base); plane 97 drivers/gpu/drm/arm/malidp_planes.c drm_plane_state *malidp_duplicate_plane_state(struct drm_plane *plane) plane 101 drivers/gpu/drm/arm/malidp_planes.c if (!plane->state) plane 108 drivers/gpu/drm/arm/malidp_planes.c m_state = to_malidp_plane_state(plane->state); plane 109 drivers/gpu/drm/arm/malidp_planes.c __drm_atomic_helper_plane_duplicate_state(plane, &state->base); plane 120 drivers/gpu/drm/arm/malidp_planes.c static void malidp_destroy_plane_state(struct drm_plane *plane, plane 253 drivers/gpu/drm/arm/malidp_planes.c static bool malidp_format_mod_supported_per_plane(struct drm_plane *plane, plane 256 drivers/gpu/drm/arm/malidp_planes.c return malidp_format_mod_supported(plane->dev, format, modifier); plane 504 drivers/gpu/drm/arm/malidp_planes.c static int malidp_de_plane_check(struct drm_plane *plane, plane 507 drivers/gpu/drm/arm/malidp_planes.c struct malidp_plane *mp = to_malidp_plane(plane); plane 682 drivers/gpu/drm/arm/malidp_planes.c static void malidp_de_set_color_encoding(struct malidp_plane *plane, plane 690 drivers/gpu/drm/arm/malidp_planes.c malidp_hw_write(plane->hwdev, malidp_yuv2rgb_coeffs[enc][range][i], plane 691 drivers/gpu/drm/arm/malidp_planes.c plane->layer->base + plane->layer->yuv2rgb_offset + plane 720 drivers/gpu/drm/arm/malidp_planes.c struct drm_plane *plane = &mp->base; plane 733 drivers/gpu/drm/arm/malidp_planes.c paddr = drm_fb_cma_get_gem_addr(fb, plane->state, plane 749 drivers/gpu/drm/arm/malidp_planes.c static void malidp_de_set_plane_afbc(struct drm_plane *plane) plane 753 drivers/gpu/drm/arm/malidp_planes.c struct drm_framebuffer *fb = plane->state->fb; plane 755 drivers/gpu/drm/arm/malidp_planes.c mp = to_malidp_plane(plane); plane 767 drivers/gpu/drm/arm/malidp_planes.c src_w = plane->state->src_w >> 16; plane 768 drivers/gpu/drm/arm/malidp_planes.c src_h = plane->state->src_h >> 16; plane 769 drivers/gpu/drm/arm/malidp_planes.c src_x = plane->state->src_x >> 16; plane 770 drivers/gpu/drm/arm/malidp_planes.c src_y = plane->state->src_y >> 16; plane 791 drivers/gpu/drm/arm/malidp_planes.c static void malidp_de_plane_update(struct drm_plane *plane, plane 795 drivers/gpu/drm/arm/malidp_planes.c struct malidp_plane_state *ms = to_malidp_plane_state(plane->state); plane 796 drivers/gpu/drm/arm/malidp_planes.c struct drm_plane_state *state = plane->state; plane 801 drivers/gpu/drm/arm/malidp_planes.c struct drm_framebuffer *fb = plane->state->fb; plane 803 drivers/gpu/drm/arm/malidp_planes.c mp = to_malidp_plane(plane); plane 833 drivers/gpu/drm/arm/malidp_planes.c if ((plane->state->color_encoding != old_state->color_encoding) || plane 834 drivers/gpu/drm/arm/malidp_planes.c (plane->state->color_range != old_state->color_range)) plane 835 drivers/gpu/drm/arm/malidp_planes.c malidp_de_set_color_encoding(mp, plane->state->color_encoding, plane 836 drivers/gpu/drm/arm/malidp_planes.c plane->state->color_range); plane 860 drivers/gpu/drm/arm/malidp_planes.c malidp_de_set_plane_afbc(plane); plane 868 drivers/gpu/drm/arm/malidp_planes.c val |= ilog2(plane->state->rotation & DRM_MODE_ROTATE_MASK) << plane 909 drivers/gpu/drm/arm/malidp_planes.c static void malidp_de_plane_disable(struct drm_plane *plane, plane 912 drivers/gpu/drm/arm/malidp_planes.c struct malidp_plane *mp = to_malidp_plane(plane); plane 929 drivers/gpu/drm/arm/malidp_planes.c struct malidp_plane *plane = NULL; plane 968 drivers/gpu/drm/arm/malidp_planes.c plane = kzalloc(sizeof(*plane), GFP_KERNEL); plane 969 drivers/gpu/drm/arm/malidp_planes.c if (!plane) { plane 986 drivers/gpu/drm/arm/malidp_planes.c ret = drm_universal_plane_init(drm, &plane->base, crtcs, plane 994 drivers/gpu/drm/arm/malidp_planes.c drm_plane_helper_add(&plane->base, plane 996 drivers/gpu/drm/arm/malidp_planes.c plane->hwdev = malidp->dev; plane 997 drivers/gpu/drm/arm/malidp_planes.c plane->layer = &map->layers[i]; plane 999 drivers/gpu/drm/arm/malidp_planes.c drm_plane_create_alpha_property(&plane->base); plane 1000 drivers/gpu/drm/arm/malidp_planes.c drm_plane_create_blend_mode_property(&plane->base, blend_caps); plane 1007 drivers/gpu/drm/arm/malidp_planes.c drm_plane_create_rotation_property(&plane->base, DRM_MODE_ROTATE_0, flags); plane 1009 drivers/gpu/drm/arm/malidp_planes.c plane->layer->base + MALIDP_LAYER_COMPOSE); plane 1017 drivers/gpu/drm/arm/malidp_planes.c ret = drm_plane_create_color_properties(&plane->base, plane 1026 drivers/gpu/drm/arm/malidp_planes.c malidp_de_set_color_encoding(plane, enc, range); plane 68 drivers/gpu/drm/armada/armada_overlay.c static void armada_drm_overlay_plane_atomic_update(struct drm_plane *plane, plane 71 drivers/gpu/drm/armada/armada_overlay.c struct drm_plane_state *state = plane->state; plane 77 drivers/gpu/drm/armada/armada_overlay.c DRM_DEBUG_KMS("[PLANE:%d:%s]\n", plane->base.id, plane->name); plane 83 drivers/gpu/drm/armada/armada_overlay.c plane->base.id, plane->name, plane 214 drivers/gpu/drm/armada/armada_overlay.c static void armada_drm_overlay_plane_atomic_disable(struct drm_plane *plane, plane 221 drivers/gpu/drm/armada/armada_overlay.c DRM_DEBUG_KMS("[PLANE:%d:%s]\n", plane->base.id, plane->name); plane 227 drivers/gpu/drm/armada/armada_overlay.c plane->base.id, plane->name, plane 251 drivers/gpu/drm/armada/armada_overlay.c armada_overlay_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, plane 261 drivers/gpu/drm/armada/armada_overlay.c trace_armada_ovl_plane_update(plane, crtc, fb, plane 265 drivers/gpu/drm/armada/armada_overlay.c state = drm_atomic_state_alloc(plane->dev); plane 270 drivers/gpu/drm/armada/armada_overlay.c plane_state = drm_atomic_get_plane_state(state, plane); plane 296 drivers/gpu/drm/armada/armada_overlay.c static void armada_ovl_plane_destroy(struct drm_plane *plane) plane 298 drivers/gpu/drm/armada/armada_overlay.c drm_plane_cleanup(plane); plane 299 drivers/gpu/drm/armada/armada_overlay.c kfree(plane); plane 302 drivers/gpu/drm/armada/armada_overlay.c static void armada_overlay_reset(struct drm_plane *plane) plane 306 drivers/gpu/drm/armada/armada_overlay.c if (plane->state) plane 307 drivers/gpu/drm/armada/armada_overlay.c __drm_atomic_helper_plane_destroy_state(plane->state); plane 308 drivers/gpu/drm/armada/armada_overlay.c kfree(plane->state); plane 309 drivers/gpu/drm/armada/armada_overlay.c plane->state = NULL; plane 322 drivers/gpu/drm/armada/armada_overlay.c __drm_atomic_helper_plane_reset(plane, &state->base.base); plane 329 drivers/gpu/drm/armada/armada_overlay.c armada_overlay_duplicate_state(struct drm_plane *plane) plane 333 drivers/gpu/drm/armada/armada_overlay.c if (WARN_ON(!plane->state)) plane 336 drivers/gpu/drm/armada/armada_overlay.c state = kmemdup(plane->state, sizeof(*state), GFP_KERNEL); plane 338 drivers/gpu/drm/armada/armada_overlay.c __drm_atomic_helper_plane_duplicate_state(plane, plane 343 drivers/gpu/drm/armada/armada_overlay.c static int armada_overlay_set_property(struct drm_plane *plane, plane 347 drivers/gpu/drm/armada/armada_overlay.c struct armada_private *priv = plane->dev->dev_private; plane 411 drivers/gpu/drm/armada/armada_overlay.c static int armada_overlay_get_property(struct drm_plane *plane, plane 415 drivers/gpu/drm/armada/armada_overlay.c struct armada_private *priv = plane->dev->dev_private; plane 81 drivers/gpu/drm/armada/armada_plane.c int armada_drm_plane_prepare_fb(struct drm_plane *plane, plane 85 drivers/gpu/drm/armada/armada_plane.c plane->base.id, plane->name, plane 97 drivers/gpu/drm/armada/armada_plane.c void armada_drm_plane_cleanup_fb(struct drm_plane *plane, plane 101 drivers/gpu/drm/armada/armada_plane.c plane->base.id, plane->name, plane 108 drivers/gpu/drm/armada/armada_plane.c int armada_drm_plane_atomic_check(struct drm_plane *plane, plane 158 drivers/gpu/drm/armada/armada_plane.c static void armada_drm_primary_plane_atomic_update(struct drm_plane *plane, plane 161 drivers/gpu/drm/armada/armada_plane.c struct drm_plane_state *state = plane->state; plane 167 drivers/gpu/drm/armada/armada_plane.c DRM_DEBUG_KMS("[PLANE:%d:%s]\n", plane->base.id, plane->name); plane 173 drivers/gpu/drm/armada/armada_plane.c plane->base.id, plane->name, plane 244 drivers/gpu/drm/armada/armada_plane.c static void armada_drm_primary_plane_atomic_disable(struct drm_plane *plane, plane 251 drivers/gpu/drm/armada/armada_plane.c DRM_DEBUG_KMS("[PLANE:%d:%s]\n", plane->base.id, plane->name); plane 257 drivers/gpu/drm/armada/armada_plane.c plane->base.id, plane->name, plane 281 drivers/gpu/drm/armada/armada_plane.c void armada_plane_reset(struct drm_plane *plane) plane 284 drivers/gpu/drm/armada/armada_plane.c if (plane->state) plane 285 drivers/gpu/drm/armada/armada_plane.c __drm_atomic_helper_plane_destroy_state(plane->state); plane 286 drivers/gpu/drm/armada/armada_plane.c kfree(plane->state); plane 289 drivers/gpu/drm/armada/armada_plane.c __drm_atomic_helper_plane_reset(plane, &st->base); plane 292 drivers/gpu/drm/armada/armada_plane.c struct drm_plane_state *armada_plane_duplicate_state(struct drm_plane *plane) plane 296 drivers/gpu/drm/armada/armada_plane.c if (WARN_ON(!plane->state)) plane 299 drivers/gpu/drm/armada/armada_plane.c st = kmemdup(plane->state, sizeof(*st), GFP_KERNEL); plane 301 drivers/gpu/drm/armada/armada_plane.c __drm_atomic_helper_plane_duplicate_state(plane, &st->base); plane 24 drivers/gpu/drm/armada/armada_plane.h int armada_drm_plane_prepare_fb(struct drm_plane *plane, plane 26 drivers/gpu/drm/armada/armada_plane.h void armada_drm_plane_cleanup_fb(struct drm_plane *plane, plane 28 drivers/gpu/drm/armada/armada_plane.h int armada_drm_plane_atomic_check(struct drm_plane *plane, plane 30 drivers/gpu/drm/armada/armada_plane.h void armada_plane_reset(struct drm_plane *plane); plane 31 drivers/gpu/drm/armada/armada_plane.h struct drm_plane_state *armada_plane_duplicate_state(struct drm_plane *plane); plane 32 drivers/gpu/drm/armada/armada_plane.h void armada_plane_destroy_state(struct drm_plane *plane, plane 31 drivers/gpu/drm/armada/armada_trace.h TP_PROTO(struct drm_plane *plane, struct drm_crtc *crtc, plane 35 drivers/gpu/drm/armada/armada_trace.h TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h), plane 37 drivers/gpu/drm/armada/armada_trace.h __field(struct drm_plane *, plane) plane 50 drivers/gpu/drm/armada/armada_trace.h __entry->plane = plane; plane 63 drivers/gpu/drm/armada/armada_trace.h __entry->plane, __entry->crtc, __entry->fb, plane 71 drivers/gpu/drm/armada/armada_trace.h TP_PROTO(struct drm_crtc *crtc, struct drm_plane *plane), plane 72 drivers/gpu/drm/armada/armada_trace.h TP_ARGS(crtc, plane), plane 74 drivers/gpu/drm/armada/armada_trace.h __field(struct drm_plane *, plane) plane 78 drivers/gpu/drm/armada/armada_trace.h __entry->plane = plane; plane 82 drivers/gpu/drm/armada/armada_trace.h __entry->plane, __entry->crtc) plane 167 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c struct drm_framebuffer *fb = pipe->plane.state->fb; plane 411 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h void atmel_hlcdc_plane_irq(struct atmel_hlcdc_plane *plane); plane 272 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_scaler_set_phicoeff(struct atmel_hlcdc_plane *plane, plane 279 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, cfg_offs + i, plane 283 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c void atmel_hlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane, plane 286 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; plane 293 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, plane 307 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_scaler_set_phicoeff(plane, plane 314 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_scaler_set_phicoeff(plane, plane 325 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config, plane 332 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_update_pos_and_size(struct atmel_hlcdc_plane *plane, plane 335 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; plane 338 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.size, plane 343 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, plane 349 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.pos, plane 353 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_setup_scaler(plane, state); plane 357 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane, plane 361 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; plane 371 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_HLCDC_LAYER_DMA_CFG, plane 376 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) { plane 390 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.general_config, plane 394 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c static void atmel_hlcdc_plane_update_format(struct atmel_hlcdc_plane *plane, plane 410 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, plane 414 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c static void atmel_hlcdc_plane_update_clut(struct atmel_hlcdc_plane *plane, plane 434 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_clut(&plane->layer, idx, val); plane 438 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c static void atmel_hlcdc_plane_update_buffers(struct atmel_hlcdc_plane *plane, plane 441 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; plane 446 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c sr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHSR); plane 453 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_reg(&plane->layer, plane 458 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_reg(&plane->layer, plane 461 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_reg(&plane->layer, plane 464 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_reg(&plane->layer, plane 470 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, plane 475 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, plane 484 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c struct drm_plane *plane; plane 486 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c drm_atomic_crtc_state_for_each_plane(plane, c_state) { plane 492 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c plane_s = drm_atomic_get_plane_state(c_state->state, plane); plane 576 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_update_disc_area(struct atmel_hlcdc_plane *plane, plane 581 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c layout = &plane->layer.desc->layout; plane 585 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, layout->disc_pos, plane 589 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, layout->disc_size, plane 597 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p); plane 600 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; plane 718 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p); plane 721 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_IDR, plane 725 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHDR, plane 731 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR); plane 737 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p); plane 750 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_update_pos_and_size(plane, state); plane 751 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_update_general_settings(plane, state); plane 752 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_update_format(plane, state); plane 753 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_update_clut(plane, state); plane 754 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_update_buffers(plane, state); plane 755 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_plane_update_disc_area(plane, state); plane 758 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_IER, plane 764 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c sr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHSR); plane 765 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHER, plane 771 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c static int atmel_hlcdc_plane_init_properties(struct atmel_hlcdc_plane *plane) plane 773 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; plane 779 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c ret = drm_plane_create_alpha_property(&plane->base); plane 787 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c ret = drm_plane_create_rotation_property(&plane->base, plane 802 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, plane 805 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, plane 808 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_write_cfg(&plane->layer, plane 816 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c void atmel_hlcdc_plane_irq(struct atmel_hlcdc_plane *plane) plane 818 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; plane 821 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c isr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR); plane 831 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c dev_dbg(plane->base.dev->dev, "overrun on plane %s\n", plane 954 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c struct atmel_hlcdc_plane *plane; plane 958 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c plane = devm_kzalloc(dev->dev, sizeof(*plane), GFP_KERNEL); plane 959 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (!plane) plane 962 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c atmel_hlcdc_layer_init(&plane->layer, desc, dc->hlcdc->regmap); plane 971 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c ret = drm_universal_plane_init(dev, &plane->base, 0, plane 979 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c drm_plane_helper_add(&plane->base, plane 983 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c ret = atmel_hlcdc_plane_init_properties(plane); plane 987 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c dc->layers[desc->id] = &plane->layer; plane 62 drivers/gpu/drm/bochs/bochs_kms.c bochs_plane_update(bochs, pipe->plane.state); plane 426 drivers/gpu/drm/cirrus/cirrus.c struct drm_plane_state *state = pipe->plane.state; plane 430 drivers/gpu/drm/cirrus/cirrus.c if (pipe->plane.state->fb && plane 431 drivers/gpu/drm/cirrus/cirrus.c cirrus->cpp != cirrus_cpp(pipe->plane.state->fb)) plane 433 drivers/gpu/drm/cirrus/cirrus.c pipe->plane.state->fb); plane 436 drivers/gpu/drm/cirrus/cirrus.c cirrus_fb_blit_rect(pipe->plane.state->fb, &rect); plane 191 drivers/gpu/drm/drm_atomic.c struct drm_plane *plane = state->planes[i].ptr; plane 193 drivers/gpu/drm/drm_atomic.c if (!plane) plane 196 drivers/gpu/drm/drm_atomic.c plane->funcs->atomic_destroy_state(plane, plane 464 drivers/gpu/drm/drm_atomic.c struct drm_plane *plane) plane 466 drivers/gpu/drm/drm_atomic.c int ret, index = drm_plane_index(plane); plane 472 drivers/gpu/drm/drm_atomic.c WARN_ON(plane->fb); plane 473 drivers/gpu/drm/drm_atomic.c WARN_ON(plane->old_fb); plane 474 drivers/gpu/drm/drm_atomic.c WARN_ON(plane->crtc); plane 476 drivers/gpu/drm/drm_atomic.c plane_state = drm_atomic_get_existing_plane_state(state, plane); plane 480 drivers/gpu/drm/drm_atomic.c ret = drm_modeset_lock(&plane->mutex, state->acquire_ctx); plane 484 drivers/gpu/drm/drm_atomic.c plane_state = plane->funcs->atomic_duplicate_state(plane); plane 489 drivers/gpu/drm/drm_atomic.c state->planes[index].ptr = plane; plane 490 drivers/gpu/drm/drm_atomic.c state->planes[index].old_state = plane->state; plane 495 drivers/gpu/drm/drm_atomic.c plane->base.id, plane->name, plane_state, state); plane 541 drivers/gpu/drm/drm_atomic.c struct drm_plane *plane = new_plane_state->plane; plane 552 drivers/gpu/drm/drm_atomic.c plane->base.id, plane->name); plane 556 drivers/gpu/drm/drm_atomic.c plane->base.id, plane->name); plane 565 drivers/gpu/drm/drm_atomic.c if (!(plane->possible_crtcs & drm_crtc_mask(crtc))) { plane 568 drivers/gpu/drm/drm_atomic.c plane->base.id, plane->name); plane 573 drivers/gpu/drm/drm_atomic.c ret = drm_plane_check_pixel_format(plane, fb->format->format, plane 578 drivers/gpu/drm/drm_atomic.c plane->base.id, plane->name, plane 591 drivers/gpu/drm/drm_atomic.c plane->base.id, plane->name, plane 607 drivers/gpu/drm/drm_atomic.c plane->base.id, plane->name, plane 632 drivers/gpu/drm/drm_atomic.c plane->base.id, plane->name, clips->x1, plane 642 drivers/gpu/drm/drm_atomic.c plane->base.id, plane->name); plane 652 drivers/gpu/drm/drm_atomic.c struct drm_plane *plane = state->plane; plane 656 drivers/gpu/drm/drm_atomic.c drm_printf(p, "plane[%u]: %s\n", plane->base.id, plane->name); plane 670 drivers/gpu/drm/drm_atomic.c if (plane->funcs->atomic_print_state) plane 671 drivers/gpu/drm/drm_atomic.c plane->funcs->atomic_print_state(p, state); plane 1104 drivers/gpu/drm/drm_atomic.c struct drm_plane *plane; plane 1111 drivers/gpu/drm/drm_atomic.c drm_for_each_plane_mask(plane, state->dev, old_crtc_state->plane_mask) { plane 1113 drivers/gpu/drm/drm_atomic.c drm_atomic_get_plane_state(state, plane); plane 1137 drivers/gpu/drm/drm_atomic.c struct drm_plane *plane; plane 1149 drivers/gpu/drm/drm_atomic.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { plane 1153 drivers/gpu/drm/drm_atomic.c plane->base.id, plane->name); plane 1259 drivers/gpu/drm/drm_atomic.c int __drm_atomic_helper_disable_plane(struct drm_plane *plane, plane 1429 drivers/gpu/drm/drm_atomic.c struct drm_plane *plane; plane 1439 drivers/gpu/drm/drm_atomic.c for_each_new_plane_in_state(state, plane, plane_state, i) plane 1453 drivers/gpu/drm/drm_atomic.c struct drm_plane *plane; plane 1461 drivers/gpu/drm/drm_atomic.c list_for_each_entry(plane, &config->plane_list, head) { plane 1463 drivers/gpu/drm/drm_atomic.c drm_modeset_lock(&plane->mutex, NULL); plane 1464 drivers/gpu/drm/drm_atomic.c drm_atomic_plane_print_state(p, plane->state); plane 1466 drivers/gpu/drm/drm_atomic.c drm_modeset_unlock(&plane->mutex); plane 76 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane) plane 864 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 868 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { plane 871 drivers/gpu/drm/drm_atomic_helper.c WARN_ON(!drm_modeset_is_locked(&plane->mutex)); plane 873 drivers/gpu/drm/drm_atomic_helper.c funcs = plane->helper_private; plane 875 drivers/gpu/drm/drm_atomic_helper.c drm_atomic_helper_plane_changed(state, old_plane_state, new_plane_state, plane); plane 882 drivers/gpu/drm/drm_atomic_helper.c ret = funcs->atomic_check(plane, new_plane_state); plane 885 drivers/gpu/drm/drm_atomic_helper.c plane->base.id, plane->name); plane 1388 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 1392 drivers/gpu/drm/drm_atomic_helper.c for_each_new_plane_in_state(state, plane, new_plane_state, i) { plane 1659 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane = NULL; plane 1670 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) plane 1681 drivers/gpu/drm/drm_atomic_helper.c funcs = plane->helper_private; plane 1697 drivers/gpu/drm/drm_atomic_helper.c return funcs->atomic_async_check(plane, new_plane_state); plane 1717 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 1722 drivers/gpu/drm/drm_atomic_helper.c for_each_new_plane_in_state(state, plane, plane_state, i) { plane 1724 drivers/gpu/drm/drm_atomic_helper.c struct drm_framebuffer *old_fb = plane->state->fb; plane 1726 drivers/gpu/drm/drm_atomic_helper.c funcs = plane->helper_private; plane 1727 drivers/gpu/drm/drm_atomic_helper.c funcs->atomic_async_update(plane, plane_state); plane 1734 drivers/gpu/drm/drm_atomic_helper.c WARN_ON_ONCE(plane->state->fb != new_fb); plane 1735 drivers/gpu/drm/drm_atomic_helper.c WARN_ON_ONCE(plane->state->crtc_x != plane_state->crtc_x); plane 1736 drivers/gpu/drm/drm_atomic_helper.c WARN_ON_ONCE(plane->state->crtc_y != plane_state->crtc_y); plane 1737 drivers/gpu/drm/drm_atomic_helper.c WARN_ON_ONCE(plane->state->src_x != plane_state->src_x); plane 1738 drivers/gpu/drm/drm_atomic_helper.c WARN_ON_ONCE(plane->state->src_y != plane_state->src_y); plane 2020 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 2086 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { plane 2121 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 2171 drivers/gpu/drm/drm_atomic_helper.c for_each_old_plane_in_state(old_state, plane, old_plane_state, i) { plane 2181 drivers/gpu/drm/drm_atomic_helper.c plane->base.id, plane->name); plane 2189 drivers/gpu/drm/drm_atomic_helper.c plane->base.id, plane->name); plane 2338 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 2351 drivers/gpu/drm/drm_atomic_helper.c for_each_new_plane_in_state(state, plane, new_plane_state, i) { plane 2354 drivers/gpu/drm/drm_atomic_helper.c funcs = plane->helper_private; plane 2357 drivers/gpu/drm/drm_atomic_helper.c ret = funcs->prepare_fb(plane, new_plane_state); plane 2366 drivers/gpu/drm/drm_atomic_helper.c for_each_new_plane_in_state(state, plane, new_plane_state, j) { plane 2372 drivers/gpu/drm/drm_atomic_helper.c funcs = plane->helper_private; plane 2375 drivers/gpu/drm/drm_atomic_helper.c funcs->cleanup_fb(plane, new_plane_state); plane 2434 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 2454 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_plane_in_state(old_state, plane, old_plane_state, new_plane_state, i) { plane 2458 drivers/gpu/drm/drm_atomic_helper.c funcs = plane->helper_private; plane 2492 drivers/gpu/drm/drm_atomic_helper.c funcs->atomic_disable(plane, old_plane_state); plane 2494 drivers/gpu/drm/drm_atomic_helper.c funcs->atomic_update(plane, old_plane_state); plane 2539 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 2549 drivers/gpu/drm/drm_atomic_helper.c drm_for_each_plane_mask(plane, crtc->dev, plane_mask) { plane 2551 drivers/gpu/drm/drm_atomic_helper.c drm_atomic_get_old_plane_state(old_state, plane); plane 2553 drivers/gpu/drm/drm_atomic_helper.c drm_atomic_get_new_plane_state(old_state, plane); plane 2556 drivers/gpu/drm/drm_atomic_helper.c plane_funcs = plane->helper_private; plane 2566 drivers/gpu/drm/drm_atomic_helper.c plane_funcs->atomic_disable(plane, old_plane_state); plane 2569 drivers/gpu/drm/drm_atomic_helper.c plane_funcs->atomic_update(plane, old_plane_state); plane 2600 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 2605 drivers/gpu/drm/drm_atomic_helper.c drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) { plane 2607 drivers/gpu/drm/drm_atomic_helper.c plane->helper_private; plane 2614 drivers/gpu/drm/drm_atomic_helper.c plane_funcs->atomic_disable(plane, NULL); plane 2637 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 2641 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_plane_in_state(old_state, plane, old_plane_state, new_plane_state, i) { plane 2649 drivers/gpu/drm/drm_atomic_helper.c if (old_plane_state == plane->state) plane 2654 drivers/gpu/drm/drm_atomic_helper.c funcs = plane->helper_private; plane 2657 drivers/gpu/drm/drm_atomic_helper.c funcs->cleanup_fb(plane, plane_state); plane 2705 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 2743 drivers/gpu/drm/drm_atomic_helper.c for_each_old_plane_in_state(state, plane, old_plane_state, i) { plane 2784 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { plane 2785 drivers/gpu/drm/drm_atomic_helper.c WARN_ON(plane->state != old_plane_state); plane 2791 drivers/gpu/drm/drm_atomic_helper.c plane->state = new_plane_state; plane 2828 drivers/gpu/drm/drm_atomic_helper.c int drm_atomic_helper_update_plane(struct drm_plane *plane, plane 2841 drivers/gpu/drm/drm_atomic_helper.c state = drm_atomic_state_alloc(plane->dev); plane 2846 drivers/gpu/drm/drm_atomic_helper.c plane_state = drm_atomic_get_plane_state(state, plane); plane 2865 drivers/gpu/drm/drm_atomic_helper.c if (plane == crtc->cursor) plane 2885 drivers/gpu/drm/drm_atomic_helper.c int drm_atomic_helper_disable_plane(struct drm_plane *plane, plane 2892 drivers/gpu/drm/drm_atomic_helper.c state = drm_atomic_state_alloc(plane->dev); plane 2897 drivers/gpu/drm/drm_atomic_helper.c plane_state = drm_atomic_get_plane_state(state, plane); plane 2903 drivers/gpu/drm/drm_atomic_helper.c if (plane_state->crtc && plane_state->crtc->cursor == plane) plane 2906 drivers/gpu/drm/drm_atomic_helper.c ret = __drm_atomic_helper_disable_plane(plane, plane_state); plane 2991 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 3030 drivers/gpu/drm/drm_atomic_helper.c for_each_new_plane_in_state(state, plane, plane_state, i) { plane 3102 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 3123 drivers/gpu/drm/drm_atomic_helper.c drm_for_each_plane(plane, dev) { plane 3126 drivers/gpu/drm/drm_atomic_helper.c plane_state = drm_atomic_get_plane_state(state, plane); plane 3234 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane; plane 3243 drivers/gpu/drm/drm_atomic_helper.c for_each_new_plane_in_state(state, plane, new_plane_state, i) plane 3244 drivers/gpu/drm/drm_atomic_helper.c state->planes[i].old_state = plane->state; plane 3301 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane = crtc->primary; plane 3313 drivers/gpu/drm/drm_atomic_helper.c plane_state = drm_atomic_get_plane_state(state, plane); plane 3356 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane = crtc->primary; plane 3360 drivers/gpu/drm/drm_atomic_helper.c state = drm_atomic_state_alloc(plane->dev); plane 3400 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane = crtc->primary; plane 3405 drivers/gpu/drm/drm_atomic_helper.c state = drm_atomic_state_alloc(plane->dev); plane 222 drivers/gpu/drm/drm_atomic_state_helper.c void __drm_atomic_helper_plane_reset(struct drm_plane *plane, plane 225 drivers/gpu/drm/drm_atomic_state_helper.c state->plane = plane; plane 231 drivers/gpu/drm/drm_atomic_state_helper.c plane->state = state; plane 242 drivers/gpu/drm/drm_atomic_state_helper.c void drm_atomic_helper_plane_reset(struct drm_plane *plane) plane 244 drivers/gpu/drm/drm_atomic_state_helper.c if (plane->state) plane 245 drivers/gpu/drm/drm_atomic_state_helper.c __drm_atomic_helper_plane_destroy_state(plane->state); plane 247 drivers/gpu/drm/drm_atomic_state_helper.c kfree(plane->state); plane 248 drivers/gpu/drm/drm_atomic_state_helper.c plane->state = kzalloc(sizeof(*plane->state), GFP_KERNEL); plane 249 drivers/gpu/drm/drm_atomic_state_helper.c if (plane->state) plane 250 drivers/gpu/drm/drm_atomic_state_helper.c __drm_atomic_helper_plane_reset(plane, plane->state); plane 262 drivers/gpu/drm/drm_atomic_state_helper.c void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane, plane 265 drivers/gpu/drm/drm_atomic_state_helper.c memcpy(state, plane->state, sizeof(*state)); plane 284 drivers/gpu/drm/drm_atomic_state_helper.c drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane) plane 288 drivers/gpu/drm/drm_atomic_state_helper.c if (WARN_ON(!plane->state)) plane 293 drivers/gpu/drm/drm_atomic_state_helper.c __drm_atomic_helper_plane_duplicate_state(plane, state); plane 330 drivers/gpu/drm/drm_atomic_state_helper.c void drm_atomic_helper_plane_destroy_state(struct drm_plane *plane, plane 180 drivers/gpu/drm/drm_atomic_uapi.c struct drm_plane *plane = plane_state->plane; plane 191 drivers/gpu/drm/drm_atomic_uapi.c crtc_state->plane_mask &= ~drm_plane_mask(plane); plane 201 drivers/gpu/drm/drm_atomic_uapi.c crtc_state->plane_mask |= drm_plane_mask(plane); plane 206 drivers/gpu/drm/drm_atomic_uapi.c plane->base.id, plane->name, plane_state, plane 210 drivers/gpu/drm/drm_atomic_uapi.c plane->base.id, plane->name, plane_state); plane 230 drivers/gpu/drm/drm_atomic_uapi.c struct drm_plane *plane = plane_state->plane; plane 234 drivers/gpu/drm/drm_atomic_uapi.c fb->base.id, plane->base.id, plane->name, plane 238 drivers/gpu/drm/drm_atomic_uapi.c plane->base.id, plane->name, plane_state); plane 514 drivers/gpu/drm/drm_atomic_uapi.c static int drm_atomic_plane_set_property(struct drm_plane *plane, plane 518 drivers/gpu/drm/drm_atomic_uapi.c struct drm_device *dev = plane->dev; plane 561 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->alpha_property) { plane 563 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->blend_mode_property) { plane 565 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->rotation_property) { plane 568 drivers/gpu/drm/drm_atomic_uapi.c plane->base.id, plane->name, val); plane 572 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->zpos_property) { plane 574 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->color_encoding_property) { plane 576 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->color_range_property) { plane 586 drivers/gpu/drm/drm_atomic_uapi.c } else if (plane->funcs->atomic_set_property) { plane 587 drivers/gpu/drm/drm_atomic_uapi.c return plane->funcs->atomic_set_property(plane, state, plane 591 drivers/gpu/drm/drm_atomic_uapi.c plane->base.id, plane->name, plane 600 drivers/gpu/drm/drm_atomic_uapi.c drm_atomic_plane_get_property(struct drm_plane *plane, plane 604 drivers/gpu/drm/drm_atomic_uapi.c struct drm_device *dev = plane->dev; plane 629 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->alpha_property) { plane 631 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->blend_mode_property) { plane 633 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->rotation_property) { plane 635 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->zpos_property) { plane 637 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->color_encoding_property) { plane 639 drivers/gpu/drm/drm_atomic_uapi.c } else if (property == plane->color_range_property) { plane 644 drivers/gpu/drm/drm_atomic_uapi.c } else if (plane->funcs->atomic_get_property) { plane 645 drivers/gpu/drm/drm_atomic_uapi.c return plane->funcs->atomic_get_property(plane, state, property, val); plane 877 drivers/gpu/drm/drm_atomic_uapi.c struct drm_plane *plane = obj_to_plane(obj); plane 878 drivers/gpu/drm/drm_atomic_uapi.c WARN_ON(!drm_modeset_is_locked(&plane->mutex)); plane 879 drivers/gpu/drm/drm_atomic_uapi.c ret = drm_atomic_plane_get_property(plane, plane 880 drivers/gpu/drm/drm_atomic_uapi.c plane->state, property, val); plane 1005 drivers/gpu/drm/drm_atomic_uapi.c struct drm_plane *plane = obj_to_plane(obj); plane 1008 drivers/gpu/drm/drm_atomic_uapi.c plane_state = drm_atomic_get_plane_state(state, plane); plane 1014 drivers/gpu/drm/drm_atomic_uapi.c ret = drm_atomic_plane_set_property(plane, plane 199 drivers/gpu/drm/drm_blend.c int drm_plane_create_alpha_property(struct drm_plane *plane) plane 203 drivers/gpu/drm/drm_blend.c prop = drm_property_create_range(plane->dev, 0, "alpha", plane 208 drivers/gpu/drm/drm_blend.c drm_object_attach_property(&plane->base, prop, DRM_BLEND_ALPHA_OPAQUE); plane 209 drivers/gpu/drm/drm_blend.c plane->alpha_property = prop; plane 211 drivers/gpu/drm/drm_blend.c if (plane->state) plane 212 drivers/gpu/drm/drm_blend.c plane->state->alpha = DRM_BLEND_ALPHA_OPAQUE; plane 252 drivers/gpu/drm/drm_blend.c int drm_plane_create_rotation_property(struct drm_plane *plane, plane 270 drivers/gpu/drm/drm_blend.c prop = drm_property_create_bitmask(plane->dev, 0, "rotation", plane 276 drivers/gpu/drm/drm_blend.c drm_object_attach_property(&plane->base, prop, rotation); plane 278 drivers/gpu/drm/drm_blend.c if (plane->state) plane 279 drivers/gpu/drm/drm_blend.c plane->state->rotation = rotation; plane 281 drivers/gpu/drm/drm_blend.c plane->rotation_property = prop; plane 349 drivers/gpu/drm/drm_blend.c int drm_plane_create_zpos_property(struct drm_plane *plane, plane 355 drivers/gpu/drm/drm_blend.c prop = drm_property_create_range(plane->dev, 0, "zpos", min, max); plane 359 drivers/gpu/drm/drm_blend.c drm_object_attach_property(&plane->base, prop, zpos); plane 361 drivers/gpu/drm/drm_blend.c plane->zpos_property = prop; plane 363 drivers/gpu/drm/drm_blend.c if (plane->state) { plane 364 drivers/gpu/drm/drm_blend.c plane->state->zpos = zpos; plane 365 drivers/gpu/drm/drm_blend.c plane->state->normalized_zpos = zpos; plane 388 drivers/gpu/drm/drm_blend.c int drm_plane_create_zpos_immutable_property(struct drm_plane *plane, plane 393 drivers/gpu/drm/drm_blend.c prop = drm_property_create_range(plane->dev, DRM_MODE_PROP_IMMUTABLE, plane 398 drivers/gpu/drm/drm_blend.c drm_object_attach_property(&plane->base, prop, zpos); plane 400 drivers/gpu/drm/drm_blend.c plane->zpos_property = prop; plane 402 drivers/gpu/drm/drm_blend.c if (plane->state) { plane 403 drivers/gpu/drm/drm_blend.c plane->state->zpos = zpos; plane 404 drivers/gpu/drm/drm_blend.c plane->state->normalized_zpos = zpos; plane 419 drivers/gpu/drm/drm_blend.c return sa->plane->base.id - sb->plane->base.id; plane 429 drivers/gpu/drm/drm_blend.c struct drm_plane *plane; plane 444 drivers/gpu/drm/drm_blend.c drm_for_each_plane_mask(plane, dev, crtc_state->plane_mask) { plane 446 drivers/gpu/drm/drm_blend.c drm_atomic_get_plane_state(state, plane); plane 453 drivers/gpu/drm/drm_blend.c plane->base.id, plane->name, plane 460 drivers/gpu/drm/drm_blend.c plane = states[i]->plane; plane 464 drivers/gpu/drm/drm_blend.c plane->base.id, plane->name, i); plane 496 drivers/gpu/drm/drm_blend.c struct drm_plane *plane; plane 500 drivers/gpu/drm/drm_blend.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { plane 552 drivers/gpu/drm/drm_blend.c int drm_plane_create_blend_mode_property(struct drm_plane *plane, plane 555 drivers/gpu/drm/drm_blend.c struct drm_device *dev = plane->dev; plane 593 drivers/gpu/drm/drm_blend.c drm_object_attach_property(&plane->base, prop, DRM_MODE_BLEND_PREMULTI); plane 594 drivers/gpu/drm/drm_blend.c plane->blend_mode_property = prop; plane 827 drivers/gpu/drm/drm_client_modeset.c struct drm_plane *plane = modeset->crtc->primary; plane 885 drivers/gpu/drm/drm_client_modeset.c !plane->rotation_property) plane 888 drivers/gpu/drm/drm_client_modeset.c for (i = 0; i < plane->rotation_property->num_values; i++) plane 889 drivers/gpu/drm/drm_client_modeset.c valid_mask |= (1ULL << plane->rotation_property->values[i]); plane 901 drivers/gpu/drm/drm_client_modeset.c struct drm_plane *plane; plane 917 drivers/gpu/drm/drm_client_modeset.c drm_for_each_plane(plane, dev) { plane 920 drivers/gpu/drm/drm_client_modeset.c plane_state = drm_atomic_get_plane_state(state, plane); plane 929 drivers/gpu/drm/drm_client_modeset.c if (plane->type == DRM_PLANE_TYPE_PRIMARY) plane 932 drivers/gpu/drm/drm_client_modeset.c ret = __drm_atomic_helper_disable_plane(plane, plane_state); plane 989 drivers/gpu/drm/drm_client_modeset.c struct drm_plane *plane; plane 993 drivers/gpu/drm/drm_client_modeset.c drm_for_each_plane(plane, dev) { plane 994 drivers/gpu/drm/drm_client_modeset.c if (plane->type != DRM_PLANE_TYPE_PRIMARY) plane 995 drivers/gpu/drm/drm_client_modeset.c drm_plane_force_disable(plane); plane 997 drivers/gpu/drm/drm_client_modeset.c if (plane->rotation_property) plane 998 drivers/gpu/drm/drm_client_modeset.c drm_mode_plane_set_obj_prop(plane, plane 999 drivers/gpu/drm/drm_client_modeset.c plane->rotation_property, plane 406 drivers/gpu/drm/drm_color_mgmt.c int drm_plane_create_color_properties(struct drm_plane *plane, plane 412 drivers/gpu/drm/drm_color_mgmt.c struct drm_device *dev = plane->dev; plane 442 drivers/gpu/drm/drm_color_mgmt.c plane->color_encoding_property = prop; plane 443 drivers/gpu/drm/drm_color_mgmt.c drm_object_attach_property(&plane->base, prop, default_encoding); plane 444 drivers/gpu/drm/drm_color_mgmt.c if (plane->state) plane 445 drivers/gpu/drm/drm_color_mgmt.c plane->state->color_encoding = default_encoding; plane 461 drivers/gpu/drm/drm_color_mgmt.c plane->color_range_property = prop; plane 462 drivers/gpu/drm/drm_color_mgmt.c drm_object_attach_property(&plane->base, prop, default_range); plane 463 drivers/gpu/drm/drm_color_mgmt.c if (plane->state) plane 464 drivers/gpu/drm/drm_color_mgmt.c plane->state->color_range = default_range; plane 364 drivers/gpu/drm/drm_crtc.c struct drm_plane *plane; plane 373 drivers/gpu/drm/drm_crtc.c plane = crtc->primary; plane 377 drivers/gpu/drm/drm_crtc.c drm_modeset_lock(&plane->mutex, NULL); plane 378 drivers/gpu/drm/drm_crtc.c if (plane->state && plane->state->fb) plane 379 drivers/gpu/drm/drm_crtc.c crtc_resp->fb_id = plane->state->fb->base.id; plane 380 drivers/gpu/drm/drm_crtc.c else if (!plane->state && plane->fb) plane 381 drivers/gpu/drm/drm_crtc.c crtc_resp->fb_id = plane->fb->base.id; plane 385 drivers/gpu/drm/drm_crtc.c if (plane->state) { plane 386 drivers/gpu/drm/drm_crtc.c crtc_resp->x = plane->state->src_x >> 16; plane 387 drivers/gpu/drm/drm_crtc.c crtc_resp->y = plane->state->src_y >> 16; plane 389 drivers/gpu/drm/drm_crtc.c drm_modeset_unlock(&plane->mutex); plane 434 drivers/gpu/drm/drm_crtc.c struct drm_plane *plane = tmp->primary; plane 436 drivers/gpu/drm/drm_crtc.c plane->old_fb = plane->fb; plane 443 drivers/gpu/drm/drm_crtc.c struct drm_plane *plane = crtc->primary; plane 445 drivers/gpu/drm/drm_crtc.c plane->crtc = fb ? crtc : NULL; plane 446 drivers/gpu/drm/drm_crtc.c plane->fb = fb; plane 450 drivers/gpu/drm/drm_crtc.c struct drm_plane *plane = tmp->primary; plane 452 drivers/gpu/drm/drm_crtc.c if (plane->fb) plane 453 drivers/gpu/drm/drm_crtc.c drm_framebuffer_get(plane->fb); plane 454 drivers/gpu/drm/drm_crtc.c if (plane->old_fb) plane 455 drivers/gpu/drm/drm_crtc.c drm_framebuffer_put(plane->old_fb); plane 456 drivers/gpu/drm/drm_crtc.c plane->old_fb = NULL; plane 531 drivers/gpu/drm/drm_crtc.c struct drm_plane *plane; plane 558 drivers/gpu/drm/drm_crtc.c plane = crtc->primary; plane 561 drivers/gpu/drm/drm_crtc.c if (crtc_req->mode_valid && !drm_lease_held(file_priv, plane->base.id)) plane 574 drivers/gpu/drm/drm_crtc.c if (plane->state) plane 575 drivers/gpu/drm/drm_crtc.c old_fb = plane->state->fb; plane 577 drivers/gpu/drm/drm_crtc.c old_fb = plane->fb; plane 626 drivers/gpu/drm/drm_crtc.c if (!plane->format_default) { plane 627 drivers/gpu/drm/drm_crtc.c ret = drm_plane_check_pixel_format(plane, plane 228 drivers/gpu/drm/drm_crtc_internal.h int __drm_atomic_helper_disable_plane(struct drm_plane *plane, plane 255 drivers/gpu/drm/drm_crtc_internal.h int drm_plane_check_pixel_format(struct drm_plane *plane, plane 96 drivers/gpu/drm/drm_damage_helper.c void drm_plane_enable_fb_damage_clips(struct drm_plane *plane) plane 98 drivers/gpu/drm/drm_damage_helper.c struct drm_device *dev = plane->dev; plane 101 drivers/gpu/drm/drm_damage_helper.c drm_object_attach_property(&plane->base, config->prop_fb_damage_clips, plane 169 drivers/gpu/drm/drm_damage_helper.c struct drm_plane *plane; plane 212 drivers/gpu/drm/drm_damage_helper.c drm_for_each_plane(plane, fb->dev) { plane 215 drivers/gpu/drm/drm_damage_helper.c ret = drm_modeset_lock(&plane->mutex, state->acquire_ctx); plane 219 drivers/gpu/drm/drm_damage_helper.c if (plane->state->fb != fb) { plane 220 drivers/gpu/drm/drm_damage_helper.c drm_modeset_unlock(&plane->mutex); plane 224 drivers/gpu/drm/drm_damage_helper.c plane_state = drm_atomic_get_plane_state(state, plane); plane 39 drivers/gpu/drm/drm_fb_cma_helper.c unsigned int plane) plane 43 drivers/gpu/drm/drm_fb_cma_helper.c gem = drm_gem_fb_get_obj(fb, plane); plane 64 drivers/gpu/drm/drm_fb_cma_helper.c unsigned int plane) plane 69 drivers/gpu/drm/drm_fb_cma_helper.c u32 block_w = drm_format_info_block_width(fb->format, plane); plane 70 drivers/gpu/drm/drm_fb_cma_helper.c u32 block_h = drm_format_info_block_height(fb->format, plane); plane 71 drivers/gpu/drm/drm_fb_cma_helper.c u32 block_size = fb->format->char_per_block[plane]; plane 77 drivers/gpu/drm/drm_fb_cma_helper.c obj = drm_fb_cma_get_gem_obj(fb, plane); plane 81 drivers/gpu/drm/drm_fb_cma_helper.c paddr = obj->paddr + fb->offsets[plane]; plane 83 drivers/gpu/drm/drm_fb_cma_helper.c if (plane > 0) { plane 93 drivers/gpu/drm/drm_fb_cma_helper.c paddr += fb->pitches[plane] * block_start_y; plane 1553 drivers/gpu/drm/drm_fb_helper.c struct drm_plane *plane = crtc->primary; plane 1558 drivers/gpu/drm/drm_fb_helper.c for (j = 0; j < plane->format_count; j++) { plane 1561 drivers/gpu/drm/drm_fb_helper.c fmt = drm_format_info(plane->format_types[j]); plane 344 drivers/gpu/drm/drm_fourcc.c int plane) plane 346 drivers/gpu/drm/drm_fourcc.c if (!info || plane < 0 || plane >= info->num_planes) plane 349 drivers/gpu/drm/drm_fourcc.c if (!info->block_w[plane]) plane 351 drivers/gpu/drm/drm_fourcc.c return info->block_w[plane]; plane 364 drivers/gpu/drm/drm_fourcc.c int plane) plane 366 drivers/gpu/drm/drm_fourcc.c if (!info || plane < 0 || plane >= info->num_planes) plane 369 drivers/gpu/drm/drm_fourcc.c if (!info->block_h[plane]) plane 371 drivers/gpu/drm/drm_fourcc.c return info->block_h[plane]; plane 386 drivers/gpu/drm/drm_fourcc.c int plane, unsigned int buffer_width) plane 388 drivers/gpu/drm/drm_fourcc.c if (!info || plane < 0 || plane >= info->num_planes) plane 391 drivers/gpu/drm/drm_fourcc.c return DIV_ROUND_UP_ULL((u64)buffer_width * info->char_per_block[plane], plane 392 drivers/gpu/drm/drm_fourcc.c drm_format_info_block_width(info, plane) * plane 393 drivers/gpu/drm/drm_fourcc.c drm_format_info_block_height(info, plane)); plane 154 drivers/gpu/drm/drm_framebuffer.c const struct drm_format_info *format, int plane) plane 156 drivers/gpu/drm/drm_framebuffer.c if (plane == 0) plane 163 drivers/gpu/drm/drm_framebuffer.c const struct drm_format_info *format, int plane) plane 165 drivers/gpu/drm/drm_framebuffer.c if (plane == 0) plane 837 drivers/gpu/drm/drm_framebuffer.c struct drm_plane *plane; plane 860 drivers/gpu/drm/drm_framebuffer.c drm_for_each_plane(plane, dev) { plane 863 drivers/gpu/drm/drm_framebuffer.c if (plane->state->fb != fb) plane 866 drivers/gpu/drm/drm_framebuffer.c plane_state = drm_atomic_get_plane_state(state, plane); plane 872 drivers/gpu/drm/drm_framebuffer.c if (disable_crtcs && plane_state->crtc->primary == plane) { plane 892 drivers/gpu/drm/drm_framebuffer.c plane_mask |= drm_plane_mask(plane); plane 931 drivers/gpu/drm/drm_framebuffer.c struct drm_plane *plane; plane 943 drivers/gpu/drm/drm_framebuffer.c drm_for_each_plane(plane, dev) { plane 944 drivers/gpu/drm/drm_framebuffer.c if (plane->fb == fb) plane 945 drivers/gpu/drm/drm_framebuffer.c drm_plane_force_disable(plane); plane 1010 drivers/gpu/drm/drm_framebuffer.c const struct drm_framebuffer *fb, int plane) plane 1012 drivers/gpu/drm/drm_framebuffer.c if (plane >= fb->format->num_planes) plane 1015 drivers/gpu/drm/drm_framebuffer.c return fb_plane_width(width, fb->format, plane); plane 1029 drivers/gpu/drm/drm_framebuffer.c const struct drm_framebuffer *fb, int plane) plane 1031 drivers/gpu/drm/drm_framebuffer.c if (plane >= fb->format->num_planes) plane 1034 drivers/gpu/drm/drm_framebuffer.c return fb_plane_height(height, fb->format, plane); plane 48 drivers/gpu/drm/drm_gem_framebuffer_helper.c unsigned int plane) plane 50 drivers/gpu/drm/drm_gem_framebuffer_helper.c if (plane >= 4) plane 53 drivers/gpu/drm/drm_gem_framebuffer_helper.c return fb->obj[plane]; plane 287 drivers/gpu/drm/drm_gem_framebuffer_helper.c int drm_gem_fb_prepare_fb(struct drm_plane *plane, plane 322 drivers/gpu/drm/drm_gem_framebuffer_helper.c return drm_gem_fb_prepare_fb(&pipe->plane, plane_state); plane 301 drivers/gpu/drm/drm_mipi_dbi.c struct drm_plane_state *state = pipe->plane.state; plane 534 drivers/gpu/drm/drm_mipi_dbi.c drm_plane_enable_fb_damage_clips(&dbidev->pipe.plane); plane 182 drivers/gpu/drm/drm_mode_config.c struct drm_plane *plane; plane 187 drivers/gpu/drm/drm_mode_config.c drm_for_each_plane(plane, dev) plane 188 drivers/gpu/drm/drm_mode_config.c if (plane->funcs->reset) plane 189 drivers/gpu/drm/drm_mode_config.c plane->funcs->reset(plane); plane 443 drivers/gpu/drm/drm_mode_config.c struct drm_plane *plane, *plt; plane 473 drivers/gpu/drm/drm_mode_config.c list_for_each_entry_safe(plane, plt, &dev->mode_config.plane_list, plane 475 drivers/gpu/drm/drm_mode_config.c plane->funcs->destroy(plane); plane 400 drivers/gpu/drm/drm_modeset_lock.c struct drm_plane *plane; plane 413 drivers/gpu/drm/drm_modeset_lock.c drm_for_each_plane(plane, dev) { plane 414 drivers/gpu/drm/drm_modeset_lock.c ret = drm_modeset_lock(&plane->mutex, ctx); plane 86 drivers/gpu/drm/drm_plane.c static int create_in_format_blob(struct drm_device *dev, struct drm_plane *plane) plane 95 drivers/gpu/drm/drm_plane.c formats_size = sizeof(__u32) * plane->format_count; plane 102 drivers/gpu/drm/drm_plane.c sizeof(struct drm_format_modifier) * plane->modifier_count; plane 118 drivers/gpu/drm/drm_plane.c blob_data->count_formats = plane->format_count; plane 120 drivers/gpu/drm/drm_plane.c blob_data->count_modifiers = plane->modifier_count; plane 125 drivers/gpu/drm/drm_plane.c memcpy(formats_ptr(blob_data), plane->format_types, formats_size); plane 128 drivers/gpu/drm/drm_plane.c if (!plane->funcs->format_mod_supported) plane 132 drivers/gpu/drm/drm_plane.c for (i = 0; i < plane->modifier_count; i++) { plane 133 drivers/gpu/drm/drm_plane.c for (j = 0; j < plane->format_count; j++) { plane 134 drivers/gpu/drm/drm_plane.c if (plane->funcs->format_mod_supported(plane, plane 135 drivers/gpu/drm/drm_plane.c plane->format_types[j], plane 136 drivers/gpu/drm/drm_plane.c plane->modifiers[i])) { plane 142 drivers/gpu/drm/drm_plane.c mod->modifier = plane->modifiers[i]; plane 149 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->modifiers_property, plane 173 drivers/gpu/drm/drm_plane.c int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane, plane 193 drivers/gpu/drm/drm_plane.c ret = drm_mode_object_add(dev, &plane->base, DRM_MODE_OBJECT_PLANE); plane 197 drivers/gpu/drm/drm_plane.c drm_modeset_lock_init(&plane->mutex); plane 199 drivers/gpu/drm/drm_plane.c plane->base.properties = &plane->properties; plane 200 drivers/gpu/drm/drm_plane.c plane->dev = dev; plane 201 drivers/gpu/drm/drm_plane.c plane->funcs = funcs; plane 202 drivers/gpu/drm/drm_plane.c plane->format_types = kmalloc_array(format_count, sizeof(uint32_t), plane 204 drivers/gpu/drm/drm_plane.c if (!plane->format_types) { plane 206 drivers/gpu/drm/drm_plane.c drm_mode_object_unregister(dev, &plane->base); plane 226 drivers/gpu/drm/drm_plane.c plane->modifier_count = format_modifier_count; plane 227 drivers/gpu/drm/drm_plane.c plane->modifiers = kmalloc_array(format_modifier_count, plane 231 drivers/gpu/drm/drm_plane.c if (format_modifier_count && !plane->modifiers) { plane 233 drivers/gpu/drm/drm_plane.c kfree(plane->format_types); plane 234 drivers/gpu/drm/drm_plane.c drm_mode_object_unregister(dev, &plane->base); plane 242 drivers/gpu/drm/drm_plane.c plane->name = kvasprintf(GFP_KERNEL, name, ap); plane 245 drivers/gpu/drm/drm_plane.c plane->name = kasprintf(GFP_KERNEL, "plane-%d", plane 248 drivers/gpu/drm/drm_plane.c if (!plane->name) { plane 249 drivers/gpu/drm/drm_plane.c kfree(plane->format_types); plane 250 drivers/gpu/drm/drm_plane.c kfree(plane->modifiers); plane 251 drivers/gpu/drm/drm_plane.c drm_mode_object_unregister(dev, &plane->base); plane 255 drivers/gpu/drm/drm_plane.c memcpy(plane->format_types, formats, format_count * sizeof(uint32_t)); plane 256 drivers/gpu/drm/drm_plane.c plane->format_count = format_count; plane 257 drivers/gpu/drm/drm_plane.c memcpy(plane->modifiers, format_modifiers, plane 259 drivers/gpu/drm/drm_plane.c plane->possible_crtcs = possible_crtcs; plane 260 drivers/gpu/drm/drm_plane.c plane->type = type; plane 262 drivers/gpu/drm/drm_plane.c list_add_tail(&plane->head, &config->plane_list); plane 263 drivers/gpu/drm/drm_plane.c plane->index = config->num_total_plane++; plane 265 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, plane 267 drivers/gpu/drm/drm_plane.c plane->type); plane 270 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->prop_fb_id, 0); plane 271 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->prop_in_fence_fd, -1); plane 272 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->prop_crtc_id, 0); plane 273 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->prop_crtc_x, 0); plane 274 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->prop_crtc_y, 0); plane 275 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->prop_crtc_w, 0); plane 276 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->prop_crtc_h, 0); plane 277 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->prop_src_x, 0); plane 278 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->prop_src_y, 0); plane 279 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->prop_src_w, 0); plane 280 drivers/gpu/drm/drm_plane.c drm_object_attach_property(&plane->base, config->prop_src_h, 0); plane 284 drivers/gpu/drm/drm_plane.c create_in_format_blob(dev, plane); plane 292 drivers/gpu/drm/drm_plane.c struct drm_plane *plane; plane 295 drivers/gpu/drm/drm_plane.c drm_for_each_plane(plane, dev) { plane 296 drivers/gpu/drm/drm_plane.c if (plane->funcs->late_register) plane 297 drivers/gpu/drm/drm_plane.c ret = plane->funcs->late_register(plane); plane 307 drivers/gpu/drm/drm_plane.c struct drm_plane *plane; plane 309 drivers/gpu/drm/drm_plane.c drm_for_each_plane(plane, dev) { plane 310 drivers/gpu/drm/drm_plane.c if (plane->funcs->early_unregister) plane 311 drivers/gpu/drm/drm_plane.c plane->funcs->early_unregister(plane); plane 332 drivers/gpu/drm/drm_plane.c int drm_plane_init(struct drm_device *dev, struct drm_plane *plane, plane 341 drivers/gpu/drm/drm_plane.c return drm_universal_plane_init(dev, plane, possible_crtcs, funcs, plane 355 drivers/gpu/drm/drm_plane.c void drm_plane_cleanup(struct drm_plane *plane) plane 357 drivers/gpu/drm/drm_plane.c struct drm_device *dev = plane->dev; plane 359 drivers/gpu/drm/drm_plane.c drm_modeset_lock_fini(&plane->mutex); plane 361 drivers/gpu/drm/drm_plane.c kfree(plane->format_types); plane 362 drivers/gpu/drm/drm_plane.c kfree(plane->modifiers); plane 363 drivers/gpu/drm/drm_plane.c drm_mode_object_unregister(dev, &plane->base); plane 365 drivers/gpu/drm/drm_plane.c BUG_ON(list_empty(&plane->head)); plane 372 drivers/gpu/drm/drm_plane.c list_del(&plane->head); plane 375 drivers/gpu/drm/drm_plane.c WARN_ON(plane->state && !plane->funcs->atomic_destroy_state); plane 376 drivers/gpu/drm/drm_plane.c if (plane->state && plane->funcs->atomic_destroy_state) plane 377 drivers/gpu/drm/drm_plane.c plane->funcs->atomic_destroy_state(plane, plane->state); plane 379 drivers/gpu/drm/drm_plane.c kfree(plane->name); plane 381 drivers/gpu/drm/drm_plane.c memset(plane, 0, sizeof(*plane)); plane 396 drivers/gpu/drm/drm_plane.c struct drm_plane *plane; plane 398 drivers/gpu/drm/drm_plane.c drm_for_each_plane(plane, dev) plane 399 drivers/gpu/drm/drm_plane.c if (idx == plane->index) plane 400 drivers/gpu/drm/drm_plane.c return plane; plane 421 drivers/gpu/drm/drm_plane.c void drm_plane_force_disable(struct drm_plane *plane) plane 425 drivers/gpu/drm/drm_plane.c if (!plane->fb) plane 428 drivers/gpu/drm/drm_plane.c WARN_ON(drm_drv_uses_atomic_modeset(plane->dev)); plane 430 drivers/gpu/drm/drm_plane.c plane->old_fb = plane->fb; plane 431 drivers/gpu/drm/drm_plane.c ret = plane->funcs->disable_plane(plane, NULL); plane 434 drivers/gpu/drm/drm_plane.c plane->old_fb = NULL; plane 438 drivers/gpu/drm/drm_plane.c drm_framebuffer_put(plane->old_fb); plane 439 drivers/gpu/drm/drm_plane.c plane->old_fb = NULL; plane 440 drivers/gpu/drm/drm_plane.c plane->fb = NULL; plane 441 drivers/gpu/drm/drm_plane.c plane->crtc = NULL; plane 458 drivers/gpu/drm/drm_plane.c int drm_mode_plane_set_obj_prop(struct drm_plane *plane, plane 463 drivers/gpu/drm/drm_plane.c struct drm_mode_object *obj = &plane->base; plane 465 drivers/gpu/drm/drm_plane.c if (plane->funcs->set_property) plane 466 drivers/gpu/drm/drm_plane.c ret = plane->funcs->set_property(plane, property, value); plane 478 drivers/gpu/drm/drm_plane.c struct drm_plane *plane; plane 491 drivers/gpu/drm/drm_plane.c drm_for_each_plane(plane, dev) { plane 496 drivers/gpu/drm/drm_plane.c if (plane->type != DRM_PLANE_TYPE_OVERLAY && plane 500 drivers/gpu/drm/drm_plane.c if (drm_lease_held(file_priv, plane->base.id)) { plane 502 drivers/gpu/drm/drm_plane.c put_user(plane->base.id, plane_ptr + count)) plane 516 drivers/gpu/drm/drm_plane.c struct drm_plane *plane; plane 522 drivers/gpu/drm/drm_plane.c plane = drm_plane_find(dev, file_priv, plane_resp->plane_id); plane 523 drivers/gpu/drm/drm_plane.c if (!plane) plane 526 drivers/gpu/drm/drm_plane.c drm_modeset_lock(&plane->mutex, NULL); plane 527 drivers/gpu/drm/drm_plane.c if (plane->state && plane->state->crtc && drm_lease_held(file_priv, plane->state->crtc->base.id)) plane 528 drivers/gpu/drm/drm_plane.c plane_resp->crtc_id = plane->state->crtc->base.id; plane 529 drivers/gpu/drm/drm_plane.c else if (!plane->state && plane->crtc && drm_lease_held(file_priv, plane->crtc->base.id)) plane 530 drivers/gpu/drm/drm_plane.c plane_resp->crtc_id = plane->crtc->base.id; plane 534 drivers/gpu/drm/drm_plane.c if (plane->state && plane->state->fb) plane 535 drivers/gpu/drm/drm_plane.c plane_resp->fb_id = plane->state->fb->base.id; plane 536 drivers/gpu/drm/drm_plane.c else if (!plane->state && plane->fb) plane 537 drivers/gpu/drm/drm_plane.c plane_resp->fb_id = plane->fb->base.id; plane 540 drivers/gpu/drm/drm_plane.c drm_modeset_unlock(&plane->mutex); plane 542 drivers/gpu/drm/drm_plane.c plane_resp->plane_id = plane->base.id; plane 544 drivers/gpu/drm/drm_plane.c plane->possible_crtcs); plane 552 drivers/gpu/drm/drm_plane.c if (plane->format_count && plane 553 drivers/gpu/drm/drm_plane.c (plane_resp->count_format_types >= plane->format_count)) { plane 556 drivers/gpu/drm/drm_plane.c plane->format_types, plane 557 drivers/gpu/drm/drm_plane.c sizeof(uint32_t) * plane->format_count)) { plane 561 drivers/gpu/drm/drm_plane.c plane_resp->count_format_types = plane->format_count; plane 566 drivers/gpu/drm/drm_plane.c int drm_plane_check_pixel_format(struct drm_plane *plane, plane 571 drivers/gpu/drm/drm_plane.c for (i = 0; i < plane->format_count; i++) { plane 572 drivers/gpu/drm/drm_plane.c if (format == plane->format_types[i]) plane 575 drivers/gpu/drm/drm_plane.c if (i == plane->format_count) plane 578 drivers/gpu/drm/drm_plane.c if (plane->funcs->format_mod_supported) { plane 579 drivers/gpu/drm/drm_plane.c if (!plane->funcs->format_mod_supported(plane, format, modifier)) plane 582 drivers/gpu/drm/drm_plane.c if (!plane->modifier_count) plane 585 drivers/gpu/drm/drm_plane.c for (i = 0; i < plane->modifier_count; i++) { plane 586 drivers/gpu/drm/drm_plane.c if (modifier == plane->modifiers[i]) plane 589 drivers/gpu/drm/drm_plane.c if (i == plane->modifier_count) plane 596 drivers/gpu/drm/drm_plane.c static int __setplane_check(struct drm_plane *plane, plane 607 drivers/gpu/drm/drm_plane.c if (!(plane->possible_crtcs & drm_crtc_mask(crtc))) { plane 613 drivers/gpu/drm/drm_plane.c ret = drm_plane_check_pixel_format(plane, fb->format->format, plane 654 drivers/gpu/drm/drm_plane.c struct drm_plane *plane; plane 656 drivers/gpu/drm/drm_plane.c drm_for_each_plane(plane, dev) { plane 657 drivers/gpu/drm/drm_plane.c if (drm_plane_check_pixel_format(plane, format, modifier) == 0) plane 673 drivers/gpu/drm/drm_plane.c static int __setplane_internal(struct drm_plane *plane, plane 685 drivers/gpu/drm/drm_plane.c WARN_ON(drm_drv_uses_atomic_modeset(plane->dev)); plane 689 drivers/gpu/drm/drm_plane.c plane->old_fb = plane->fb; plane 690 drivers/gpu/drm/drm_plane.c ret = plane->funcs->disable_plane(plane, ctx); plane 692 drivers/gpu/drm/drm_plane.c plane->crtc = NULL; plane 693 drivers/gpu/drm/drm_plane.c plane->fb = NULL; plane 695 drivers/gpu/drm/drm_plane.c plane->old_fb = NULL; plane 700 drivers/gpu/drm/drm_plane.c ret = __setplane_check(plane, crtc, fb, plane 706 drivers/gpu/drm/drm_plane.c plane->old_fb = plane->fb; plane 707 drivers/gpu/drm/drm_plane.c ret = plane->funcs->update_plane(plane, crtc, fb, plane 711 drivers/gpu/drm/drm_plane.c plane->crtc = crtc; plane 712 drivers/gpu/drm/drm_plane.c plane->fb = fb; plane 713 drivers/gpu/drm/drm_plane.c drm_framebuffer_get(plane->fb); plane 715 drivers/gpu/drm/drm_plane.c plane->old_fb = NULL; plane 719 drivers/gpu/drm/drm_plane.c if (plane->old_fb) plane 720 drivers/gpu/drm/drm_plane.c drm_framebuffer_put(plane->old_fb); plane 721 drivers/gpu/drm/drm_plane.c plane->old_fb = NULL; plane 726 drivers/gpu/drm/drm_plane.c static int __setplane_atomic(struct drm_plane *plane, plane 737 drivers/gpu/drm/drm_plane.c WARN_ON(!drm_drv_uses_atomic_modeset(plane->dev)); plane 741 drivers/gpu/drm/drm_plane.c return plane->funcs->disable_plane(plane, ctx); plane 750 drivers/gpu/drm/drm_plane.c ret = __setplane_check(plane, crtc, fb, plane 756 drivers/gpu/drm/drm_plane.c return plane->funcs->update_plane(plane, crtc, fb, plane 761 drivers/gpu/drm/drm_plane.c static int setplane_internal(struct drm_plane *plane, plane 773 drivers/gpu/drm/drm_plane.c DRM_MODESET_LOCK_ALL_BEGIN(plane->dev, ctx, plane 776 drivers/gpu/drm/drm_plane.c if (drm_drv_uses_atomic_modeset(plane->dev)) plane 777 drivers/gpu/drm/drm_plane.c ret = __setplane_atomic(plane, crtc, fb, plane 781 drivers/gpu/drm/drm_plane.c ret = __setplane_internal(plane, crtc, fb, plane 794 drivers/gpu/drm/drm_plane.c struct drm_plane *plane; plane 806 drivers/gpu/drm/drm_plane.c plane = drm_plane_find(dev, file_priv, plane_req->plane_id); plane 807 drivers/gpu/drm/drm_plane.c if (!plane) { plane 830 drivers/gpu/drm/drm_plane.c ret = setplane_internal(plane, crtc, fb, plane 848 drivers/gpu/drm/drm_plane.c struct drm_plane *plane = crtc->cursor; plane 862 drivers/gpu/drm/drm_plane.c BUG_ON(!plane); plane 863 drivers/gpu/drm/drm_plane.c WARN_ON(plane->crtc != crtc && plane->crtc != NULL); plane 884 drivers/gpu/drm/drm_plane.c if (plane->state) plane 885 drivers/gpu/drm/drm_plane.c fb = plane->state->fb; plane 887 drivers/gpu/drm/drm_plane.c fb = plane->fb; plane 909 drivers/gpu/drm/drm_plane.c ret = __setplane_atomic(plane, crtc, fb, plane 913 drivers/gpu/drm/drm_plane.c ret = __setplane_internal(plane, crtc, fb, plane 1039 drivers/gpu/drm/drm_plane.c struct drm_plane *plane; plane 1068 drivers/gpu/drm/drm_plane.c plane = crtc->primary; plane 1070 drivers/gpu/drm/drm_plane.c if (!drm_lease_held(file_priv, plane->base.id)) plane 1117 drivers/gpu/drm/drm_plane.c ret = drm_modeset_lock(&plane->mutex, &ctx); plane 1121 drivers/gpu/drm/drm_plane.c if (plane->state) plane 1122 drivers/gpu/drm/drm_plane.c old_fb = plane->state->fb; plane 1124 drivers/gpu/drm/drm_plane.c old_fb = plane->fb; plane 1141 drivers/gpu/drm/drm_plane.c if (plane->state) { plane 1142 drivers/gpu/drm/drm_plane.c const struct drm_plane_state *state = plane->state; plane 1182 drivers/gpu/drm/drm_plane.c plane->old_fb = plane->fb; plane 1195 drivers/gpu/drm/drm_plane.c plane->old_fb = NULL; plane 1197 drivers/gpu/drm/drm_plane.c if (!plane->state) { plane 1198 drivers/gpu/drm/drm_plane.c plane->fb = fb; plane 1206 drivers/gpu/drm/drm_plane.c if (plane->old_fb) plane 1207 drivers/gpu/drm/drm_plane.c drm_framebuffer_put(plane->old_fb); plane 1208 drivers/gpu/drm/drm_plane.c plane->old_fb = NULL; plane 101 drivers/gpu/drm/drm_plane_helper.c static int drm_plane_helper_check_update(struct drm_plane *plane, plane 114 drivers/gpu/drm/drm_plane_helper.c .plane = plane, plane 149 drivers/gpu/drm/drm_plane_helper.c static int drm_primary_helper_update(struct drm_plane *plane, struct drm_crtc *crtc, plane 180 drivers/gpu/drm/drm_plane_helper.c ret = drm_plane_helper_check_update(plane, crtc, fb, plane 195 drivers/gpu/drm/drm_plane_helper.c return plane->funcs->disable_plane(plane, ctx); plane 223 drivers/gpu/drm/drm_plane_helper.c static int drm_primary_helper_disable(struct drm_plane *plane, plane 237 drivers/gpu/drm/drm_plane_helper.c void drm_primary_helper_destroy(struct drm_plane *plane) plane 239 drivers/gpu/drm/drm_plane_helper.c drm_plane_cleanup(plane); plane 240 drivers/gpu/drm/drm_plane_helper.c kfree(plane); plane 64 drivers/gpu/drm/drm_simple_kms_helper.c struct drm_plane *plane; plane 71 drivers/gpu/drm/drm_simple_kms_helper.c plane = &pipe->plane; plane 72 drivers/gpu/drm/drm_simple_kms_helper.c pipe->funcs->enable(pipe, crtc->state, plane->state); plane 127 drivers/gpu/drm/drm_simple_kms_helper.c static int drm_simple_kms_plane_atomic_check(struct drm_plane *plane, plane 134 drivers/gpu/drm/drm_simple_kms_helper.c pipe = container_of(plane, struct drm_simple_display_pipe, plane); plane 154 drivers/gpu/drm/drm_simple_kms_helper.c static void drm_simple_kms_plane_atomic_update(struct drm_plane *plane, plane 159 drivers/gpu/drm/drm_simple_kms_helper.c pipe = container_of(plane, struct drm_simple_display_pipe, plane); plane 166 drivers/gpu/drm/drm_simple_kms_helper.c static int drm_simple_kms_plane_prepare_fb(struct drm_plane *plane, plane 171 drivers/gpu/drm/drm_simple_kms_helper.c pipe = container_of(plane, struct drm_simple_display_pipe, plane); plane 178 drivers/gpu/drm/drm_simple_kms_helper.c static void drm_simple_kms_plane_cleanup_fb(struct drm_plane *plane, plane 183 drivers/gpu/drm/drm_simple_kms_helper.c pipe = container_of(plane, struct drm_simple_display_pipe, plane); plane 190 drivers/gpu/drm/drm_simple_kms_helper.c static bool drm_simple_kms_format_mod_supported(struct drm_plane *plane, plane 267 drivers/gpu/drm/drm_simple_kms_helper.c struct drm_plane *plane = &pipe->plane; plane 274 drivers/gpu/drm/drm_simple_kms_helper.c drm_plane_helper_add(plane, &drm_simple_kms_plane_helper_funcs); plane 275 drivers/gpu/drm/drm_simple_kms_helper.c ret = drm_universal_plane_init(dev, plane, 0, plane 284 drivers/gpu/drm/drm_simple_kms_helper.c ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL, plane 321 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct exynos_drm_plane plane = ctx->planes[win]; plane 323 drivers/gpu/drm/exynos/exynos5433_drm_decon.c to_exynos_plane_state(plane.base.state); plane 400 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct exynos_drm_plane *plane) plane 403 drivers/gpu/drm/exynos/exynos5433_drm_decon.c to_exynos_plane_state(plane->base.state); plane 406 drivers/gpu/drm/exynos/exynos5433_drm_decon.c unsigned int win = plane->index; plane 457 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct exynos_drm_plane *plane) plane 460 drivers/gpu/drm/exynos/exynos5433_drm_decon.c unsigned int win = plane->index; plane 380 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct exynos_drm_plane *plane) plane 383 drivers/gpu/drm/exynos/exynos7_drm_decon.c to_exynos_plane_state(plane->base.state); plane 390 drivers/gpu/drm/exynos/exynos7_drm_decon.c unsigned int win = plane->index; plane 478 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct exynos_drm_plane *plane) plane 481 drivers/gpu/drm/exynos/exynos7_drm_decon.c unsigned int win = plane->index; plane 173 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct drm_plane *plane, plane 192 drivers/gpu/drm/exynos/exynos_drm_crtc.c ret = drm_crtc_init_with_planes(drm_dev, crtc, plane, NULL, plane 202 drivers/gpu/drm/exynos/exynos_drm_crtc.c plane->funcs->destroy(plane); plane 18 drivers/gpu/drm/exynos/exynos_drm_crtc.h struct drm_plane *plane, plane 149 drivers/gpu/drm/exynos/exynos_drm_drv.h struct exynos_drm_plane *plane); plane 151 drivers/gpu/drm/exynos/exynos_drm_drv.h struct exynos_drm_plane *plane); plane 640 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct exynos_drm_plane plane = ctx->planes[win]; plane 642 drivers/gpu/drm/exynos/exynos_drm_fimd.c to_exynos_plane_state(plane.base.state); plane 789 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct exynos_drm_plane *plane) plane 792 drivers/gpu/drm/exynos/exynos_drm_fimd.c to_exynos_plane_state(plane->base.state); plane 798 drivers/gpu/drm/exynos/exynos_drm_fimd.c unsigned int win = plane->index; plane 884 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct exynos_drm_plane *plane) plane 887 drivers/gpu/drm/exynos/exynos_drm_fimd.c unsigned int win = plane->index; plane 123 drivers/gpu/drm/exynos/exynos_drm_plane.c static void exynos_drm_plane_reset(struct drm_plane *plane) plane 125 drivers/gpu/drm/exynos/exynos_drm_plane.c struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); plane 128 drivers/gpu/drm/exynos/exynos_drm_plane.c if (plane->state) { plane 129 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state = to_exynos_plane_state(plane->state); plane 130 drivers/gpu/drm/exynos/exynos_drm_plane.c __drm_atomic_helper_plane_destroy_state(plane->state); plane 132 drivers/gpu/drm/exynos/exynos_drm_plane.c plane->state = NULL; plane 137 drivers/gpu/drm/exynos/exynos_drm_plane.c __drm_atomic_helper_plane_reset(plane, &exynos_state->base); plane 138 drivers/gpu/drm/exynos/exynos_drm_plane.c plane->state->zpos = exynos_plane->config->zpos; plane 143 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_drm_plane_duplicate_state(struct drm_plane *plane) plane 148 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state = to_exynos_plane_state(plane->state); plane 153 drivers/gpu/drm/exynos/exynos_drm_plane.c __drm_atomic_helper_plane_duplicate_state(plane, ©->base); plane 157 drivers/gpu/drm/exynos/exynos_drm_plane.c static void exynos_drm_plane_destroy_state(struct drm_plane *plane, plane 230 drivers/gpu/drm/exynos/exynos_drm_plane.c static int exynos_plane_atomic_check(struct drm_plane *plane, plane 233 drivers/gpu/drm/exynos/exynos_drm_plane.c struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); plane 252 drivers/gpu/drm/exynos/exynos_drm_plane.c static void exynos_plane_atomic_update(struct drm_plane *plane, plane 255 drivers/gpu/drm/exynos/exynos_drm_plane.c struct drm_plane_state *state = plane->state; plane 257 drivers/gpu/drm/exynos/exynos_drm_plane.c struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); plane 266 drivers/gpu/drm/exynos/exynos_drm_plane.c static void exynos_plane_atomic_disable(struct drm_plane *plane, plane 269 drivers/gpu/drm/exynos/exynos_drm_plane.c struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); plane 285 drivers/gpu/drm/exynos/exynos_drm_plane.c static void exynos_plane_attach_zpos_property(struct drm_plane *plane, plane 289 drivers/gpu/drm/exynos/exynos_drm_plane.c drm_plane_create_zpos_immutable_property(plane, zpos); plane 291 drivers/gpu/drm/exynos/exynos_drm_plane.c drm_plane_create_zpos_property(plane, zpos, 0, MAX_PLANE - 1); plane 302 drivers/gpu/drm/exynos/exynos_drm_plane.c struct drm_plane *plane = &exynos_plane->base; plane 324 drivers/gpu/drm/exynos/exynos_drm_plane.c drm_plane_create_blend_mode_property(plane, supported_modes); plane 327 drivers/gpu/drm/exynos/exynos_drm_plane.c drm_plane_create_alpha_property(plane); plane 110 drivers/gpu/drm/exynos/exynos_drm_vidi.c struct exynos_drm_plane *plane) plane 112 drivers/gpu/drm/exynos/exynos_drm_vidi.c struct drm_plane_state *state = plane->base.state; plane 512 drivers/gpu/drm/exynos/exynos_mixer.c struct exynos_drm_plane *plane) plane 515 drivers/gpu/drm/exynos/exynos_mixer.c to_exynos_plane_state(plane->base.state); plane 589 drivers/gpu/drm/exynos/exynos_mixer.c mixer_cfg_layer(ctx, plane->index, priority, true); plane 599 drivers/gpu/drm/exynos/exynos_mixer.c struct exynos_drm_plane *plane) plane 602 drivers/gpu/drm/exynos/exynos_mixer.c to_exynos_plane_state(plane->base.state); plane 606 drivers/gpu/drm/exynos/exynos_mixer.c unsigned int win = plane->index; plane 950 drivers/gpu/drm/exynos/exynos_mixer.c struct exynos_drm_plane *plane) plane 954 drivers/gpu/drm/exynos/exynos_mixer.c DRM_DEV_DEBUG_KMS(mixer_ctx->dev, "win: %d\n", plane->index); plane 959 drivers/gpu/drm/exynos/exynos_mixer.c if (plane->index == VP_DEFAULT_WIN) plane 960 drivers/gpu/drm/exynos/exynos_mixer.c vp_video_buffer(mixer_ctx, plane); plane 962 drivers/gpu/drm/exynos/exynos_mixer.c mixer_graph_buffer(mixer_ctx, plane); plane 966 drivers/gpu/drm/exynos/exynos_mixer.c struct exynos_drm_plane *plane) plane 971 drivers/gpu/drm/exynos/exynos_mixer.c DRM_DEV_DEBUG_KMS(mixer_ctx->dev, "win: %d\n", plane->index); plane 977 drivers/gpu/drm/exynos/exynos_mixer.c mixer_cfg_layer(mixer_ctx, plane->index, 0, false); plane 21 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c static int fsl_dcu_drm_plane_index(struct drm_plane *plane) plane 23 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private; plane 27 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c index = drm_plane_index(plane); plane 35 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c static int fsl_dcu_drm_plane_atomic_check(struct drm_plane *plane, plane 59 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c static void fsl_dcu_drm_plane_atomic_disable(struct drm_plane *plane, plane 62 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private; plane 66 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c index = fsl_dcu_drm_plane_index(plane); plane 75 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane, plane 79 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private; plane 80 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c struct drm_plane_state *state = plane->state; plane 81 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c struct drm_framebuffer *fb = plane->state->fb; plane 89 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c index = fsl_dcu_drm_plane_index(plane); plane 169 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c static void fsl_dcu_drm_plane_destroy(struct drm_plane *plane) plane 171 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c drm_plane_cleanup(plane); plane 172 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c kfree(plane); plane 508 drivers/gpu/drm/gma500/psb_intel_display.c gma_crtc->plane = pipe; plane 522 drivers/gpu/drm/gma500/psb_intel_display.c dev_priv->plane_to_crtc_mapping[gma_crtc->plane] != NULL); plane 523 drivers/gpu/drm/gma500/psb_intel_display.c dev_priv->plane_to_crtc_mapping[gma_crtc->plane] = &gma_crtc->base; plane 160 drivers/gpu/drm/gma500/psb_intel_drv.h int plane; plane 57 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c static int hibmc_plane_atomic_check(struct drm_plane *plane, plane 94 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c static void hibmc_plane_atomic_update(struct drm_plane *plane, plane 97 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct drm_plane_state *state = plane->state; plane 102 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct hibmc_drm_private *priv = plane->dev->dev_private; plane 167 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct drm_plane *plane; plane 170 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c plane = devm_kzalloc(dev->dev, sizeof(*plane), GFP_KERNEL); plane 171 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c if (!plane) { plane 180 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c ret = drm_universal_plane_init(dev, plane, 1, &hibmc_plane_funcs, plane 191 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c drm_plane_helper_add(plane, &hibmc_plane_helper_funcs); plane 192 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c return plane; plane 469 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct drm_plane *plane; plane 472 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c plane = hibmc_plane_init(priv); plane 473 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c if (IS_ERR(plane)) { plane 474 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c DRM_ERROR("failed to create plane: %ld\n", PTR_ERR(plane)); plane 475 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c return PTR_ERR(plane); plane 484 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c ret = drm_crtc_init_with_planes(dev, crtc, plane, plane 760 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static int ade_plane_atomic_check(struct drm_plane *plane, plane 805 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static void ade_plane_atomic_update(struct drm_plane *plane, plane 808 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct drm_plane_state *state = plane->state; plane 809 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct kirin_plane *kplane = to_kirin_plane(plane); plane 817 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static void ade_plane_atomic_disable(struct drm_plane *plane, plane 820 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct kirin_plane *kplane = to_kirin_plane(plane); plane 41 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c struct drm_plane *plane, plane 58 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL, plane 70 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c static int kirin_drm_plane_init(struct drm_device *dev, struct drm_plane *plane, plane 76 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c ret = drm_universal_plane_init(dev, plane, 1, data->plane_funcs, plane 85 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c drm_plane_helper_add(plane, data->plane_helper_funcs); plane 13 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h #define to_kirin_plane(plane) \ plane 14 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h container_of(plane, struct kirin_plane, base) plane 256 drivers/gpu/drm/i915/display/intel_atomic.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 260 drivers/gpu/drm/i915/display/intel_atomic.c } else if (icl_is_hdr_plane(dev_priv, plane->id)) { plane 315 drivers/gpu/drm/i915/display/intel_atomic.c struct drm_plane *plane = NULL; plane 367 drivers/gpu/drm/i915/display/intel_atomic.c plane = drm_state->planes[i].ptr; plane 373 drivers/gpu/drm/i915/display/intel_atomic.c if (!plane) { plane 375 drivers/gpu/drm/i915/display/intel_atomic.c plane = drm_plane_from_index(&dev_priv->drm, i); plane 376 drivers/gpu/drm/i915/display/intel_atomic.c state = drm_atomic_get_plane_state(drm_state, plane); plane 379 drivers/gpu/drm/i915/display/intel_atomic.c plane->base.id); plane 391 drivers/gpu/drm/i915/display/intel_atomic.c intel_plane = to_intel_plane(plane); plane 392 drivers/gpu/drm/i915/display/intel_atomic.c idx = plane->base.id; plane 47 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_plane *plane; plane 49 drivers/gpu/drm/i915/display/intel_atomic_plane.c plane = kzalloc(sizeof(*plane), GFP_KERNEL); plane 50 drivers/gpu/drm/i915/display/intel_atomic_plane.c if (!plane) plane 55 drivers/gpu/drm/i915/display/intel_atomic_plane.c kfree(plane); plane 59 drivers/gpu/drm/i915/display/intel_atomic_plane.c __drm_atomic_helper_plane_reset(&plane->base, &plane_state->base); plane 62 drivers/gpu/drm/i915/display/intel_atomic_plane.c return plane; plane 65 drivers/gpu/drm/i915/display/intel_atomic_plane.c void intel_plane_free(struct intel_plane *plane) plane 67 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_plane_destroy_state(&plane->base, plane->base.state); plane 68 drivers/gpu/drm/i915/display/intel_atomic_plane.c kfree(plane); plane 81 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_plane_duplicate_state(struct drm_plane *plane) plane 86 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL); plane 93 drivers/gpu/drm/i915/display/intel_atomic_plane.c __drm_atomic_helper_plane_duplicate_state(plane, state); plane 110 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_plane_destroy_state(struct drm_plane *plane, plane 115 drivers/gpu/drm/i915/display/intel_atomic_plane.c drm_atomic_helper_plane_destroy_state(plane, state); plane 146 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_plane *plane = to_intel_plane(new_plane_state->base.plane); plane 149 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->active_planes &= ~BIT(plane->id); plane 150 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->nv12_planes &= ~BIT(plane->id); plane 151 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->c8_planes &= ~BIT(plane->id); plane 152 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->data_rate[plane->id] = 0; plane 158 drivers/gpu/drm/i915/display/intel_atomic_plane.c ret = plane->check_plane(new_crtc_state, new_plane_state); plane 164 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->active_planes |= BIT(plane->id); plane 168 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->nv12_planes |= BIT(plane->id); plane 172 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->c8_planes |= BIT(plane->id); plane 175 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->update_planes |= BIT(plane->id); plane 177 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->data_rate[plane->id] = plane 200 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_plane *plane = to_intel_plane(_plane); plane 206 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_atomic_get_old_plane_state(state, plane); plane 235 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_plane *plane; plane 241 drivers/gpu/drm/i915/display/intel_atomic_plane.c for_each_new_intel_plane_in_state(state, plane, plane_state, i) { plane 242 drivers/gpu/drm/i915/display/intel_atomic_plane.c enum plane_id plane_id = plane->id; plane 244 drivers/gpu/drm/i915/display/intel_atomic_plane.c if (crtc->pipe != plane->pipe || plane 260 drivers/gpu/drm/i915/display/intel_atomic_plane.c return plane; plane 269 drivers/gpu/drm/i915/display/intel_atomic_plane.c void intel_update_plane(struct intel_plane *plane, plane 275 drivers/gpu/drm/i915/display/intel_atomic_plane.c trace_intel_update_plane(&plane->base, crtc); plane 276 drivers/gpu/drm/i915/display/intel_atomic_plane.c plane->update_plane(plane, crtc_state, plane_state); plane 279 drivers/gpu/drm/i915/display/intel_atomic_plane.c void intel_update_slave(struct intel_plane *plane, plane 285 drivers/gpu/drm/i915/display/intel_atomic_plane.c trace_intel_update_plane(&plane->base, crtc); plane 286 drivers/gpu/drm/i915/display/intel_atomic_plane.c plane->update_slave(plane, crtc_state, plane_state); plane 289 drivers/gpu/drm/i915/display/intel_atomic_plane.c void intel_disable_plane(struct intel_plane *plane, plane 294 drivers/gpu/drm/i915/display/intel_atomic_plane.c trace_intel_disable_plane(&plane->base, crtc); plane 295 drivers/gpu/drm/i915/display/intel_atomic_plane.c plane->disable_plane(plane, crtc_state); plane 308 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_plane *plane; plane 315 drivers/gpu/drm/i915/display/intel_atomic_plane.c while ((plane = skl_next_plane_to_commit(state, crtc, plane 319 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_atomic_get_new_plane_state(state, plane); plane 322 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_update_plane(plane, new_crtc_state, new_plane_state); plane 339 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_update_slave(plane, new_crtc_state, new_plane_state); plane 341 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_disable_plane(plane, new_crtc_state); plane 353 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_plane *plane; plane 356 drivers/gpu/drm/i915/display/intel_atomic_plane.c for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) { plane 357 drivers/gpu/drm/i915/display/intel_atomic_plane.c if (crtc->pipe != plane->pipe || plane 358 drivers/gpu/drm/i915/display/intel_atomic_plane.c !(update_mask & BIT(plane->id))) plane 362 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_update_plane(plane, new_crtc_state, new_plane_state); plane 364 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_disable_plane(plane, new_crtc_state); plane 23 drivers/gpu/drm/i915/display/intel_atomic_plane.h void intel_update_plane(struct intel_plane *plane, plane 26 drivers/gpu/drm/i915/display/intel_atomic_plane.h void intel_update_slave(struct intel_plane *plane, plane 29 drivers/gpu/drm/i915/display/intel_atomic_plane.h void intel_disable_plane(struct intel_plane *plane, plane 32 drivers/gpu/drm/i915/display/intel_atomic_plane.h void intel_plane_free(struct intel_plane *plane); plane 33 drivers/gpu/drm/i915/display/intel_atomic_plane.h struct drm_plane_state *intel_plane_duplicate_state(struct drm_plane *plane); plane 34 drivers/gpu/drm/i915/display/intel_atomic_plane.h void intel_plane_destroy_state(struct drm_plane *plane, plane 1057 drivers/gpu/drm/i915/display/intel_color.c static bool need_plane_update(struct intel_plane *plane, plane 1060 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1067 drivers/gpu/drm/i915/display/intel_color.c return crtc_state->active_planes & BIT(plane->id) || plane 1069 drivers/gpu/drm/i915/display/intel_color.c plane->id == PLANE_PRIMARY); plane 1081 drivers/gpu/drm/i915/display/intel_color.c struct intel_plane *plane; plane 1091 drivers/gpu/drm/i915/display/intel_color.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { plane 1094 drivers/gpu/drm/i915/display/intel_color.c if (!need_plane_update(plane, new_crtc_state)) plane 1097 drivers/gpu/drm/i915/display/intel_color.c plane_state = intel_atomic_get_plane_state(state, plane); plane 1101 drivers/gpu/drm/i915/display/intel_color.c new_crtc_state->update_planes |= BIT(plane->id); plane 1271 drivers/gpu/drm/i915/display/intel_display.c static void assert_plane(struct intel_plane *plane, bool state) plane 1276 drivers/gpu/drm/i915/display/intel_display.c cur_state = plane->get_hw_state(plane, &pipe); plane 1280 drivers/gpu/drm/i915/display/intel_display.c plane->base.name, onoff(state), onoff(cur_state)); plane 1289 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 1291 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) plane 1292 drivers/gpu/drm/i915/display/intel_display.c assert_plane_disabled(plane); plane 1977 drivers/gpu/drm/i915/display/intel_display.c for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++) plane 1978 drivers/gpu/drm/i915/display/intel_display.c size += rot_info->plane[i].width * rot_info->plane[i].height; plane 1988 drivers/gpu/drm/i915/display/intel_display.c for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) plane 1989 drivers/gpu/drm/i915/display/intel_display.c size += rem_info->plane[i].width * rem_info->plane[i].height; plane 2060 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 2061 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 2064 drivers/gpu/drm/i915/display/intel_display.c (plane->has_fbc && plane 2370 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *intel_plane = to_intel_plane(state->base.plane); plane 2500 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 2510 drivers/gpu/drm/i915/display/intel_display.c plane = to_intel_plane(crtc->base.primary); plane 2512 drivers/gpu/drm/i915/display/intel_display.c return plane->max_stride(plane, pixel_format, modifier, plane 2561 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 2562 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 2567 drivers/gpu/drm/i915/display/intel_display.c if (plane->id == PLANE_CURSOR) plane 2601 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 2621 drivers/gpu/drm/i915/display/intel_display.c max_stride = plane->max_stride(plane, fb->format->format, plane 2724 drivers/gpu/drm/i915/display/intel_display.c rot_info->plane[i].offset = offset; plane 2725 drivers/gpu/drm/i915/display/intel_display.c rot_info->plane[i].stride = DIV_ROUND_UP(fb->pitches[i], tile_width * cpp); plane 2726 drivers/gpu/drm/i915/display/intel_display.c rot_info->plane[i].width = DIV_ROUND_UP(x + width, tile_width); plane 2727 drivers/gpu/drm/i915/display/intel_display.c rot_info->plane[i].height = DIV_ROUND_UP(y + height, tile_height); plane 2730 drivers/gpu/drm/i915/display/intel_display.c rot_info->plane[i].height * tile_height; plane 2733 drivers/gpu/drm/i915/display/intel_display.c size = rot_info->plane[i].stride * rot_info->plane[i].height; plane 2747 drivers/gpu/drm/i915/display/intel_display.c rot_info->plane[i].width * tile_width, plane 2748 drivers/gpu/drm/i915/display/intel_display.c rot_info->plane[i].height * tile_height, plane 2766 drivers/gpu/drm/i915/display/intel_display.c gtt_offset_rotated += rot_info->plane[i].width * rot_info->plane[i].height; plane 2796 drivers/gpu/drm/i915/display/intel_display.c to_i915(plane_state->base.plane->dev); plane 2857 drivers/gpu/drm/i915/display/intel_display.c info->plane[i].offset = offset; plane 2858 drivers/gpu/drm/i915/display/intel_display.c info->plane[i].stride = DIV_ROUND_UP(fb->pitches[i], plane 2860 drivers/gpu/drm/i915/display/intel_display.c info->plane[i].width = DIV_ROUND_UP(x + width, tile_width); plane 2861 drivers/gpu/drm/i915/display/intel_display.c info->plane[i].height = DIV_ROUND_UP(y + height, tile_height); plane 2872 drivers/gpu/drm/i915/display/intel_display.c info->plane[i].width * tile_width, plane 2873 drivers/gpu/drm/i915/display/intel_display.c info->plane[i].height * tile_height, plane 2878 drivers/gpu/drm/i915/display/intel_display.c pitch_tiles = info->plane[i].height; plane 2884 drivers/gpu/drm/i915/display/intel_display.c pitch_tiles = info->plane[i].width; plane 2897 drivers/gpu/drm/i915/display/intel_display.c gtt_offset += info->plane[i].width * info->plane[i].height; plane 3115 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 3120 drivers/gpu/drm/i915/display/intel_display.c crtc_state->base.plane_mask |= drm_plane_mask(&plane->base); plane 3122 drivers/gpu/drm/i915/display/intel_display.c crtc_state->base.plane_mask &= ~drm_plane_mask(&plane->base); plane 3128 drivers/gpu/drm/i915/display/intel_display.c struct drm_plane *plane; plane 3137 drivers/gpu/drm/i915/display/intel_display.c drm_for_each_plane_mask(plane, &dev_priv->drm, plane 3139 drivers/gpu/drm/i915/display/intel_display.c crtc_state->active_planes |= BIT(to_intel_plane(plane)->id); plane 3143 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane) plane 3148 drivers/gpu/drm/i915/display/intel_display.c to_intel_plane_state(plane->base.state); plane 3151 drivers/gpu/drm/i915/display/intel_display.c plane->base.base.id, plane->base.name, plane 3156 drivers/gpu/drm/i915/display/intel_display.c crtc_state->data_rate[plane->id] = 0; plane 3158 drivers/gpu/drm/i915/display/intel_display.c if (plane->id == PLANE_PRIMARY) plane 3161 drivers/gpu/drm/i915/display/intel_display.c intel_disable_plane(plane, crtc_state); plane 3390 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane_state->base.plane->dev); plane 3569 drivers/gpu/drm/i915/display/intel_display.c i9xx_plane_max_stride(struct intel_plane *plane, plane 3573 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 3588 drivers/gpu/drm/i915/display/intel_display.c if (plane->i9xx_plane == PLANE_C) plane 3617 drivers/gpu/drm/i915/display/intel_display.c to_i915(plane_state->base.plane->dev); plane 3671 drivers/gpu/drm/i915/display/intel_display.c to_i915(plane_state->base.plane->dev); plane 3723 drivers/gpu/drm/i915/display/intel_display.c static bool i9xx_plane_has_windowing(struct intel_plane *plane) plane 3725 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 3726 drivers/gpu/drm/i915/display/intel_display.c enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; plane 3743 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 3754 drivers/gpu/drm/i915/display/intel_display.c i9xx_plane_has_windowing(plane), plane 3775 drivers/gpu/drm/i915/display/intel_display.c static void i9xx_update_plane(struct intel_plane *plane, plane 3779 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 3780 drivers/gpu/drm/i915/display/intel_display.c enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; plane 3846 drivers/gpu/drm/i915/display/intel_display.c static void i9xx_disable_plane(struct intel_plane *plane, plane 3849 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 3850 drivers/gpu/drm/i915/display/intel_display.c enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; plane 3877 drivers/gpu/drm/i915/display/intel_display.c static bool i9xx_plane_get_hw_state(struct intel_plane *plane, plane 3880 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 3882 drivers/gpu/drm/i915/display/intel_display.c enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; plane 3892 drivers/gpu/drm/i915/display/intel_display.c power_domain = POWER_DOMAIN_PIPE(plane->pipe); plane 3902 drivers/gpu/drm/i915/display/intel_display.c *pipe = plane->pipe; plane 4141 drivers/gpu/drm/i915/display/intel_display.c to_i915(plane_state->base.plane->dev); plane 4197 drivers/gpu/drm/i915/display/intel_display.c to_i915(plane_state->base.plane->dev); plane 4199 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 4205 drivers/gpu/drm/i915/display/intel_display.c if (fb->format->is_yuv && !icl_is_hdr_plane(dev_priv, plane->id)) { plane 5533 drivers/gpu/drm/i915/display/intel_display.c to_intel_plane(plane_state->base.plane); plane 6043 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 6049 drivers/gpu/drm/i915/display/intel_display.c for_each_old_intel_plane_in_state(state, plane, old_plane_state, i) { plane 6050 drivers/gpu/drm/i915/display/intel_display.c if (crtc->pipe != plane->pipe || plane 6051 drivers/gpu/drm/i915/display/intel_display.c !(update_mask & BIT(plane->id))) plane 6054 drivers/gpu/drm/i915/display/intel_display.c intel_disable_plane(plane, new_crtc_state); plane 6057 drivers/gpu/drm/i915/display/intel_display.c fb_bits |= plane->frontbuffer_bit; plane 6300 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(crtc->base.primary); plane 6302 drivers/gpu/drm/i915/display/intel_display.c plane->disable_plane(plane, crtc_state); plane 7041 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 7050 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_plane_on_crtc(&dev_priv->drm, intel_crtc, plane) { plane 7052 drivers/gpu/drm/i915/display/intel_display.c to_intel_plane_state(plane->base.state); plane 7055 drivers/gpu/drm/i915/display/intel_display.c intel_plane_disable_noatomic(intel_crtc, plane); plane 8594 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(crtc->base.primary); plane 8595 drivers/gpu/drm/i915/display/intel_display.c enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; plane 8603 drivers/gpu/drm/i915/display/intel_display.c if (!plane->get_hw_state(plane, &pipe)) plane 8664 drivers/gpu/drm/i915/display/intel_display.c crtc->base.name, plane->base.name, fb->width, fb->height, plane 8751 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(crtc->base.primary); plane 8753 drivers/gpu/drm/i915/display/intel_display.c enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; plane 9797 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(crtc->base.primary); plane 9798 drivers/gpu/drm/i915/display/intel_display.c enum plane_id plane_id = plane->id; plane 9806 drivers/gpu/drm/i915/display/intel_display.c if (!plane->get_hw_state(plane, &pipe)) plane 9907 drivers/gpu/drm/i915/display/intel_display.c crtc->base.name, plane->base.name, fb->width, fb->height, plane 10507 drivers/gpu/drm/i915/display/intel_display.c to_i915(plane_state->base.plane->dev); plane 10552 drivers/gpu/drm/i915/display/intel_display.c &plane_state->base.plane->dev->mode_config; plane 10624 drivers/gpu/drm/i915/display/intel_display.c i845_cursor_max_stride(struct intel_plane *plane, plane 10702 drivers/gpu/drm/i915/display/intel_display.c static void i845_update_cursor(struct intel_plane *plane, plane 10706 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 10728 drivers/gpu/drm/i915/display/intel_display.c if (plane->cursor.base != base || plane 10729 drivers/gpu/drm/i915/display/intel_display.c plane->cursor.size != size || plane 10730 drivers/gpu/drm/i915/display/intel_display.c plane->cursor.cntl != cntl) { plane 10737 drivers/gpu/drm/i915/display/intel_display.c plane->cursor.base = base; plane 10738 drivers/gpu/drm/i915/display/intel_display.c plane->cursor.size = size; plane 10739 drivers/gpu/drm/i915/display/intel_display.c plane->cursor.cntl = cntl; plane 10747 drivers/gpu/drm/i915/display/intel_display.c static void i845_disable_cursor(struct intel_plane *plane, plane 10750 drivers/gpu/drm/i915/display/intel_display.c i845_update_cursor(plane, crtc_state, NULL); plane 10753 drivers/gpu/drm/i915/display/intel_display.c static bool i845_cursor_get_hw_state(struct intel_plane *plane, plane 10756 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 10776 drivers/gpu/drm/i915/display/intel_display.c i9xx_cursor_max_stride(struct intel_plane *plane, plane 10780 drivers/gpu/drm/i915/display/intel_display.c return plane->base.dev->mode_config.cursor_width * 4; plane 10808 drivers/gpu/drm/i915/display/intel_display.c to_i915(plane_state->base.plane->dev); plane 10838 drivers/gpu/drm/i915/display/intel_display.c to_i915(plane_state->base.plane->dev); plane 10876 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 10877 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 10879 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = plane->pipe; plane 10928 drivers/gpu/drm/i915/display/intel_display.c static void i9xx_update_cursor(struct intel_plane *plane, plane 10932 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 10933 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = plane->pipe; plane 10971 drivers/gpu/drm/i915/display/intel_display.c skl_write_cursor_wm(plane, crtc_state); plane 10973 drivers/gpu/drm/i915/display/intel_display.c if (plane->cursor.base != base || plane 10974 drivers/gpu/drm/i915/display/intel_display.c plane->cursor.size != fbc_ctl || plane 10975 drivers/gpu/drm/i915/display/intel_display.c plane->cursor.cntl != cntl) { plane 10982 drivers/gpu/drm/i915/display/intel_display.c plane->cursor.base = base; plane 10983 drivers/gpu/drm/i915/display/intel_display.c plane->cursor.size = fbc_ctl; plane 10984 drivers/gpu/drm/i915/display/intel_display.c plane->cursor.cntl = cntl; plane 10993 drivers/gpu/drm/i915/display/intel_display.c static void i9xx_disable_cursor(struct intel_plane *plane, plane 10996 drivers/gpu/drm/i915/display/intel_display.c i9xx_update_cursor(plane, crtc_state, NULL); plane 10999 drivers/gpu/drm/i915/display/intel_display.c static bool i9xx_cursor_get_hw_state(struct intel_plane *plane, plane 11002 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 11013 drivers/gpu/drm/i915/display/intel_display.c power_domain = POWER_DOMAIN_PIPE(plane->pipe); plane 11018 drivers/gpu/drm/i915/display/intel_display.c val = I915_READ(CURCNTR(plane->pipe)); plane 11023 drivers/gpu/drm/i915/display/intel_display.c *pipe = plane->pipe; plane 11064 drivers/gpu/drm/i915/display/intel_display.c struct drm_plane *plane; plane 11072 drivers/gpu/drm/i915/display/intel_display.c for_each_new_plane_in_state(state, plane, plane_state, i) { plane 11507 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 11516 drivers/gpu/drm/i915/display/intel_display.c if (INTEL_GEN(dev_priv) >= 9 && plane->id != PLANE_CURSOR) { plane 11540 drivers/gpu/drm/i915/display/intel_display.c crtc_state->active_planes &= ~BIT(plane->id); plane 11541 drivers/gpu/drm/i915/display/intel_display.c crtc_state->data_rate[plane->id] = 0; plane 11555 drivers/gpu/drm/i915/display/intel_display.c plane->base.base.id, plane->base.name, plane 11559 drivers/gpu/drm/i915/display/intel_display.c plane->base.base.id, plane->base.name, plane 11568 drivers/gpu/drm/i915/display/intel_display.c if (plane->id != PLANE_CURSOR) plane 11575 drivers/gpu/drm/i915/display/intel_display.c if (plane->id != PLANE_CURSOR) plane 11586 drivers/gpu/drm/i915/display/intel_display.c crtc_state->fb_bits |= plane->frontbuffer_bit; plane 11621 drivers/gpu/drm/i915/display/intel_display.c if (plane->id != PLANE_CURSOR && plane 11663 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane, *linked; plane 11667 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_plane_in_state(state, plane, plane_state, i) { plane 11677 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(linked_plane_state->linked_plane != plane); plane 11689 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane, *linked; plane 11700 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_plane_in_state(state, plane, plane_state, i) { plane 11701 drivers/gpu/drm/i915/display/intel_display.c if (plane->pipe != crtc->pipe || !plane_state->linked_plane) plane 11706 drivers/gpu/drm/i915/display/intel_display.c crtc_state->active_planes &= ~BIT(plane->id); plane 11707 drivers/gpu/drm/i915/display/intel_display.c crtc_state->update_planes |= BIT(plane->id); plane 11716 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_plane_in_state(state, plane, plane_state, i) { plane 11719 drivers/gpu/drm/i915/display/intel_display.c if (plane->pipe != crtc->pipe || plane 11720 drivers/gpu/drm/i915/display/intel_display.c !(crtc_state->nv12_planes & BIT(plane->id))) plane 11747 drivers/gpu/drm/i915/display/intel_display.c linked_state->linked_plane = plane; plane 11750 drivers/gpu/drm/i915/display/intel_display.c DRM_DEBUG_KMS("Using %s as Y plane for %s\n", linked->base.name, plane->base.name); plane 12046 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 12052 drivers/gpu/drm/i915/display/intel_display.c plane->base.base.id, plane->base.name, plane 12058 drivers/gpu/drm/i915/display/intel_display.c plane->base.base.id, plane->base.name, plane 12077 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 12166 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_plane_in_state(state, plane, plane_state, i) { plane 12167 drivers/gpu/drm/i915/display/intel_display.c if (plane->pipe == crtc->pipe) plane 12889 drivers/gpu/drm/i915/display/intel_display.c int plane, level, max_level = ilk_wm_max_level(dev_priv); plane 12913 drivers/gpu/drm/i915/display/intel_display.c for_each_universal_plane(dev_priv, pipe, plane) { plane 12916 drivers/gpu/drm/i915/display/intel_display.c hw_plane_wm = &hw->wm.planes[plane]; plane 12917 drivers/gpu/drm/i915/display/intel_display.c sw_plane_wm = &sw_wm->planes[plane]; plane 12926 drivers/gpu/drm/i915/display/intel_display.c pipe_name(pipe), plane + 1, level, plane 12938 drivers/gpu/drm/i915/display/intel_display.c pipe_name(pipe), plane + 1, plane 12948 drivers/gpu/drm/i915/display/intel_display.c hw_ddb_entry = &hw->ddb_y[plane]; plane 12949 drivers/gpu/drm/i915/display/intel_display.c sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[plane]; plane 12953 drivers/gpu/drm/i915/display/intel_display.c pipe_name(pipe), plane + 1, plane 13157 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 13161 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_plane_in_state(state, plane, plane 13163 drivers/gpu/drm/i915/display/intel_display.c assert_plane(plane, plane_state->slave || plane 14141 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 14144 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state, plane 14148 drivers/gpu/drm/i915/display/intel_display.c plane->frontbuffer_bit); plane 14304 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 14305 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 14309 drivers/gpu/drm/i915/display/intel_display.c if (plane->id == PLANE_CURSOR && plane 14365 drivers/gpu/drm/i915/display/intel_display.c intel_prepare_plane_fb(struct drm_plane *plane, plane 14370 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->dev); plane 14373 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_gem_object *old_obj = intel_fb_obj(plane->state->fb); plane 14379 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc(plane->state->crtc)); plane 14479 drivers/gpu/drm/i915/display/intel_display.c intel_cleanup_plane_fb(struct drm_plane *plane, plane 14484 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(plane->dev); plane 14605 drivers/gpu/drm/i915/display/intel_display.c void intel_plane_destroy(struct drm_plane *plane) plane 14607 drivers/gpu/drm/i915/display/intel_display.c drm_plane_cleanup(plane); plane 14608 drivers/gpu/drm/i915/display/intel_display.c kfree(to_intel_plane(plane)); plane 14685 drivers/gpu/drm/i915/display/intel_display.c intel_legacy_cursor_update(struct drm_plane *plane, plane 14696 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *intel_plane = to_intel_plane(plane); plane 14710 drivers/gpu/drm/i915/display/intel_display.c old_plane_state = plane->state; plane 14733 drivers/gpu/drm/i915/display/intel_display.c new_plane_state = intel_plane_duplicate_state(plane); plane 14774 drivers/gpu/drm/i915/display/intel_display.c plane->state = new_plane_state; plane 14788 drivers/gpu/drm/i915/display/intel_display.c if (plane->state->visible) plane 14790 drivers/gpu/drm/i915/display/intel_display.c to_intel_plane_state(plane->state)); plane 14802 drivers/gpu/drm/i915/display/intel_display.c intel_plane_destroy_state(plane, new_plane_state); plane 14804 drivers/gpu/drm/i915/display/intel_display.c intel_plane_destroy_state(plane, old_plane_state); plane 14808 drivers/gpu/drm/i915/display/intel_display.c return drm_atomic_helper_update_plane(plane, crtc, fb, plane 14842 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 14855 drivers/gpu/drm/i915/display/intel_display.c plane = intel_plane_alloc(); plane 14856 drivers/gpu/drm/i915/display/intel_display.c if (IS_ERR(plane)) plane 14857 drivers/gpu/drm/i915/display/intel_display.c return plane; plane 14859 drivers/gpu/drm/i915/display/intel_display.c plane->pipe = pipe; plane 14865 drivers/gpu/drm/i915/display/intel_display.c plane->i9xx_plane = (enum i9xx_plane_id) !pipe; plane 14867 drivers/gpu/drm/i915/display/intel_display.c plane->i9xx_plane = (enum i9xx_plane_id) pipe; plane 14868 drivers/gpu/drm/i915/display/intel_display.c plane->id = PLANE_PRIMARY; plane 14869 drivers/gpu/drm/i915/display/intel_display.c plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id); plane 14871 drivers/gpu/drm/i915/display/intel_display.c plane->has_fbc = i9xx_plane_has_fbc(dev_priv, plane->i9xx_plane); plane 14872 drivers/gpu/drm/i915/display/intel_display.c if (plane->has_fbc) { plane 14875 drivers/gpu/drm/i915/display/intel_display.c fbc->possible_framebuffer_bits |= plane->frontbuffer_bit; plane 14883 drivers/gpu/drm/i915/display/intel_display.c plane->max_stride = i9xx_plane_max_stride; plane 14884 drivers/gpu/drm/i915/display/intel_display.c plane->update_plane = i9xx_update_plane; plane 14885 drivers/gpu/drm/i915/display/intel_display.c plane->disable_plane = i9xx_disable_plane; plane 14886 drivers/gpu/drm/i915/display/intel_display.c plane->get_hw_state = i9xx_plane_get_hw_state; plane 14887 drivers/gpu/drm/i915/display/intel_display.c plane->check_plane = i9xx_plane_check; plane 14895 drivers/gpu/drm/i915/display/intel_display.c plane->max_stride = i9xx_plane_max_stride; plane 14896 drivers/gpu/drm/i915/display/intel_display.c plane->update_plane = i9xx_update_plane; plane 14897 drivers/gpu/drm/i915/display/intel_display.c plane->disable_plane = i9xx_disable_plane; plane 14898 drivers/gpu/drm/i915/display/intel_display.c plane->get_hw_state = i9xx_plane_get_hw_state; plane 14899 drivers/gpu/drm/i915/display/intel_display.c plane->check_plane = i9xx_plane_check; plane 14907 drivers/gpu/drm/i915/display/intel_display.c ret = drm_universal_plane_init(&dev_priv->drm, &plane->base, plane 14913 drivers/gpu/drm/i915/display/intel_display.c ret = drm_universal_plane_init(&dev_priv->drm, &plane->base, plane 14918 drivers/gpu/drm/i915/display/intel_display.c plane_name(plane->i9xx_plane)); plane 14934 drivers/gpu/drm/i915/display/intel_display.c drm_plane_create_rotation_property(&plane->base, plane 14938 drivers/gpu/drm/i915/display/intel_display.c drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs); plane 14940 drivers/gpu/drm/i915/display/intel_display.c return plane; plane 14943 drivers/gpu/drm/i915/display/intel_display.c intel_plane_free(plane); plane 15131 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 15133 drivers/gpu/drm/i915/display/intel_display.c plane = intel_sprite_plane_create(dev_priv, pipe, sprite); plane 15134 drivers/gpu/drm/i915/display/intel_display.c if (IS_ERR(plane)) { plane 15135 drivers/gpu/drm/i915/display/intel_display.c ret = PTR_ERR(plane); plane 15138 drivers/gpu/drm/i915/display/intel_display.c intel_crtc->plane_ids_mask |= BIT(plane->id); plane 16386 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = plane 16391 drivers/gpu/drm/i915/display/intel_display.c if (!plane->get_hw_state(plane, &pipe)) plane 16398 drivers/gpu/drm/i915/display/intel_display.c plane->base.base.id, plane->base.name); plane 16401 drivers/gpu/drm/i915/display/intel_display.c intel_plane_disable_noatomic(plane_crtc, plane); plane 16451 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 16454 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_plane_on_crtc(dev, crtc, plane) { plane 16456 drivers/gpu/drm/i915/display/intel_display.c to_intel_plane_state(plane->base.state); plane 16459 drivers/gpu/drm/i915/display/intel_display.c plane->base.type != DRM_PLANE_TYPE_PRIMARY) plane 16460 drivers/gpu/drm/i915/display/intel_display.c intel_plane_disable_noatomic(crtc, plane); plane 16630 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 16633 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_plane(&dev_priv->drm, plane) { plane 16635 drivers/gpu/drm/i915/display/intel_display.c to_intel_plane_state(plane->base.state); plane 16640 drivers/gpu/drm/i915/display/intel_display.c visible = plane->get_hw_state(plane, &pipe); plane 16648 drivers/gpu/drm/i915/display/intel_display.c plane->base.base.id, plane->base.name, plane 16780 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane; plane 16819 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { plane 16821 drivers/gpu/drm/i915/display/intel_display.c to_intel_plane_state(plane->base.state); plane 16828 drivers/gpu/drm/i915/display/intel_display.c crtc_state->data_rate[plane->id] = plane 17194 drivers/gpu/drm/i915/display/intel_display.c } plane[I915_MAX_PIPES]; plane 17248 drivers/gpu/drm/i915/display/intel_display.c error->plane[i].control = I915_READ(DSPCNTR(i)); plane 17249 drivers/gpu/drm/i915/display/intel_display.c error->plane[i].stride = I915_READ(DSPSTRIDE(i)); plane 17251 drivers/gpu/drm/i915/display/intel_display.c error->plane[i].size = I915_READ(DSPSIZE(i)); plane 17252 drivers/gpu/drm/i915/display/intel_display.c error->plane[i].pos = I915_READ(DSPPOS(i)); plane 17255 drivers/gpu/drm/i915/display/intel_display.c error->plane[i].addr = I915_READ(DSPADDR(i)); plane 17257 drivers/gpu/drm/i915/display/intel_display.c error->plane[i].surface = I915_READ(DSPSURF(i)); plane 17258 drivers/gpu/drm/i915/display/intel_display.c error->plane[i].tile_offset = I915_READ(DSPTILEOFF(i)); plane 17318 drivers/gpu/drm/i915/display/intel_display.c err_printf(m, " CNTR: %08x\n", error->plane[i].control); plane 17319 drivers/gpu/drm/i915/display/intel_display.c err_printf(m, " STRIDE: %08x\n", error->plane[i].stride); plane 17321 drivers/gpu/drm/i915/display/intel_display.c err_printf(m, " SIZE: %08x\n", error->plane[i].size); plane 17322 drivers/gpu/drm/i915/display/intel_display.c err_printf(m, " POS: %08x\n", error->plane[i].pos); plane 17325 drivers/gpu/drm/i915/display/intel_display.c err_printf(m, " ADDR: %08x\n", error->plane[i].addr); plane 17327 drivers/gpu/drm/i915/display/intel_display.c err_printf(m, " SURF: %08x\n", error->plane[i].surface); plane 17328 drivers/gpu/drm/i915/display/intel_display.c err_printf(m, " TILEOFF: %08x\n", error->plane[i].tile_offset); plane 372 drivers/gpu/drm/i915/display/intel_display.h #define for_each_old_intel_plane_in_state(__state, plane, old_plane_state, __i) \ plane 375 drivers/gpu/drm/i915/display/intel_display.h ((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \ plane 378 drivers/gpu/drm/i915/display/intel_display.h for_each_if(plane) plane 380 drivers/gpu/drm/i915/display/intel_display.h #define for_each_new_intel_plane_in_state(__state, plane, new_plane_state, __i) \ plane 383 drivers/gpu/drm/i915/display/intel_display.h ((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \ plane 386 drivers/gpu/drm/i915/display/intel_display.h for_each_if(plane) plane 396 drivers/gpu/drm/i915/display/intel_display.h #define for_each_oldnew_intel_plane_in_state(__state, plane, old_plane_state, new_plane_state, __i) \ plane 399 drivers/gpu/drm/i915/display/intel_display.h ((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \ plane 403 drivers/gpu/drm/i915/display/intel_display.h for_each_if(plane) plane 425 drivers/gpu/drm/i915/display/intel_display.h void intel_plane_destroy(struct drm_plane *plane); plane 439 drivers/gpu/drm/i915/display/intel_display.h int plane); plane 443 drivers/gpu/drm/i915/display/intel_display.h const struct intel_plane_state *state, int plane); plane 482 drivers/gpu/drm/i915/display/intel_display.h int intel_prepare_plane_fb(struct drm_plane *plane, plane 484 drivers/gpu/drm/i915/display/intel_display.h void intel_cleanup_plane_fb(struct drm_plane *plane, plane 532 drivers/gpu/drm/i915/display/intel_display.h int plane); plane 536 drivers/gpu/drm/i915/display/intel_display.h unsigned int i9xx_plane_max_stride(struct intel_plane *plane, plane 661 drivers/gpu/drm/i915/display/intel_display_types.h u16 plane[I915_MAX_PLANES]; plane 1051 drivers/gpu/drm/i915/display/intel_display_types.h unsigned int (*max_stride)(struct intel_plane *plane, plane 1054 drivers/gpu/drm/i915/display/intel_display_types.h void (*update_plane)(struct intel_plane *plane, plane 1057 drivers/gpu/drm/i915/display/intel_display_types.h void (*update_slave)(struct intel_plane *plane, plane 1060 drivers/gpu/drm/i915/display/intel_display_types.h void (*disable_plane)(struct intel_plane *plane, plane 1062 drivers/gpu/drm/i915/display/intel_display_types.h bool (*get_hw_state)(struct intel_plane *plane, enum pipe *pipe); plane 1346 drivers/gpu/drm/i915/display/intel_display_types.h intel_get_crtc_for_plane(struct drm_i915_private *dev_priv, enum i9xx_plane_id plane) plane 1348 drivers/gpu/drm/i915/display/intel_display_types.h return dev_priv->plane_to_crtc_mapping[plane]; plane 1449 drivers/gpu/drm/i915/display/intel_display_types.h struct intel_plane *plane) plane 1452 drivers/gpu/drm/i915/display/intel_display_types.h drm_atomic_get_plane_state(&state->base, &plane->base); plane 1462 drivers/gpu/drm/i915/display/intel_display_types.h struct intel_plane *plane) plane 1465 drivers/gpu/drm/i915/display/intel_display_types.h &plane->base)); plane 1470 drivers/gpu/drm/i915/display/intel_display_types.h struct intel_plane *plane) plane 1473 drivers/gpu/drm/i915/display/intel_display_types.h &plane->base)); plane 68 drivers/gpu/drm/i915/display/intel_fbc.c return fbc->state_cache.plane.y - fbc->state_cache.plane.adjusted_y; plane 80 drivers/gpu/drm/i915/display/intel_fbc.c *width = cache->plane.src_w; plane 82 drivers/gpu/drm/i915/display/intel_fbc.c *height = cache->plane.src_h; plane 651 drivers/gpu/drm/i915/display/intel_fbc.c effective_w += fbc->state_cache.plane.adjusted_x; plane 652 drivers/gpu/drm/i915/display/intel_fbc.c effective_h += fbc->state_cache.plane.adjusted_y; plane 673 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.rotation = plane_state->base.rotation; plane 679 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.src_w = drm_rect_width(&plane_state->base.src) >> 16; plane 680 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.src_h = drm_rect_height(&plane_state->base.src) >> 16; plane 681 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.visible = plane_state->base.visible; plane 682 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.adjusted_x = plane_state->color_plane[0].x; plane 683 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.adjusted_y = plane_state->color_plane[0].y; plane 684 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.y = plane_state->base.src.y1 >> 16; plane 686 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.pixel_blend_mode = plane_state->base.pixel_blend_mode; plane 688 drivers/gpu/drm/i915/display/intel_fbc.c if (!cache->plane.visible) plane 747 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.rotation != DRM_MODE_ROTATE_0) { plane 762 drivers/gpu/drm/i915/display/intel_fbc.c if (cache->plane.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE && plane 797 drivers/gpu/drm/i915/display/intel_fbc.c (fbc->state_cache.plane.adjusted_y & 3)) { plane 852 drivers/gpu/drm/i915/display/intel_fbc.c params->gen9_wa_cfb_stride = DIV_ROUND_UP(cache->plane.src_w, plane 1028 drivers/gpu/drm/i915/display/intel_fbc.c struct intel_plane *plane; plane 1047 drivers/gpu/drm/i915/display/intel_fbc.c for_each_new_intel_plane_in_state(state, plane, plane_state, i) { plane 1051 drivers/gpu/drm/i915/display/intel_fbc.c if (!plane->has_fbc) plane 255 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 272 drivers/gpu/drm/i915/display/intel_sprite.c max_stride = plane->max_stride(plane, fb->format->format, plane 278 drivers/gpu/drm/i915/display/intel_sprite.c plane->base.base.id, plane->base.name, max_stride); plane 341 drivers/gpu/drm/i915/display/intel_sprite.c skl_plane_max_stride(struct intel_plane *plane, plane 359 drivers/gpu/drm/i915/display/intel_sprite.c skl_program_scaler(struct intel_plane *plane, plane 363 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 364 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 385 drivers/gpu/drm/i915/display/intel_sprite.c !icl_is_hdr_plane(dev_priv, plane->id)) { plane 402 drivers/gpu/drm/i915/display/intel_sprite.c PS_SCALER_EN | PS_PLANE_SEL(plane->id) | scaler->mode); plane 421 drivers/gpu/drm/i915/display/intel_sprite.c icl_program_input_csc(struct intel_plane *plane, plane 425 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 426 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 427 drivers/gpu/drm/i915/display/intel_sprite.c enum plane_id plane_id = plane->id; plane 539 drivers/gpu/drm/i915/display/intel_sprite.c skl_program_plane(struct intel_plane *plane, plane 544 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 545 drivers/gpu/drm/i915/display/intel_sprite.c enum plane_id plane_id = plane->id; plane 546 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 619 drivers/gpu/drm/i915/display/intel_sprite.c icl_program_input_csc(plane, crtc_state, plane_state); plane 621 drivers/gpu/drm/i915/display/intel_sprite.c skl_write_plane_wm(plane, crtc_state); plane 644 drivers/gpu/drm/i915/display/intel_sprite.c skl_program_scaler(plane, crtc_state, plane_state); plane 650 drivers/gpu/drm/i915/display/intel_sprite.c skl_update_plane(struct intel_plane *plane, plane 661 drivers/gpu/drm/i915/display/intel_sprite.c skl_program_plane(plane, crtc_state, plane_state, plane 666 drivers/gpu/drm/i915/display/intel_sprite.c icl_update_slave(struct intel_plane *plane, plane 670 drivers/gpu/drm/i915/display/intel_sprite.c skl_program_plane(plane, crtc_state, plane_state, 0, true, plane 675 drivers/gpu/drm/i915/display/intel_sprite.c skl_disable_plane(struct intel_plane *plane, plane 678 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 679 drivers/gpu/drm/i915/display/intel_sprite.c enum plane_id plane_id = plane->id; plane 680 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 688 drivers/gpu/drm/i915/display/intel_sprite.c skl_write_plane_wm(plane, crtc_state); plane 697 drivers/gpu/drm/i915/display/intel_sprite.c skl_plane_get_hw_state(struct intel_plane *plane, plane 700 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 702 drivers/gpu/drm/i915/display/intel_sprite.c enum plane_id plane_id = plane->id; plane 706 drivers/gpu/drm/i915/display/intel_sprite.c power_domain = POWER_DOMAIN_PIPE(plane->pipe); plane 711 drivers/gpu/drm/i915/display/intel_sprite.c ret = I915_READ(PLANE_CTL(plane->pipe, plane_id)) & PLANE_CTL_ENABLE; plane 713 drivers/gpu/drm/i915/display/intel_sprite.c *pipe = plane->pipe; plane 733 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 734 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 736 drivers/gpu/drm/i915/display/intel_sprite.c enum plane_id plane_id = plane->id; plane 792 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 793 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 795 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 796 drivers/gpu/drm/i915/display/intel_sprite.c enum plane_id plane_id = plane->id; plane 907 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 908 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 910 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 911 drivers/gpu/drm/i915/display/intel_sprite.c enum plane_id plane_id = plane->id; plane 931 drivers/gpu/drm/i915/display/intel_sprite.c vlv_update_plane(struct intel_plane *plane, plane 935 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 936 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 937 drivers/gpu/drm/i915/display/intel_sprite.c enum plane_id plane_id = plane->id; plane 994 drivers/gpu/drm/i915/display/intel_sprite.c vlv_disable_plane(struct intel_plane *plane, plane 997 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 998 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 999 drivers/gpu/drm/i915/display/intel_sprite.c enum plane_id plane_id = plane->id; plane 1011 drivers/gpu/drm/i915/display/intel_sprite.c vlv_plane_get_hw_state(struct intel_plane *plane, plane 1014 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1016 drivers/gpu/drm/i915/display/intel_sprite.c enum plane_id plane_id = plane->id; plane 1020 drivers/gpu/drm/i915/display/intel_sprite.c power_domain = POWER_DOMAIN_PIPE(plane->pipe); plane 1025 drivers/gpu/drm/i915/display/intel_sprite.c ret = I915_READ(SPCNTR(plane->pipe, plane_id)) & SP_ENABLE; plane 1027 drivers/gpu/drm/i915/display/intel_sprite.c *pipe = plane->pipe; plane 1051 drivers/gpu/drm/i915/display/intel_sprite.c to_i915(plane_state->base.plane->dev); plane 1121 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1122 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1123 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 1148 drivers/gpu/drm/i915/display/intel_sprite.c ivb_update_plane(struct intel_plane *plane, plane 1152 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1153 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 1219 drivers/gpu/drm/i915/display/intel_sprite.c ivb_disable_plane(struct intel_plane *plane, plane 1222 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1223 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 1238 drivers/gpu/drm/i915/display/intel_sprite.c ivb_plane_get_hw_state(struct intel_plane *plane, plane 1241 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1246 drivers/gpu/drm/i915/display/intel_sprite.c power_domain = POWER_DOMAIN_PIPE(plane->pipe); plane 1251 drivers/gpu/drm/i915/display/intel_sprite.c ret = I915_READ(SPRCTL(plane->pipe)) & SPRITE_ENABLE; plane 1253 drivers/gpu/drm/i915/display/intel_sprite.c *pipe = plane->pipe; plane 1261 drivers/gpu/drm/i915/display/intel_sprite.c g4x_sprite_max_stride(struct intel_plane *plane, plane 1285 drivers/gpu/drm/i915/display/intel_sprite.c to_i915(plane_state->base.plane->dev); plane 1342 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1343 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1345 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 1374 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1375 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1377 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 1401 drivers/gpu/drm/i915/display/intel_sprite.c g4x_update_plane(struct intel_plane *plane, plane 1405 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1406 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 1468 drivers/gpu/drm/i915/display/intel_sprite.c g4x_disable_plane(struct intel_plane *plane, plane 1471 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1472 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = plane->pipe; plane 1486 drivers/gpu/drm/i915/display/intel_sprite.c g4x_plane_get_hw_state(struct intel_plane *plane, plane 1489 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1494 drivers/gpu/drm/i915/display/intel_sprite.c power_domain = POWER_DOMAIN_PIPE(plane->pipe); plane 1499 drivers/gpu/drm/i915/display/intel_sprite.c ret = I915_READ(DVSCNTR(plane->pipe)) & DVS_ENABLE; plane 1501 drivers/gpu/drm/i915/display/intel_sprite.c *pipe = plane->pipe; plane 1586 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1587 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1634 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1635 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1686 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1687 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1761 drivers/gpu/drm/i915/display/intel_sprite.c to_i915(plane_state->base.plane->dev); plane 1807 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1808 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1871 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1872 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1881 drivers/gpu/drm/i915/display/intel_sprite.c if (plane->id == PLANE_PRIMARY && plane 1889 drivers/gpu/drm/i915/display/intel_sprite.c if (INTEL_GEN(dev_priv) >= 9 && plane->id != PLANE_PRIMARY && plane 1899 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_plane *plane; plane 1919 drivers/gpu/drm/i915/display/intel_sprite.c plane = drm_plane_find(dev, file_priv, set->plane_id); plane 1920 drivers/gpu/drm/i915/display/intel_sprite.c if (!plane || plane->type != DRM_PLANE_TYPE_OVERLAY) plane 1929 drivers/gpu/drm/i915/display/intel_sprite.c to_intel_plane(plane)->id >= PLANE_SPRITE1 && plane 1935 drivers/gpu/drm/i915/display/intel_sprite.c state = drm_atomic_state_alloc(plane->dev); plane 1943 drivers/gpu/drm/i915/display/intel_sprite.c plane_state = drm_atomic_get_plane_state(state, plane); plane 1955 drivers/gpu/drm/i915/display/intel_sprite.c to_intel_plane(plane)->pipe); plane 2249 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane = to_intel_plane(_plane); plane 2259 drivers/gpu/drm/i915/display/intel_sprite.c if (!plane->has_ccs) plane 2433 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane; plane 2442 drivers/gpu/drm/i915/display/intel_sprite.c plane = intel_plane_alloc(); plane 2443 drivers/gpu/drm/i915/display/intel_sprite.c if (IS_ERR(plane)) plane 2444 drivers/gpu/drm/i915/display/intel_sprite.c return plane; plane 2446 drivers/gpu/drm/i915/display/intel_sprite.c plane->pipe = pipe; plane 2447 drivers/gpu/drm/i915/display/intel_sprite.c plane->id = plane_id; plane 2448 drivers/gpu/drm/i915/display/intel_sprite.c plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane_id); plane 2450 drivers/gpu/drm/i915/display/intel_sprite.c plane->has_fbc = skl_plane_has_fbc(dev_priv, pipe, plane_id); plane 2451 drivers/gpu/drm/i915/display/intel_sprite.c if (plane->has_fbc) { plane 2454 drivers/gpu/drm/i915/display/intel_sprite.c fbc->possible_framebuffer_bits |= plane->frontbuffer_bit; plane 2457 drivers/gpu/drm/i915/display/intel_sprite.c plane->max_stride = skl_plane_max_stride; plane 2458 drivers/gpu/drm/i915/display/intel_sprite.c plane->update_plane = skl_update_plane; plane 2459 drivers/gpu/drm/i915/display/intel_sprite.c plane->disable_plane = skl_disable_plane; plane 2460 drivers/gpu/drm/i915/display/intel_sprite.c plane->get_hw_state = skl_plane_get_hw_state; plane 2461 drivers/gpu/drm/i915/display/intel_sprite.c plane->check_plane = skl_plane_check; plane 2463 drivers/gpu/drm/i915/display/intel_sprite.c plane->update_slave = icl_update_slave; plane 2475 drivers/gpu/drm/i915/display/intel_sprite.c plane->has_ccs = skl_plane_has_ccs(dev_priv, pipe, plane_id); plane 2476 drivers/gpu/drm/i915/display/intel_sprite.c if (plane->has_ccs) plane 2488 drivers/gpu/drm/i915/display/intel_sprite.c ret = drm_universal_plane_init(&dev_priv->drm, &plane->base, plane 2504 drivers/gpu/drm/i915/display/intel_sprite.c drm_plane_create_rotation_property(&plane->base, plane 2508 drivers/gpu/drm/i915/display/intel_sprite.c drm_plane_create_color_properties(&plane->base, plane 2516 drivers/gpu/drm/i915/display/intel_sprite.c drm_plane_create_alpha_property(&plane->base); plane 2517 drivers/gpu/drm/i915/display/intel_sprite.c drm_plane_create_blend_mode_property(&plane->base, plane 2522 drivers/gpu/drm/i915/display/intel_sprite.c drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs); plane 2524 drivers/gpu/drm/i915/display/intel_sprite.c return plane; plane 2527 drivers/gpu/drm/i915/display/intel_sprite.c intel_plane_free(plane); plane 2536 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_plane *plane; plane 2549 drivers/gpu/drm/i915/display/intel_sprite.c plane = intel_plane_alloc(); plane 2550 drivers/gpu/drm/i915/display/intel_sprite.c if (IS_ERR(plane)) plane 2551 drivers/gpu/drm/i915/display/intel_sprite.c return plane; plane 2554 drivers/gpu/drm/i915/display/intel_sprite.c plane->max_stride = i9xx_plane_max_stride; plane 2555 drivers/gpu/drm/i915/display/intel_sprite.c plane->update_plane = vlv_update_plane; plane 2556 drivers/gpu/drm/i915/display/intel_sprite.c plane->disable_plane = vlv_disable_plane; plane 2557 drivers/gpu/drm/i915/display/intel_sprite.c plane->get_hw_state = vlv_plane_get_hw_state; plane 2558 drivers/gpu/drm/i915/display/intel_sprite.c plane->check_plane = vlv_sprite_check; plane 2566 drivers/gpu/drm/i915/display/intel_sprite.c plane->max_stride = g4x_sprite_max_stride; plane 2567 drivers/gpu/drm/i915/display/intel_sprite.c plane->update_plane = ivb_update_plane; plane 2568 drivers/gpu/drm/i915/display/intel_sprite.c plane->disable_plane = ivb_disable_plane; plane 2569 drivers/gpu/drm/i915/display/intel_sprite.c plane->get_hw_state = ivb_plane_get_hw_state; plane 2570 drivers/gpu/drm/i915/display/intel_sprite.c plane->check_plane = g4x_sprite_check; plane 2578 drivers/gpu/drm/i915/display/intel_sprite.c plane->max_stride = g4x_sprite_max_stride; plane 2579 drivers/gpu/drm/i915/display/intel_sprite.c plane->update_plane = g4x_update_plane; plane 2580 drivers/gpu/drm/i915/display/intel_sprite.c plane->disable_plane = g4x_disable_plane; plane 2581 drivers/gpu/drm/i915/display/intel_sprite.c plane->get_hw_state = g4x_plane_get_hw_state; plane 2582 drivers/gpu/drm/i915/display/intel_sprite.c plane->check_plane = g4x_sprite_check; plane 2607 drivers/gpu/drm/i915/display/intel_sprite.c plane->pipe = pipe; plane 2608 drivers/gpu/drm/i915/display/intel_sprite.c plane->id = PLANE_SPRITE0 + sprite; plane 2609 drivers/gpu/drm/i915/display/intel_sprite.c plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id); plane 2613 drivers/gpu/drm/i915/display/intel_sprite.c ret = drm_universal_plane_init(&dev_priv->drm, &plane->base, plane 2621 drivers/gpu/drm/i915/display/intel_sprite.c drm_plane_create_rotation_property(&plane->base, plane 2625 drivers/gpu/drm/i915/display/intel_sprite.c drm_plane_create_color_properties(&plane->base, plane 2633 drivers/gpu/drm/i915/display/intel_sprite.c drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs); plane 2635 drivers/gpu/drm/i915/display/intel_sprite.c return plane; plane 2638 drivers/gpu/drm/i915/display/intel_sprite.c intel_plane_free(plane); plane 24 drivers/gpu/drm/i915/display/intel_sprite.h enum pipe pipe, int plane); plane 1573 drivers/gpu/drm/i915/display/vlv_dsi.c struct intel_plane *plane; plane 1583 drivers/gpu/drm/i915/display/vlv_dsi.c plane = to_intel_plane(crtc->base.primary); plane 1590 drivers/gpu/drm/i915/display/vlv_dsi.c val = I915_READ(DSPCNTR(plane->i9xx_plane)); plane 1194 drivers/gpu/drm/i915/gvt/cmd_parser.c int plane; plane 1207 drivers/gpu/drm/i915/gvt/cmd_parser.c int plane; plane 1235 drivers/gpu/drm/i915/gvt/cmd_parser.c info->plane = gen8_plane_code[v].plane; plane 1242 drivers/gpu/drm/i915/gvt/cmd_parser.c if (info->plane == PLANE_A) { plane 1246 drivers/gpu/drm/i915/gvt/cmd_parser.c } else if (info->plane == PLANE_B) { plane 1265 drivers/gpu/drm/i915/gvt/cmd_parser.c u32 plane = (dword0 & GENMASK(12, 8)) >> 8; plane 1267 drivers/gpu/drm/i915/gvt/cmd_parser.c info->plane = PRIMARY_PLANE; plane 1269 drivers/gpu/drm/i915/gvt/cmd_parser.c switch (plane) { plane 1286 drivers/gpu/drm/i915/gvt/cmd_parser.c info->plane = SPRITE_PLANE; plane 1291 drivers/gpu/drm/i915/gvt/cmd_parser.c info->plane = SPRITE_PLANE; plane 1296 drivers/gpu/drm/i915/gvt/cmd_parser.c info->plane = SPRITE_PLANE; plane 1300 drivers/gpu/drm/i915/gvt/cmd_parser.c gvt_vgpu_err("unknown plane code %d\n", plane); plane 1365 drivers/gpu/drm/i915/gvt/cmd_parser.c if (info->plane == PLANE_PRIMARY) plane 203 drivers/gpu/drm/i915/gvt/fb_decoder.c struct intel_vgpu_primary_plane_format *plane) plane 214 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->enabled = !!(val & DISPLAY_PLANE_ENABLE); plane 215 drivers/gpu/drm/i915/gvt/fb_decoder.c if (!plane->enabled) plane 219 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->tiled = val & PLANE_CTL_TILED_MASK; plane 231 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->bpp = skl_pixel_formats[fmt].bpp; plane 232 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->drm_format = skl_pixel_formats[fmt].drm_format; plane 234 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->tiled = val & DISPPLANE_TILED; plane 236 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->bpp = bdw_pixel_formats[fmt].bpp; plane 237 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->drm_format = bdw_pixel_formats[fmt].drm_format; plane 240 drivers/gpu/drm/i915/gvt/fb_decoder.c if (!plane->bpp) { plane 245 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->hw_format = fmt; plane 247 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->base = vgpu_vreg_t(vgpu, DSPSURF(pipe)) & I915_GTT_PAGE_MASK; plane 248 drivers/gpu/drm/i915/gvt/fb_decoder.c if (!vgpu_gmadr_is_valid(vgpu, plane->base)) plane 251 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); plane 252 drivers/gpu/drm/i915/gvt/fb_decoder.c if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) { plane 254 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->base); plane 258 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->stride = intel_vgpu_get_stride(vgpu, pipe, plane->tiled, plane 261 drivers/gpu/drm/i915/gvt/fb_decoder.c _PRI_PLANE_STRIDE_MASK, plane->bpp); plane 263 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->width = (vgpu_vreg_t(vgpu, PIPESRC(pipe)) & _PIPE_H_SRCSZ_MASK) >> plane 265 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->width += 1; plane 266 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->height = (vgpu_vreg_t(vgpu, PIPESRC(pipe)) & plane 268 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->height += 1; /* raw height is one minus the real value */ plane 271 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->x_offset = (val & _PRI_PLANE_X_OFF_MASK) >> plane 273 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->y_offset = (val & _PRI_PLANE_Y_OFF_MASK) >> plane 333 drivers/gpu/drm/i915/gvt/fb_decoder.c struct intel_vgpu_cursor_plane_format *plane) plane 346 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->enabled = (mode != MCURSOR_MODE_DISABLE); plane 347 drivers/gpu/drm/i915/gvt/fb_decoder.c if (!plane->enabled) plane 356 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->mode = mode; plane 357 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->bpp = cursor_pixel_formats[index].bpp; plane 358 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->drm_format = cursor_pixel_formats[index].drm_format; plane 359 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->width = cursor_pixel_formats[index].width; plane 360 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->height = cursor_pixel_formats[index].height; plane 370 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->base = vgpu_vreg_t(vgpu, CURBASE(pipe)) & I915_GTT_PAGE_MASK; plane 371 drivers/gpu/drm/i915/gvt/fb_decoder.c if (!vgpu_gmadr_is_valid(vgpu, plane->base)) plane 374 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); plane 375 drivers/gpu/drm/i915/gvt/fb_decoder.c if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) { plane 377 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->base); plane 382 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->x_pos = (val & _CURSOR_POS_X_MASK) >> _CURSOR_POS_X_SHIFT; plane 383 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->x_sign = (val & _CURSOR_SIGN_X_MASK) >> _CURSOR_SIGN_X_SHIFT; plane 384 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->y_pos = (val & _CURSOR_POS_Y_MASK) >> _CURSOR_POS_Y_SHIFT; plane 385 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->y_sign = (val & _CURSOR_SIGN_Y_MASK) >> _CURSOR_SIGN_Y_SHIFT; plane 387 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->x_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_x_hot)); plane 388 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->y_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot)); plane 412 drivers/gpu/drm/i915/gvt/fb_decoder.c struct intel_vgpu_sprite_plane_format *plane) plane 424 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->enabled = !!(val & SPRITE_ENABLE); plane 425 drivers/gpu/drm/i915/gvt/fb_decoder.c if (!plane->enabled) plane 428 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->tiled = !!(val & SPRITE_TILED); plane 438 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->hw_format = fmt; plane 439 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->bpp = sprite_pixel_formats[fmt].bpp; plane 472 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->drm_format = drm_format; plane 474 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->base = vgpu_vreg_t(vgpu, SPRSURF(pipe)) & I915_GTT_PAGE_MASK; plane 475 drivers/gpu/drm/i915/gvt/fb_decoder.c if (!vgpu_gmadr_is_valid(vgpu, plane->base)) plane 478 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); plane 479 drivers/gpu/drm/i915/gvt/fb_decoder.c if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) { plane 481 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->base); plane 485 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->stride = vgpu_vreg_t(vgpu, SPRSTRIDE(pipe)) & plane 489 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->height = (val & _SPRITE_SIZE_HEIGHT_MASK) >> plane 491 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->width = (val & _SPRITE_SIZE_WIDTH_MASK) >> plane 493 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->height += 1; /* raw height is one minus the real value */ plane 494 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->width += 1; /* raw width is one minus the real value */ plane 497 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->x_pos = (val & _SPRITE_POS_X_MASK) >> _SPRITE_POS_X_SHIFT; plane 498 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->y_pos = (val & _SPRITE_POS_Y_MASK) >> _SPRITE_POS_Y_SHIFT; plane 501 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->x_offset = (val & _SPRITE_OFFSET_START_X_MASK) >> plane 503 drivers/gpu/drm/i915/gvt/fb_decoder.c plane->y_offset = (val & _SPRITE_OFFSET_START_Y_MASK) >> plane 163 drivers/gpu/drm/i915/gvt/fb_decoder.h struct intel_vgpu_primary_plane_format *plane); plane 165 drivers/gpu/drm/i915/gvt/fb_decoder.h struct intel_vgpu_cursor_plane_format *plane); plane 167 drivers/gpu/drm/i915/gvt/fb_decoder.h struct intel_vgpu_sprite_plane_format *plane); plane 797 drivers/gpu/drm/i915/gvt/handlers.c enum plane_id plane = REG_50080_TO_PLANE(offset); plane 798 drivers/gpu/drm/i915/gvt/handlers.c int event = SKL_FLIP_EVENT(pipe, plane); plane 801 drivers/gpu/drm/i915/gvt/handlers.c if (plane == PLANE_PRIMARY) { plane 60 drivers/gpu/drm/i915/gvt/reg.h #define _REG_701C0(pipe, plane) (0x701c0 + pipe * 0x1000 + (plane - 1) * 0x100) plane 61 drivers/gpu/drm/i915/gvt/reg.h #define _REG_701C4(pipe, plane) (0x701c4 + pipe * 0x1000 + (plane - 1) * 0x100) plane 63 drivers/gpu/drm/i915/gvt/reg.h #define SKL_FLIP_EVENT(pipe, plane) (PRIMARY_A_FLIP_DONE + (plane) * 3 + (pipe)) plane 186 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.rotated.plane[0].width, plane 187 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.rotated.plane[0].height, plane 188 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.rotated.plane[0].stride, plane 189 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.rotated.plane[0].offset, plane 190 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.rotated.plane[1].width, plane 191 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.rotated.plane[1].height, plane 192 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.rotated.plane[1].stride, plane 193 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.rotated.plane[1].offset); plane 198 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.remapped.plane[0].width, plane 199 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.remapped.plane[0].height, plane 200 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.remapped.plane[0].stride, plane 201 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.remapped.plane[0].offset, plane 202 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.remapped.plane[1].width, plane 203 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.remapped.plane[1].height, plane 204 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.remapped.plane[1].stride, plane 205 drivers/gpu/drm/i915/i915_debugfs.c vma->ggtt_view.remapped.plane[1].offset); plane 2651 drivers/gpu/drm/i915/i915_debugfs.c struct drm_plane *plane = &intel_plane->base; plane 2655 drivers/gpu/drm/i915/i915_debugfs.c if (!plane->state) { plane 2660 drivers/gpu/drm/i915/i915_debugfs.c state = plane->state; plane 2672 drivers/gpu/drm/i915/i915_debugfs.c plane->base.id, plane 403 drivers/gpu/drm/i915/i915_drv.h } plane; plane 846 drivers/gpu/drm/i915/i915_drv.h u16 plane[I915_MAX_PLANES]; plane 851 drivers/gpu/drm/i915/i915_drv.h u16 plane; plane 857 drivers/gpu/drm/i915/i915_drv.h u8 plane[I915_MAX_PLANES]; plane 3407 drivers/gpu/drm/i915/i915_gem_gtt.c for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++) { plane 3408 drivers/gpu/drm/i915/i915_gem_gtt.c sg = rotate_pages(obj, rot_info->plane[i].offset, plane 3409 drivers/gpu/drm/i915/i915_gem_gtt.c rot_info->plane[i].width, rot_info->plane[i].height, plane 3410 drivers/gpu/drm/i915/i915_gem_gtt.c rot_info->plane[i].stride, st, sg); plane 3420 drivers/gpu/drm/i915/i915_gem_gtt.c obj->base.size, rot_info->plane[0].width, rot_info->plane[0].height, size); plane 3488 drivers/gpu/drm/i915/i915_gem_gtt.c for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) { plane 3489 drivers/gpu/drm/i915/i915_gem_gtt.c sg = remap_pages(obj, rem_info->plane[i].offset, plane 3490 drivers/gpu/drm/i915/i915_gem_gtt.c rem_info->plane[i].width, rem_info->plane[i].height, plane 3491 drivers/gpu/drm/i915/i915_gem_gtt.c rem_info->plane[i].stride, st, sg); plane 3503 drivers/gpu/drm/i915/i915_gem_gtt.c obj->base.size, rem_info->plane[0].width, rem_info->plane[0].height, size); plane 160 drivers/gpu/drm/i915/i915_gem_gtt.h struct intel_remapped_plane_info plane[2]; plane 165 drivers/gpu/drm/i915/i915_gem_gtt.h struct intel_remapped_plane_info plane[2]; plane 187 drivers/gpu/drm/i915/i915_gem_gtt.h BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) != plane 188 drivers/gpu/drm/i915/i915_gem_gtt.h offsetof(struct intel_rotation_info, plane[0])); plane 189 drivers/gpu/drm/i915/i915_gem_gtt.h BUILD_BUG_ON(offsetofend(struct intel_remapped_info, plane[1]) != plane 190 drivers/gpu/drm/i915/i915_gem_gtt.h offsetofend(struct intel_rotation_info, plane[1])); plane 229 drivers/gpu/drm/i915/i915_reg.h #define _PLANE(plane, a, b) _PICK_EVEN(plane, a, b) plane 235 drivers/gpu/drm/i915/i915_reg.h #define _MMIO_PLANE(plane, a, b) _MMIO(_PLANE(plane, a, b)) plane 2730 drivers/gpu/drm/i915/i915_reg.h #define DISPLAY_PLANE_FLIP_PENDING(plane) (1 << (11 - (plane))) /* A and B only */ plane 3105 drivers/gpu/drm/i915/i915_reg.h #define FBC_CTL_PLANE(plane) ((plane) << 0) plane 3118 drivers/gpu/drm/i915/i915_reg.h #define DPFC_CTL_PLANE(plane) ((plane) << 30) plane 3119 drivers/gpu/drm/i915/i915_reg.h #define IVB_DPFC_CTL_PLANE(plane) ((plane) << 29) plane 6068 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_WM_BASE(pipe, plane) \ plane 6069 drivers/gpu/drm/i915/i915_reg.h _PLANE(plane, _PLANE_WM_1(pipe), _PLANE_WM_2(pipe)) plane 6070 drivers/gpu/drm/i915/i915_reg.h #define PLANE_WM(pipe, plane, level) \ plane 6071 drivers/gpu/drm/i915/i915_reg.h _MMIO(_PLANE_WM_BASE(pipe, plane) + ((4) * (level))) plane 6076 drivers/gpu/drm/i915/i915_reg.h #define PLANE_WM_TRANS(pipe, plane) \ plane 6077 drivers/gpu/drm/i915/i915_reg.h _MMIO(_PLANE(plane, _PLANE_WM_TRANS_1(pipe), _PLANE_WM_TRANS_2(pipe))) plane 6264 drivers/gpu/drm/i915/i915_reg.h #define DSPCNTR(plane) _MMIO_PIPE2(plane, _DSPACNTR) plane 6265 drivers/gpu/drm/i915/i915_reg.h #define DSPADDR(plane) _MMIO_PIPE2(plane, _DSPAADDR) plane 6266 drivers/gpu/drm/i915/i915_reg.h #define DSPSTRIDE(plane) _MMIO_PIPE2(plane, _DSPASTRIDE) plane 6267 drivers/gpu/drm/i915/i915_reg.h #define DSPPOS(plane) _MMIO_PIPE2(plane, _DSPAPOS) plane 6268 drivers/gpu/drm/i915/i915_reg.h #define DSPSIZE(plane) _MMIO_PIPE2(plane, _DSPASIZE) plane 6269 drivers/gpu/drm/i915/i915_reg.h #define DSPSURF(plane) _MMIO_PIPE2(plane, _DSPASURF) plane 6270 drivers/gpu/drm/i915/i915_reg.h #define DSPTILEOFF(plane) _MMIO_PIPE2(plane, _DSPATILEOFF) plane 6271 drivers/gpu/drm/i915/i915_reg.h #define DSPLINOFF(plane) DSPADDR(plane) plane 6272 drivers/gpu/drm/i915/i915_reg.h #define DSPOFFSET(plane) _MMIO_PIPE2(plane, _DSPAOFFSET) plane 6273 drivers/gpu/drm/i915/i915_reg.h #define DSPSURFLIVE(plane) _MMIO_PIPE2(plane, _DSPASURFLIVE) plane 6274 drivers/gpu/drm/i915/i915_reg.h #define DSPGAMC(plane, i) _MMIO(_PIPE2(plane, _DSPAGAMC) + (5 - (i)) * 4) /* plane C only, 6 x u0.8 */ plane 6290 drivers/gpu/drm/i915/i915_reg.h #define PRIMPOS(plane) _MMIO_TRANS2(plane, _PRIMPOS_A) plane 6291 drivers/gpu/drm/i915/i915_reg.h #define PRIMSIZE(plane) _MMIO_TRANS2(plane, _PRIMSIZE_A) plane 6292 drivers/gpu/drm/i915/i915_reg.h #define PRIMCNSTALPHA(plane) _MMIO_TRANS2(plane, _PRIMCNSTALPHA_A) plane 6756 drivers/gpu/drm/i915/i915_reg.h #define PLANE_INPUT_CSC_COEFF(pipe, plane, index) \ plane 6757 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_INPUT_CSC_RY_GY_1(pipe) + (index) * 4, \ plane 6772 drivers/gpu/drm/i915/i915_reg.h #define PLANE_INPUT_CSC_PREOFF(pipe, plane, index) \ plane 6773 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_INPUT_CSC_PREOFF_HI_1(pipe) + (index) * 4, \ plane 6788 drivers/gpu/drm/i915/i915_reg.h #define PLANE_INPUT_CSC_POSTOFF(pipe, plane, index) \ plane 6789 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_INPUT_CSC_POSTOFF_HI_1(pipe) + (index) * 4, \ plane 6798 drivers/gpu/drm/i915/i915_reg.h #define PLANE_CTL(pipe, plane) \ plane 6799 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_CTL_1(pipe), _PLANE_CTL_2(pipe)) plane 6810 drivers/gpu/drm/i915/i915_reg.h #define PLANE_STRIDE(pipe, plane) \ plane 6811 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_STRIDE_1(pipe), _PLANE_STRIDE_2(pipe)) plane 6819 drivers/gpu/drm/i915/i915_reg.h #define PLANE_POS(pipe, plane) \ plane 6820 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_POS_1(pipe), _PLANE_POS_2(pipe)) plane 6828 drivers/gpu/drm/i915/i915_reg.h #define PLANE_SIZE(pipe, plane) \ plane 6829 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_SIZE_1(pipe), _PLANE_SIZE_2(pipe)) plane 6837 drivers/gpu/drm/i915/i915_reg.h #define PLANE_SURF(pipe, plane) \ plane 6838 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_SURF_1(pipe), _PLANE_SURF_2(pipe)) plane 6844 drivers/gpu/drm/i915/i915_reg.h #define PLANE_OFFSET(pipe, plane) \ plane 6845 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_OFFSET_1(pipe), _PLANE_OFFSET_2(pipe)) plane 6851 drivers/gpu/drm/i915/i915_reg.h #define PLANE_KEYVAL(pipe, plane) \ plane 6852 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_KEYVAL_1(pipe), _PLANE_KEYVAL_2(pipe)) plane 6858 drivers/gpu/drm/i915/i915_reg.h #define PLANE_KEYMSK(pipe, plane) \ plane 6859 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_KEYMSK_1(pipe), _PLANE_KEYMSK_2(pipe)) plane 6865 drivers/gpu/drm/i915/i915_reg.h #define PLANE_KEYMAX(pipe, plane) \ plane 6866 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_KEYMAX_1(pipe), _PLANE_KEYMAX_2(pipe)) plane 6876 drivers/gpu/drm/i915/i915_reg.h #define PLANE_BUF_CFG(pipe, plane) \ plane 6877 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_BUF_CFG_1(pipe), _PLANE_BUF_CFG_2(pipe)) plane 6885 drivers/gpu/drm/i915/i915_reg.h #define PLANE_NV12_BUF_CFG(pipe, plane) \ plane 6886 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_NV12_BUF_CFG_1(pipe), _PLANE_NV12_BUF_CFG_2(pipe)) plane 6894 drivers/gpu/drm/i915/i915_reg.h #define PLANE_AUX_DIST(pipe, plane) \ plane 6895 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_AUX_DIST_1(pipe), _PLANE_AUX_DIST_2(pipe)) plane 6903 drivers/gpu/drm/i915/i915_reg.h #define PLANE_AUX_OFFSET(pipe, plane) \ plane 6904 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_AUX_OFFSET_1(pipe), _PLANE_AUX_OFFSET_2(pipe)) plane 6912 drivers/gpu/drm/i915/i915_reg.h #define PLANE_CUS_CTL(pipe, plane) \ plane 6913 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_CUS_CTL_1(pipe), _PLANE_CUS_CTL_2(pipe)) plane 6922 drivers/gpu/drm/i915/i915_reg.h #define PLANE_COLOR_CTL(pipe, plane) \ plane 6923 drivers/gpu/drm/i915/i915_reg.h _MMIO_PLANE(plane, _PLANE_COLOR_CTL_1(pipe), _PLANE_COLOR_CTL_2(pipe)) plane 7075 drivers/gpu/drm/i915/i915_reg.h #define PS_PLANE_SEL(plane) (((plane) + 1) << 25) plane 7091 drivers/gpu/drm/i915/i915_reg.h #define PS_PLANE_Y_SEL(plane) (((plane) + 1) << 5) plane 7236 drivers/gpu/drm/i915/i915_reg.h #define DE_PLANE_FLIP_DONE(plane) (1 << (26 + (plane))) plane 7278 drivers/gpu/drm/i915/i915_reg.h #define DE_PLANE_FLIP_DONE_IVB(plane) (1 << (3 + 5 * (plane))) plane 199 drivers/gpu/drm/i915/i915_trace.h __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY]; plane 200 drivers/gpu/drm/i915/i915_trace.h __entry->sprite = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0]; plane 201 drivers/gpu/drm/i915/i915_trace.h __entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR]; plane 202 drivers/gpu/drm/i915/i915_trace.h __entry->sr_plane = wm->sr.plane; plane 205 drivers/gpu/drm/i915/i915_trace.h __entry->hpll_plane = wm->hpll.plane; plane 245 drivers/gpu/drm/i915/i915_trace.h __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY]; plane 246 drivers/gpu/drm/i915/i915_trace.h __entry->sprite0 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0]; plane 247 drivers/gpu/drm/i915/i915_trace.h __entry->sprite1 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE1]; plane 248 drivers/gpu/drm/i915/i915_trace.h __entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR]; plane 249 drivers/gpu/drm/i915/i915_trace.h __entry->sr_plane = wm->sr.plane; plane 291 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc), plane 292 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(plane, crtc), plane 300 drivers/gpu/drm/i915/i915_trace.h __string(name, plane->name) plane 304 drivers/gpu/drm/i915/i915_trace.h __assign_str(name, plane->name); plane 308 drivers/gpu/drm/i915/i915_trace.h memcpy(__entry->src, &plane->state->src, sizeof(__entry->src)); plane 309 drivers/gpu/drm/i915/i915_trace.h memcpy(__entry->dst, &plane->state->dst, sizeof(__entry->dst)); plane 320 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc), plane 321 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(plane, crtc), plane 327 drivers/gpu/drm/i915/i915_trace.h __string(name, plane->name) plane 331 drivers/gpu/drm/i915/i915_trace.h __assign_str(name, plane->name); plane 367 drivers/gpu/drm/i915/intel_pm.c #define FW_WM(value, plane) \ plane 368 drivers/gpu/drm/i915/intel_pm.c (((value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK) plane 526 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[PLANE_PRIMARY] = sprite0_start; plane 527 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[PLANE_SPRITE0] = sprite1_start - sprite0_start; plane 528 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[PLANE_SPRITE1] = 511 - sprite1_start; plane 529 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[PLANE_CURSOR] = 63; plane 826 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 840 drivers/gpu/drm/i915/intel_pm.c if (plane->id == PLANE_CURSOR) plane 958 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->sr.plane, SR) | plane 959 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) | plane 960 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) | plane 961 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA)); plane 966 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEB) | plane 967 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) | plane 968 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA)); plane 973 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->hpll.plane, HPLL_SR)); plane 978 drivers/gpu/drm/i915/intel_pm.c #define FW_WM_VLV(value, plane) \ plane 979 drivers/gpu/drm/i915/intel_pm.c (((value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK_VLV) plane 990 drivers/gpu/drm/i915/intel_pm.c (wm->ddl[pipe].plane[PLANE_CURSOR] << DDL_CURSOR_SHIFT) | plane 991 drivers/gpu/drm/i915/intel_pm.c (wm->ddl[pipe].plane[PLANE_SPRITE1] << DDL_SPRITE_SHIFT(1)) | plane 992 drivers/gpu/drm/i915/intel_pm.c (wm->ddl[pipe].plane[PLANE_SPRITE0] << DDL_SPRITE_SHIFT(0)) | plane 993 drivers/gpu/drm/i915/intel_pm.c (wm->ddl[pipe].plane[PLANE_PRIMARY] << DDL_PLANE_SHIFT)); plane 1008 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->sr.plane, SR) | plane 1009 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) | plane 1010 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) | plane 1011 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA)); plane 1013 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_SPRITE1], SPRITEB) | plane 1014 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) | plane 1015 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA)); plane 1021 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE1], SPRITED) | plane 1022 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC)); plane 1024 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE1], SPRITEF) | plane 1025 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE0], SPRITEE)); plane 1027 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_PRIMARY], PLANEC) | plane 1028 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC)); plane 1030 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->sr.plane >> 9, SR_HI) | plane 1031 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) | plane 1032 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) | plane 1033 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) | plane 1034 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) | plane 1035 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) | plane 1036 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) | plane 1037 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) | plane 1038 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) | plane 1039 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI)); plane 1042 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE1], SPRITED) | plane 1043 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC)); plane 1045 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->sr.plane >> 9, SR_HI) | plane 1046 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) | plane 1047 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) | plane 1048 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) | plane 1049 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) | plane 1050 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) | plane 1051 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI)); plane 1115 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1116 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1141 drivers/gpu/drm/i915/intel_pm.c if (IS_GM45(dev_priv) && plane->id == PLANE_PRIMARY && plane 1148 drivers/gpu/drm/i915/intel_pm.c if (plane->id == PLANE_CURSOR) plane 1153 drivers/gpu/drm/i915/intel_pm.c if (plane->id == PLANE_CURSOR) { plane 1155 drivers/gpu/drm/i915/intel_pm.c } else if (plane->id == PLANE_PRIMARY && plane 1167 drivers/gpu/drm/i915/intel_pm.c wm += g4x_tlb_miss_wa(g4x_plane_fifo_size(plane->id, level), plane 1184 drivers/gpu/drm/i915/intel_pm.c dirty |= raw->plane[plane_id] != value; plane 1185 drivers/gpu/drm/i915/intel_pm.c raw->plane[plane_id] = value; plane 1217 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1218 drivers/gpu/drm/i915/intel_pm.c int num_levels = intel_wm_num_levels(to_i915(plane->base.dev)); plane 1219 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = plane->id; plane 1240 drivers/gpu/drm/i915/intel_pm.c dirty |= raw->plane[plane_id] != wm; plane 1241 drivers/gpu/drm/i915/intel_pm.c raw->plane[plane_id] = wm; plane 1248 drivers/gpu/drm/i915/intel_pm.c raw->plane[plane_id]); plane 1271 drivers/gpu/drm/i915/intel_pm.c plane->base.name, plane 1272 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.g4x.raw[G4X_WM_LEVEL_NORMAL].plane[plane_id], plane 1273 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id], plane 1274 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]); plane 1290 drivers/gpu/drm/i915/intel_pm.c return raw->plane[plane_id] <= g4x_plane_fifo_size(plane_id, level); plane 1314 drivers/gpu/drm/i915/intel_pm.c wm_state->wm.plane[plane_id] = USHRT_MAX; plane 1320 drivers/gpu/drm/i915/intel_pm.c wm_state->sr.plane = USHRT_MAX; plane 1327 drivers/gpu/drm/i915/intel_pm.c wm_state->hpll.plane = USHRT_MAX; plane 1343 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane; plane 1348 drivers/gpu/drm/i915/intel_pm.c for_each_oldnew_intel_plane_in_state(state, plane, plane 1356 drivers/gpu/drm/i915/intel_pm.c dirty |= BIT(plane->id); plane 1368 drivers/gpu/drm/i915/intel_pm.c wm_state->wm.plane[plane_id] = raw->plane[plane_id]; plane 1376 drivers/gpu/drm/i915/intel_pm.c wm_state->sr.plane = raw->plane[PLANE_PRIMARY]; plane 1377 drivers/gpu/drm/i915/intel_pm.c wm_state->sr.cursor = raw->plane[PLANE_CURSOR]; plane 1388 drivers/gpu/drm/i915/intel_pm.c wm_state->hpll.plane = raw->plane[PLANE_PRIMARY]; plane 1389 drivers/gpu/drm/i915/intel_pm.c wm_state->hpll.cursor = raw->plane[PLANE_CURSOR]; plane 1448 drivers/gpu/drm/i915/intel_pm.c intermediate->wm.plane[plane_id] = plane 1449 drivers/gpu/drm/i915/intel_pm.c max(optimal->wm.plane[plane_id], plane 1450 drivers/gpu/drm/i915/intel_pm.c active->wm.plane[plane_id]); plane 1452 drivers/gpu/drm/i915/intel_pm.c WARN_ON(intermediate->wm.plane[plane_id] > plane 1456 drivers/gpu/drm/i915/intel_pm.c intermediate->sr.plane = max(optimal->sr.plane, plane 1457 drivers/gpu/drm/i915/intel_pm.c active->sr.plane); plane 1463 drivers/gpu/drm/i915/intel_pm.c intermediate->hpll.plane = max(optimal->hpll.plane, plane 1464 drivers/gpu/drm/i915/intel_pm.c active->hpll.plane); plane 1470 drivers/gpu/drm/i915/intel_pm.c WARN_ON((intermediate->sr.plane > plane 1475 drivers/gpu/drm/i915/intel_pm.c WARN_ON((intermediate->sr.plane > plane 1624 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1625 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 1641 drivers/gpu/drm/i915/intel_pm.c if (plane->id == PLANE_CURSOR) { plane 1688 drivers/gpu/drm/i915/intel_pm.c total_rate = raw->plane[PLANE_PRIMARY] + plane 1689 drivers/gpu/drm/i915/intel_pm.c raw->plane[PLANE_SPRITE0] + plane 1690 drivers/gpu/drm/i915/intel_pm.c raw->plane[PLANE_SPRITE1] + plane 1703 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[plane_id] = 0; plane 1707 drivers/gpu/drm/i915/intel_pm.c rate = raw->plane[plane_id]; plane 1708 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[plane_id] = fifo_size * rate / total_rate; plane 1709 drivers/gpu/drm/i915/intel_pm.c fifo_left -= fifo_state->plane[plane_id]; plane 1712 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[PLANE_SPRITE0] += sprite0_fifo_extra; plane 1715 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[PLANE_CURSOR] = 63; plane 1730 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[plane_id] += plane_extra; plane 1739 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[PLANE_PRIMARY] = fifo_left; plane 1755 drivers/gpu/drm/i915/intel_pm.c wm_state->wm[level].plane[plane_id] = USHRT_MAX; plane 1758 drivers/gpu/drm/i915/intel_pm.c wm_state->sr[level].plane = USHRT_MAX; plane 1784 drivers/gpu/drm/i915/intel_pm.c dirty |= raw->plane[plane_id] != value; plane 1785 drivers/gpu/drm/i915/intel_pm.c raw->plane[plane_id] = value; plane 1794 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 1795 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = plane->id; plane 1796 drivers/gpu/drm/i915/intel_pm.c int num_levels = intel_wm_num_levels(to_i915(plane->base.dev)); plane 1813 drivers/gpu/drm/i915/intel_pm.c dirty |= raw->plane[plane_id] != wm; plane 1814 drivers/gpu/drm/i915/intel_pm.c raw->plane[plane_id] = wm; plane 1823 drivers/gpu/drm/i915/intel_pm.c plane->base.name, plane 1824 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id], plane 1825 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id], plane 1826 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]); plane 1839 drivers/gpu/drm/i915/intel_pm.c return raw->plane[plane_id] <= fifo_state->plane[plane_id]; plane 1864 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane; plane 1869 drivers/gpu/drm/i915/intel_pm.c for_each_oldnew_intel_plane_in_state(state, plane, plane 1877 drivers/gpu/drm/i915/intel_pm.c dirty |= BIT(plane->id); plane 1926 drivers/gpu/drm/i915/intel_pm.c wm_state->wm[level].plane[plane_id] = plane 1927 drivers/gpu/drm/i915/intel_pm.c vlv_invert_wm_value(raw->plane[plane_id], plane 1928 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[plane_id]); plane 1931 drivers/gpu/drm/i915/intel_pm.c wm_state->sr[level].plane = plane 1932 drivers/gpu/drm/i915/intel_pm.c vlv_invert_wm_value(max3(raw->plane[PLANE_PRIMARY], plane 1933 drivers/gpu/drm/i915/intel_pm.c raw->plane[PLANE_SPRITE0], plane 1934 drivers/gpu/drm/i915/intel_pm.c raw->plane[PLANE_SPRITE1]), plane 1938 drivers/gpu/drm/i915/intel_pm.c vlv_invert_wm_value(raw->plane[PLANE_CURSOR], plane 1954 drivers/gpu/drm/i915/intel_pm.c #define VLV_FIFO(plane, value) \ plane 1955 drivers/gpu/drm/i915/intel_pm.c (((value) << DSPARB_ ## plane ## _SHIFT_VLV) & DSPARB_ ## plane ## _MASK_VLV) plane 1970 drivers/gpu/drm/i915/intel_pm.c sprite0_start = fifo_state->plane[PLANE_PRIMARY]; plane 1971 drivers/gpu/drm/i915/intel_pm.c sprite1_start = fifo_state->plane[PLANE_SPRITE0] + sprite0_start; plane 1972 drivers/gpu/drm/i915/intel_pm.c fifo_size = fifo_state->plane[PLANE_SPRITE1] + sprite1_start; plane 1974 drivers/gpu/drm/i915/intel_pm.c WARN_ON(fifo_state->plane[PLANE_CURSOR] != 63); plane 2081 drivers/gpu/drm/i915/intel_pm.c intermediate->wm[level].plane[plane_id] = plane 2082 drivers/gpu/drm/i915/intel_pm.c min(optimal->wm[level].plane[plane_id], plane 2083 drivers/gpu/drm/i915/intel_pm.c active->wm[level].plane[plane_id]); plane 2086 drivers/gpu/drm/i915/intel_pm.c intermediate->sr[level].plane = min(optimal->sr[level].plane, plane 2087 drivers/gpu/drm/i915/intel_pm.c active->sr[level].plane); plane 2141 drivers/gpu/drm/i915/intel_pm.c wm->ddl[pipe].plane[PLANE_PRIMARY] = DDL_PRECISION_HIGH | 2; plane 2142 drivers/gpu/drm/i915/intel_pm.c wm->ddl[pipe].plane[PLANE_SPRITE0] = DDL_PRECISION_HIGH | 2; plane 2143 drivers/gpu/drm/i915/intel_pm.c wm->ddl[pipe].plane[PLANE_SPRITE1] = DDL_PRECISION_HIGH | 2; plane 2144 drivers/gpu/drm/i915/intel_pm.c wm->ddl[pipe].plane[PLANE_CURSOR] = DDL_PRECISION_HIGH | 2; plane 3120 drivers/gpu/drm/i915/intel_pm.c struct drm_plane *plane; plane 3130 drivers/gpu/drm/i915/intel_pm.c drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, &crtc_state->base) { plane 3133 drivers/gpu/drm/i915/intel_pm.c if (plane->type == DRM_PLANE_TYPE_PRIMARY) plane 3135 drivers/gpu/drm/i915/intel_pm.c else if (plane->type == DRM_PLANE_TYPE_OVERLAY) plane 3137 drivers/gpu/drm/i915/intel_pm.c else if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 3753 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane; plane 3790 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane_on_crtc(dev, crtc, plane) { plane 3792 drivers/gpu/drm/i915/intel_pm.c &crtc_state->wm.skl.optimal.planes[plane->id]; plane 3806 drivers/gpu/drm/i915/intel_pm.c plane->base.state->fb->modifier == plane 4074 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 4083 drivers/gpu/drm/i915/intel_pm.c if (plane->id == PLANE_CURSOR) { plane 4150 drivers/gpu/drm/i915/intel_pm.c struct drm_plane *plane; plane 4160 drivers/gpu/drm/i915/intel_pm.c drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state, &crtc_state->base) { plane 4204 drivers/gpu/drm/i915/intel_pm.c const int plane) plane 4206 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *intel_plane = to_intel_plane(plane_state->base.plane); plane 4222 drivers/gpu/drm/i915/intel_pm.c if (plane == 1 && !is_planar_yuv_format(format)) plane 4234 drivers/gpu/drm/i915/intel_pm.c if (plane == 1 && is_planar_yuv_format(format)) { plane 4245 drivers/gpu/drm/i915/intel_pm.c rate *= fb->format->cpp[plane]; plane 4255 drivers/gpu/drm/i915/intel_pm.c struct drm_plane *plane; plane 4263 drivers/gpu/drm/i915/intel_pm.c drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state, &crtc_state->base) { plane 4264 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = to_intel_plane(plane)->id; plane 4287 drivers/gpu/drm/i915/intel_pm.c struct drm_plane *plane; plane 4295 drivers/gpu/drm/i915/intel_pm.c drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state, &crtc_state->base) { plane 4298 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = to_intel_plane(plane)->id; plane 4734 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 4738 drivers/gpu/drm/i915/intel_pm.c if (plane->id == PLANE_CURSOR) { plane 5029 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane = to_intel_plane(plane_state->base.plane); plane 5031 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = plane->id; plane 5055 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = to_intel_plane(plane_state->base.plane)->id; plane 5093 drivers/gpu/drm/i915/intel_pm.c struct drm_plane *plane; plane 5103 drivers/gpu/drm/i915/intel_pm.c drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state, plane 5147 drivers/gpu/drm/i915/intel_pm.c void skl_write_plane_wm(struct intel_plane *plane, plane 5150 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 5152 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = plane->id; plane 5153 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = plane->pipe; plane 5183 drivers/gpu/drm/i915/intel_pm.c void skl_write_cursor_wm(struct intel_plane *plane, plane 5186 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(plane->base.dev); plane 5188 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = plane->id; plane 5189 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = plane->pipe; plane 5286 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane; plane 5288 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { plane 5290 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = plane->id; plane 5298 drivers/gpu/drm/i915/intel_pm.c plane_state = intel_atomic_get_plane_state(state, plane); plane 5346 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane; plane 5360 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { plane 5361 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = plane->id; plane 5371 drivers/gpu/drm/i915/intel_pm.c plane->base.base.id, plane->base.name, plane 5376 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { plane 5377 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = plane->id; plane 5388 drivers/gpu/drm/i915/intel_pm.c plane->base.base.id, plane->base.name, plane 5402 drivers/gpu/drm/i915/intel_pm.c plane->base.base.id, plane->base.name, plane 5425 drivers/gpu/drm/i915/intel_pm.c plane->base.base.id, plane->base.name, plane 5439 drivers/gpu/drm/i915/intel_pm.c plane->base.base.id, plane->base.name, plane 5570 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane; plane 5572 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { plane 5574 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = plane->id; plane 5590 drivers/gpu/drm/i915/intel_pm.c plane_state = intel_atomic_get_plane_state(state, plane); plane 5879 drivers/gpu/drm/i915/intel_pm.c #define _FW_WM(value, plane) \ plane 5880 drivers/gpu/drm/i915/intel_pm.c (((value) & DSPFW_ ## plane ## _MASK) >> DSPFW_ ## plane ## _SHIFT) plane 5881 drivers/gpu/drm/i915/intel_pm.c #define _FW_WM_VLV(value, plane) \ plane 5882 drivers/gpu/drm/i915/intel_pm.c (((value) & DSPFW_ ## plane ## _MASK_VLV) >> DSPFW_ ## plane ## _SHIFT) plane 5890 drivers/gpu/drm/i915/intel_pm.c wm->sr.plane = _FW_WM(tmp, SR); plane 5891 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB); plane 5892 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_PRIMARY] = _FW_WM(tmp, PLANEB); plane 5893 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_PRIMARY] = _FW_WM(tmp, PLANEA); plane 5899 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM(tmp, SPRITEB); plane 5900 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA); plane 5901 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_SPRITE0] = _FW_WM(tmp, SPRITEA); plane 5907 drivers/gpu/drm/i915/intel_pm.c wm->hpll.plane = _FW_WM(tmp, HPLL_SR); plane 5919 drivers/gpu/drm/i915/intel_pm.c wm->ddl[pipe].plane[PLANE_PRIMARY] = plane 5921 drivers/gpu/drm/i915/intel_pm.c wm->ddl[pipe].plane[PLANE_CURSOR] = plane 5923 drivers/gpu/drm/i915/intel_pm.c wm->ddl[pipe].plane[PLANE_SPRITE0] = plane 5925 drivers/gpu/drm/i915/intel_pm.c wm->ddl[pipe].plane[PLANE_SPRITE1] = plane 5930 drivers/gpu/drm/i915/intel_pm.c wm->sr.plane = _FW_WM(tmp, SR); plane 5931 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB); plane 5932 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEB); plane 5933 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEA); plane 5936 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITEB); plane 5937 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA); plane 5938 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEA); plane 5945 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITED); plane 5946 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEC); plane 5949 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITEF); plane 5950 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEE); plane 5953 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEC); plane 5954 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORC); plane 5957 drivers/gpu/drm/i915/intel_pm.c wm->sr.plane |= _FW_WM(tmp, SR_HI) << 9; plane 5958 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEF_HI) << 8; plane 5959 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEE_HI) << 8; plane 5960 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEC_HI) << 8; plane 5961 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITED_HI) << 8; plane 5962 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEC_HI) << 8; plane 5963 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEB_HI) << 8; plane 5964 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEB_HI) << 8; plane 5965 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEA_HI) << 8; plane 5966 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEA_HI) << 8; plane 5969 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITED); plane 5970 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEC); plane 5973 drivers/gpu/drm/i915/intel_pm.c wm->sr.plane |= _FW_WM(tmp, SR_HI) << 9; plane 5974 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITED_HI) << 8; plane 5975 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEC_HI) << 8; plane 5976 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_B].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEB_HI) << 8; plane 5977 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEB_HI) << 8; plane 5978 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEA_HI) << 8; plane 5979 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_A].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEA_HI) << 8; plane 6012 drivers/gpu/drm/i915/intel_pm.c active->wm.plane[plane_id] = plane 6013 drivers/gpu/drm/i915/intel_pm.c wm->pipe[pipe].plane[plane_id]; plane 6026 drivers/gpu/drm/i915/intel_pm.c raw->plane[plane_id] = active->wm.plane[plane_id]; plane 6032 drivers/gpu/drm/i915/intel_pm.c raw->plane[PLANE_PRIMARY] = active->sr.plane; plane 6033 drivers/gpu/drm/i915/intel_pm.c raw->plane[PLANE_CURSOR] = active->sr.cursor; plane 6034 drivers/gpu/drm/i915/intel_pm.c raw->plane[PLANE_SPRITE0] = 0; plane 6041 drivers/gpu/drm/i915/intel_pm.c raw->plane[PLANE_PRIMARY] = active->hpll.plane; plane 6042 drivers/gpu/drm/i915/intel_pm.c raw->plane[PLANE_CURSOR] = active->hpll.cursor; plane 6043 drivers/gpu/drm/i915/intel_pm.c raw->plane[PLANE_SPRITE0] = 0; plane 6057 drivers/gpu/drm/i915/intel_pm.c wm->pipe[pipe].plane[PLANE_PRIMARY], plane 6058 drivers/gpu/drm/i915/intel_pm.c wm->pipe[pipe].plane[PLANE_CURSOR], plane 6059 drivers/gpu/drm/i915/intel_pm.c wm->pipe[pipe].plane[PLANE_SPRITE0]); plane 6063 drivers/gpu/drm/i915/intel_pm.c wm->sr.plane, wm->sr.cursor, wm->sr.fbc); plane 6065 drivers/gpu/drm/i915/intel_pm.c wm->hpll.plane, wm->hpll.cursor, wm->hpll.fbc); plane 6072 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane; plane 6077 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane(&dev_priv->drm, plane) { plane 6079 drivers/gpu/drm/i915/intel_pm.c intel_get_crtc_for_pipe(dev_priv, plane->pipe); plane 6083 drivers/gpu/drm/i915/intel_pm.c to_intel_plane_state(plane->base.state); plane 6085 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = plane->id; plane 6095 drivers/gpu/drm/i915/intel_pm.c raw->plane[plane_id] = 0; plane 6096 drivers/gpu/drm/i915/intel_pm.c wm_state->wm.plane[plane_id] = 0; plane 6190 drivers/gpu/drm/i915/intel_pm.c active->sr[level].plane = wm->sr.plane; plane 6194 drivers/gpu/drm/i915/intel_pm.c active->wm[level].plane[plane_id] = plane 6195 drivers/gpu/drm/i915/intel_pm.c wm->pipe[pipe].plane[plane_id]; plane 6197 drivers/gpu/drm/i915/intel_pm.c raw->plane[plane_id] = plane 6198 drivers/gpu/drm/i915/intel_pm.c vlv_invert_wm_value(active->wm[level].plane[plane_id], plane 6199 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[plane_id]); plane 6213 drivers/gpu/drm/i915/intel_pm.c wm->pipe[pipe].plane[PLANE_PRIMARY], plane 6214 drivers/gpu/drm/i915/intel_pm.c wm->pipe[pipe].plane[PLANE_CURSOR], plane 6215 drivers/gpu/drm/i915/intel_pm.c wm->pipe[pipe].plane[PLANE_SPRITE0], plane 6216 drivers/gpu/drm/i915/intel_pm.c wm->pipe[pipe].plane[PLANE_SPRITE1]); plane 6220 drivers/gpu/drm/i915/intel_pm.c wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr); plane 6225 drivers/gpu/drm/i915/intel_pm.c struct intel_plane *plane; plane 6230 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane(&dev_priv->drm, plane) { plane 6232 drivers/gpu/drm/i915/intel_pm.c intel_get_crtc_for_pipe(dev_priv, plane->pipe); plane 6236 drivers/gpu/drm/i915/intel_pm.c to_intel_plane_state(plane->base.state); plane 6240 drivers/gpu/drm/i915/intel_pm.c enum plane_id plane_id = plane->id; plane 6250 drivers/gpu/drm/i915/intel_pm.c raw->plane[plane_id] = 0; plane 6252 drivers/gpu/drm/i915/intel_pm.c wm_state->wm[level].plane[plane_id] = plane 6253 drivers/gpu/drm/i915/intel_pm.c vlv_invert_wm_value(raw->plane[plane_id], plane 6254 drivers/gpu/drm/i915/intel_pm.c fifo_state->plane[plane_id]); plane 66 drivers/gpu/drm/i915/intel_pm.h void skl_write_plane_wm(struct intel_plane *plane, plane 68 drivers/gpu/drm/i915/intel_pm.h void skl_write_cursor_wm(struct intel_plane *plane, plane 361 drivers/gpu/drm/i915/selftests/i915_vma.c return (r->plane[n].stride * (r->plane[n].height - y - 1) + plane 362 drivers/gpu/drm/i915/selftests/i915_vma.c r->plane[n].offset + x); plane 372 drivers/gpu/drm/i915/selftests/i915_vma.c for (x = 0; x < r->plane[n].width; x++) { plane 373 drivers/gpu/drm/i915/selftests/i915_vma.c for (y = 0; y < r->plane[n].height; y++) { plane 411 drivers/gpu/drm/i915/selftests/i915_vma.c return (r->plane[n].stride * y + plane 412 drivers/gpu/drm/i915/selftests/i915_vma.c r->plane[n].offset + x); plane 424 drivers/gpu/drm/i915/selftests/i915_vma.c for (y = 0; y < r->plane[n].height; y++) { plane 425 drivers/gpu/drm/i915/selftests/i915_vma.c for (x = 0; x < r->plane[n].width; x++) { plane 524 drivers/gpu/drm/i915/selftests/i915_vma.c view.rotated.plane[0] = *a; plane 525 drivers/gpu/drm/i915/selftests/i915_vma.c view.rotated.plane[1] = *b; plane 527 drivers/gpu/drm/i915/selftests/i915_vma.c for_each_prime_number_from(view.rotated.plane[0].offset, 0, max_offset) { plane 528 drivers/gpu/drm/i915/selftests/i915_vma.c for_each_prime_number_from(view.rotated.plane[1].offset, 0, max_offset) { plane 581 drivers/gpu/drm/i915/selftests/i915_vma.c for (n = 0; n < ARRAY_SIZE(view.rotated.plane); n++) { plane 590 drivers/gpu/drm/i915/selftests/i915_vma.c view.rotated.plane[0].width, plane 591 drivers/gpu/drm/i915/selftests/i915_vma.c view.rotated.plane[0].height, plane 592 drivers/gpu/drm/i915/selftests/i915_vma.c view.rotated.plane[0].stride, plane 593 drivers/gpu/drm/i915/selftests/i915_vma.c view.rotated.plane[0].offset, plane 594 drivers/gpu/drm/i915/selftests/i915_vma.c view.rotated.plane[1].width, plane 595 drivers/gpu/drm/i915/selftests/i915_vma.c view.rotated.plane[1].height, plane 596 drivers/gpu/drm/i915/selftests/i915_vma.c view.rotated.plane[1].stride, plane 597 drivers/gpu/drm/i915/selftests/i915_vma.c view.rotated.plane[1].offset); plane 890 drivers/gpu/drm/i915/selftests/i915_vma.c .rotated.plane[0] = *p, plane 85 drivers/gpu/drm/imx/imx-drm-core.c struct drm_plane *plane; plane 98 drivers/gpu/drm/imx/imx-drm-core.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { plane 113 drivers/gpu/drm/imx/imx-drm-core.c for_each_old_plane_in_state(state, plane, old_plane_state, i) plane 114 drivers/gpu/drm/imx/imx-drm-core.c ipu_plane_disable_deferred(plane); plane 36 drivers/gpu/drm/imx/ipuv3-crtc.c struct ipu_plane *plane[2]; plane 66 drivers/gpu/drm/imx/ipuv3-crtc.c struct drm_plane *plane; plane 68 drivers/gpu/drm/imx/ipuv3-crtc.c drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) { plane 69 drivers/gpu/drm/imx/ipuv3-crtc.c if (plane == &ipu_crtc->plane[0]->base) plane 71 drivers/gpu/drm/imx/ipuv3-crtc.c if (&ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base) plane 76 drivers/gpu/drm/imx/ipuv3-crtc.c ipu_plane_disable(ipu_crtc->plane[1], true); plane 78 drivers/gpu/drm/imx/ipuv3-crtc.c ipu_plane_disable(ipu_crtc->plane[0], true); plane 188 drivers/gpu/drm/imx/ipuv3-crtc.c for (i = 0; i < ARRAY_SIZE(ipu_crtc->plane); i++) { plane 189 drivers/gpu/drm/imx/ipuv3-crtc.c struct ipu_plane *plane = ipu_crtc->plane[i]; plane 191 drivers/gpu/drm/imx/ipuv3-crtc.c if (!plane) plane 194 drivers/gpu/drm/imx/ipuv3-crtc.c if (ipu_plane_atomic_update_pending(&plane->base)) plane 198 drivers/gpu/drm/imx/ipuv3-crtc.c if (i == ARRAY_SIZE(ipu_crtc->plane)) { plane 376 drivers/gpu/drm/imx/ipuv3-crtc.c ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0, plane 378 drivers/gpu/drm/imx/ipuv3-crtc.c if (IS_ERR(ipu_crtc->plane[0])) { plane 379 drivers/gpu/drm/imx/ipuv3-crtc.c ret = PTR_ERR(ipu_crtc->plane[0]); plane 385 drivers/gpu/drm/imx/ipuv3-crtc.c drm_crtc_init_with_planes(drm, crtc, &ipu_crtc->plane[0]->base, NULL, plane 388 drivers/gpu/drm/imx/ipuv3-crtc.c ret = ipu_plane_get_resources(ipu_crtc->plane[0]); plane 397 drivers/gpu/drm/imx/ipuv3-crtc.c ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1], plane 401 drivers/gpu/drm/imx/ipuv3-crtc.c if (IS_ERR(ipu_crtc->plane[1])) { plane 402 drivers/gpu/drm/imx/ipuv3-crtc.c ipu_crtc->plane[1] = NULL; plane 404 drivers/gpu/drm/imx/ipuv3-crtc.c ret = ipu_plane_get_resources(ipu_crtc->plane[1]); plane 413 drivers/gpu/drm/imx/ipuv3-crtc.c ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]); plane 426 drivers/gpu/drm/imx/ipuv3-crtc.c if (ipu_crtc->plane[1]) plane 427 drivers/gpu/drm/imx/ipuv3-crtc.c ipu_plane_put_resources(ipu_crtc->plane[1]); plane 429 drivers/gpu/drm/imx/ipuv3-crtc.c ipu_plane_put_resources(ipu_crtc->plane[0]); plane 464 drivers/gpu/drm/imx/ipuv3-crtc.c if (ipu_crtc->plane[1]) plane 465 drivers/gpu/drm/imx/ipuv3-crtc.c ipu_plane_put_resources(ipu_crtc->plane[1]); plane 466 drivers/gpu/drm/imx/ipuv3-crtc.c ipu_plane_put_resources(ipu_crtc->plane[0]); plane 93 drivers/gpu/drm/imx/ipuv3-plane.c drm_plane_state_to_eba(struct drm_plane_state *state, int plane) plane 100 drivers/gpu/drm/imx/ipuv3-plane.c cma_obj = drm_fb_cma_get_gem_obj(fb, plane); plane 103 drivers/gpu/drm/imx/ipuv3-plane.c return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y + plane 104 drivers/gpu/drm/imx/ipuv3-plane.c fb->format->cpp[plane] * x; plane 254 drivers/gpu/drm/imx/ipuv3-plane.c void ipu_plane_disable_deferred(struct drm_plane *plane) plane 256 drivers/gpu/drm/imx/ipuv3-plane.c struct ipu_plane *ipu_plane = to_ipu_plane(plane); plane 265 drivers/gpu/drm/imx/ipuv3-plane.c static void ipu_plane_destroy(struct drm_plane *plane) plane 267 drivers/gpu/drm/imx/ipuv3-plane.c struct ipu_plane *ipu_plane = to_ipu_plane(plane); plane 271 drivers/gpu/drm/imx/ipuv3-plane.c drm_plane_cleanup(plane); plane 275 drivers/gpu/drm/imx/ipuv3-plane.c static void ipu_plane_state_reset(struct drm_plane *plane) plane 277 drivers/gpu/drm/imx/ipuv3-plane.c unsigned int zpos = (plane->type == DRM_PLANE_TYPE_PRIMARY) ? 0 : 1; plane 280 drivers/gpu/drm/imx/ipuv3-plane.c if (plane->state) { plane 281 drivers/gpu/drm/imx/ipuv3-plane.c ipu_state = to_ipu_plane_state(plane->state); plane 282 drivers/gpu/drm/imx/ipuv3-plane.c __drm_atomic_helper_plane_destroy_state(plane->state); plane 284 drivers/gpu/drm/imx/ipuv3-plane.c plane->state = NULL; plane 290 drivers/gpu/drm/imx/ipuv3-plane.c __drm_atomic_helper_plane_reset(plane, &ipu_state->base); plane 297 drivers/gpu/drm/imx/ipuv3-plane.c ipu_plane_duplicate_state(struct drm_plane *plane) plane 301 drivers/gpu/drm/imx/ipuv3-plane.c if (WARN_ON(!plane->state)) plane 306 drivers/gpu/drm/imx/ipuv3-plane.c __drm_atomic_helper_plane_duplicate_state(plane, &state->base); plane 311 drivers/gpu/drm/imx/ipuv3-plane.c static void ipu_plane_destroy_state(struct drm_plane *plane, plane 320 drivers/gpu/drm/imx/ipuv3-plane.c static bool ipu_plane_format_mod_supported(struct drm_plane *plane, plane 323 drivers/gpu/drm/imx/ipuv3-plane.c struct ipu_soc *ipu = to_ipu_plane(plane)->ipu; plane 346 drivers/gpu/drm/imx/ipuv3-plane.c static int ipu_plane_atomic_check(struct drm_plane *plane, plane 349 drivers/gpu/drm/imx/ipuv3-plane.c struct drm_plane_state *old_state = plane->state; plane 351 drivers/gpu/drm/imx/ipuv3-plane.c struct device *dev = plane->dev->dev; plane 355 drivers/gpu/drm/imx/ipuv3-plane.c bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY); plane 381 drivers/gpu/drm/imx/ipuv3-plane.c switch (plane->type) { plane 390 drivers/gpu/drm/imx/ipuv3-plane.c dev_warn(dev, "Unsupported plane type %d\n", plane->type); plane 499 drivers/gpu/drm/imx/ipuv3-plane.c static void ipu_plane_atomic_disable(struct drm_plane *plane, plane 502 drivers/gpu/drm/imx/ipuv3-plane.c struct ipu_plane *ipu_plane = to_ipu_plane(plane); plane 544 drivers/gpu/drm/imx/ipuv3-plane.c static void ipu_plane_atomic_update(struct drm_plane *plane, plane 547 drivers/gpu/drm/imx/ipuv3-plane.c struct ipu_plane *ipu_plane = to_ipu_plane(plane); plane 548 drivers/gpu/drm/imx/ipuv3-plane.c struct drm_plane_state *state = plane->state; plane 720 drivers/gpu/drm/imx/ipuv3-plane.c bool ipu_plane_atomic_update_pending(struct drm_plane *plane) plane 722 drivers/gpu/drm/imx/ipuv3-plane.c struct ipu_plane *ipu_plane = to_ipu_plane(plane); plane 723 drivers/gpu/drm/imx/ipuv3-plane.c struct drm_plane_state *state = plane->state; plane 750 drivers/gpu/drm/imx/ipuv3-plane.c struct drm_plane *plane; plane 769 drivers/gpu/drm/imx/ipuv3-plane.c for_each_new_plane_in_state(state, plane, plane_state, i) { plane 771 drivers/gpu/drm/imx/ipuv3-plane.c ipu_plane = to_ipu_plane(plane); plane 794 drivers/gpu/drm/imx/ipuv3-plane.c for_each_new_plane_in_state(state, plane, plane_state, i) { plane 796 drivers/gpu/drm/imx/ipuv3-plane.c ipu_plane = to_ipu_plane(plane); plane 37 drivers/gpu/drm/imx/ipuv3-plane.h int ipu_plane_mode_set(struct ipu_plane *plane, struct drm_crtc *crtc, plane 44 drivers/gpu/drm/imx/ipuv3-plane.h int ipu_plane_get_resources(struct ipu_plane *plane); plane 45 drivers/gpu/drm/imx/ipuv3-plane.h void ipu_plane_put_resources(struct ipu_plane *plane); plane 47 drivers/gpu/drm/imx/ipuv3-plane.h int ipu_plane_irq(struct ipu_plane *plane); plane 50 drivers/gpu/drm/imx/ipuv3-plane.h void ipu_plane_disable_deferred(struct drm_plane *plane); plane 51 drivers/gpu/drm/imx/ipuv3-plane.h bool ipu_plane_atomic_update_pending(struct drm_plane *plane); plane 220 drivers/gpu/drm/ingenic/ingenic-drm.c static inline struct ingenic_drm *drm_plane_get_priv(struct drm_plane *plane) plane 222 drivers/gpu/drm/ingenic/ingenic-drm.c return container_of(plane, struct ingenic_drm, primary); plane 368 drivers/gpu/drm/ingenic/ingenic-drm.c static void ingenic_drm_plane_atomic_update(struct drm_plane *plane, plane 371 drivers/gpu/drm/ingenic/ingenic-drm.c struct ingenic_drm *priv = drm_plane_get_priv(plane); plane 372 drivers/gpu/drm/ingenic/ingenic-drm.c struct drm_plane_state *state = plane->state; plane 380 drivers/gpu/drm/ingenic/ingenic-drm.c cpp = state->fb->format->cpp[plane->index]; plane 155 drivers/gpu/drm/mcde/mcde_display.c struct drm_framebuffer *old_fb = pipe->plane.state->fb; plane 817 drivers/gpu/drm/mcde/mcde_display.c struct drm_plane *plane = &pipe->plane; plane 821 drivers/gpu/drm/mcde/mcde_display.c struct drm_framebuffer *fb = plane->state->fb; plane 1013 drivers/gpu/drm/mcde/mcde_display.c struct drm_plane *plane = &pipe->plane; plane 1014 drivers/gpu/drm/mcde/mcde_display.c struct drm_plane_state *pstate = plane->state; plane 281 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct drm_plane *plane = &mtk_crtc->planes[i]; plane 284 drivers/gpu/drm/mediatek/mtk_drm_crtc.c plane_state = to_mtk_plane_state(plane->state); plane 354 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct drm_plane *plane = &mtk_crtc->planes[i]; plane 357 drivers/gpu/drm/mediatek/mtk_drm_crtc.c plane_state = to_mtk_plane_state(plane->state); plane 406 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct drm_plane *plane = &mtk_crtc->planes[i]; plane 409 drivers/gpu/drm/mediatek/mtk_drm_crtc.c plane_state = to_mtk_plane_state(plane->state); plane 453 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct drm_plane *plane = &mtk_crtc->planes[i]; plane 456 drivers/gpu/drm/mediatek/mtk_drm_crtc.c plane_state = to_mtk_plane_state(plane->state); plane 28 drivers/gpu/drm/mediatek/mtk_drm_plane.c static void mtk_plane_reset(struct drm_plane *plane) plane 32 drivers/gpu/drm/mediatek/mtk_drm_plane.c if (plane->state) { plane 33 drivers/gpu/drm/mediatek/mtk_drm_plane.c __drm_atomic_helper_plane_destroy_state(plane->state); plane 35 drivers/gpu/drm/mediatek/mtk_drm_plane.c state = to_mtk_plane_state(plane->state); plane 41 drivers/gpu/drm/mediatek/mtk_drm_plane.c plane->state = &state->base; plane 44 drivers/gpu/drm/mediatek/mtk_drm_plane.c state->base.plane = plane; plane 48 drivers/gpu/drm/mediatek/mtk_drm_plane.c static struct drm_plane_state *mtk_plane_duplicate_state(struct drm_plane *plane) plane 50 drivers/gpu/drm/mediatek/mtk_drm_plane.c struct mtk_plane_state *old_state = to_mtk_plane_state(plane->state); plane 57 drivers/gpu/drm/mediatek/mtk_drm_plane.c __drm_atomic_helper_plane_duplicate_state(plane, &state->base); plane 59 drivers/gpu/drm/mediatek/mtk_drm_plane.c WARN_ON(state->base.plane != plane); plane 66 drivers/gpu/drm/mediatek/mtk_drm_plane.c static void mtk_drm_plane_destroy_state(struct drm_plane *plane, plane 82 drivers/gpu/drm/mediatek/mtk_drm_plane.c static int mtk_plane_atomic_check(struct drm_plane *plane, plane 104 drivers/gpu/drm/mediatek/mtk_drm_plane.c static void mtk_plane_atomic_update(struct drm_plane *plane, plane 107 drivers/gpu/drm/mediatek/mtk_drm_plane.c struct mtk_plane_state *state = to_mtk_plane_state(plane->state); plane 108 drivers/gpu/drm/mediatek/mtk_drm_plane.c struct drm_crtc *crtc = plane->state->crtc; plane 109 drivers/gpu/drm/mediatek/mtk_drm_plane.c struct drm_framebuffer *fb = plane->state->fb; plane 124 drivers/gpu/drm/mediatek/mtk_drm_plane.c addr += (plane->state->src.x1 >> 16) * fb->format->cpp[0]; plane 125 drivers/gpu/drm/mediatek/mtk_drm_plane.c addr += (plane->state->src.y1 >> 16) * pitch; plane 131 drivers/gpu/drm/mediatek/mtk_drm_plane.c state->pending.x = plane->state->dst.x1; plane 132 drivers/gpu/drm/mediatek/mtk_drm_plane.c state->pending.y = plane->state->dst.y1; plane 133 drivers/gpu/drm/mediatek/mtk_drm_plane.c state->pending.width = drm_rect_width(&plane->state->dst); plane 134 drivers/gpu/drm/mediatek/mtk_drm_plane.c state->pending.height = drm_rect_height(&plane->state->dst); plane 139 drivers/gpu/drm/mediatek/mtk_drm_plane.c static void mtk_plane_atomic_disable(struct drm_plane *plane, plane 142 drivers/gpu/drm/mediatek/mtk_drm_plane.c struct mtk_plane_state *state = to_mtk_plane_state(plane->state); plane 156 drivers/gpu/drm/mediatek/mtk_drm_plane.c int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane, plane 161 drivers/gpu/drm/mediatek/mtk_drm_plane.c err = drm_universal_plane_init(dev, plane, possible_crtcs, plane 169 drivers/gpu/drm/mediatek/mtk_drm_plane.c drm_plane_helper_add(plane, &mtk_plane_helper_funcs); plane 37 drivers/gpu/drm/mediatek/mtk_drm_plane.h int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane, plane 87 drivers/gpu/drm/meson/meson_overlay.c static int meson_overlay_atomic_check(struct drm_plane *plane, plane 144 drivers/gpu/drm/meson/meson_overlay.c struct drm_plane *plane, plane 149 drivers/gpu/drm/meson/meson_overlay.c struct drm_plane_state *state = plane->state; plane 336 drivers/gpu/drm/meson/meson_overlay.c static void meson_overlay_atomic_update(struct drm_plane *plane, plane 339 drivers/gpu/drm/meson/meson_overlay.c struct meson_overlay *meson_overlay = to_meson_overlay(plane); plane 340 drivers/gpu/drm/meson/meson_overlay.c struct drm_plane_state *state = plane->state; plane 360 drivers/gpu/drm/meson/meson_overlay.c meson_overlay_setup_scaler_params(priv, plane, interlace_mode); plane 505 drivers/gpu/drm/meson/meson_overlay.c static void meson_overlay_atomic_disable(struct drm_plane *plane, plane 508 drivers/gpu/drm/meson/meson_overlay.c struct meson_overlay *meson_overlay = to_meson_overlay(plane); plane 557 drivers/gpu/drm/meson/meson_overlay.c struct drm_plane *plane; plane 567 drivers/gpu/drm/meson/meson_overlay.c plane = &meson_overlay->base; plane 569 drivers/gpu/drm/meson/meson_overlay.c drm_universal_plane_init(priv->drm, plane, 0xFF, plane 576 drivers/gpu/drm/meson/meson_overlay.c drm_plane_helper_add(plane, &meson_overlay_helper_funcs); plane 579 drivers/gpu/drm/meson/meson_overlay.c drm_plane_create_zpos_immutable_property(plane, 0); plane 581 drivers/gpu/drm/meson/meson_overlay.c priv->overlay_plane = plane; plane 72 drivers/gpu/drm/meson/meson_plane.c static int meson_plane_atomic_check(struct drm_plane *plane, plane 101 drivers/gpu/drm/meson/meson_plane.c static void meson_plane_atomic_update(struct drm_plane *plane, plane 104 drivers/gpu/drm/meson/meson_plane.c struct meson_plane *meson_plane = to_meson_plane(plane); plane 105 drivers/gpu/drm/meson/meson_plane.c struct drm_plane_state *state = plane->state; plane 323 drivers/gpu/drm/meson/meson_plane.c static void meson_plane_atomic_disable(struct drm_plane *plane, plane 326 drivers/gpu/drm/meson/meson_plane.c struct meson_plane *meson_plane = to_meson_plane(plane); plane 369 drivers/gpu/drm/meson/meson_plane.c struct drm_plane *plane; plane 377 drivers/gpu/drm/meson/meson_plane.c plane = &meson_plane->base; plane 379 drivers/gpu/drm/meson/meson_plane.c drm_universal_plane_init(priv->drm, plane, 0xFF, plane 386 drivers/gpu/drm/meson/meson_plane.c drm_plane_helper_add(plane, &meson_plane_helper_funcs); plane 389 drivers/gpu/drm/meson/meson_plane.c drm_plane_create_zpos_immutable_property(plane, 1); plane 391 drivers/gpu/drm/meson/meson_plane.c priv->primary_plane = plane; plane 118 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct drm_plane *plane; plane 132 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { plane 133 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c state = plane->state; plane 140 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_plane_get_ctl_flush(plane, ctl, &flush_mask); plane 145 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c plane->base.id, plane 146 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_plane_pipe(plane) - SSPP_VIG0, plane 156 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_plane_pipe(plane); plane 160 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_setup_mixer(DRMID(crtc), DRMID(plane), plane 162 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_plane_pipe(plane) - SSPP_VIG0, plane 487 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct drm_plane *plane; plane 537 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) plane 538 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_plane_restore(plane); plane 548 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { plane 550 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_plane_set_error(plane, true); plane 551 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_plane_flush(plane); plane 819 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct drm_plane *plane; plane 863 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { plane 869 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc->name, plane->base.id, rc); plane 878 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c pstates[cnt].pipe_id = dpu_plane_pipe(plane); plane 908 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (is_dpu_plane_virtual(pipe_staged[i]->plane)) { plane 911 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c pipe_staged[i]->plane->base.id); plane 960 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c multirect_plane[i].r0->plane->base.id, plane 961 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c multirect_plane[i].r1->plane->base.id); plane 994 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c left_pid = prv_pstate->dpu_pstate->base.plane->base.id; plane 997 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c right_pid = cur_pstate->dpu_pstate->base.plane->base.id; plane 1083 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct drm_plane *plane; plane 1119 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { plane 1120 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c pstate = to_dpu_plane_state(plane->state); plane 1121 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c state = plane->state; plane 1126 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c seq_printf(s, "\tplane:%u stage:%d\n", plane->base.id, plane 1129 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (plane->state->fb) { plane 1130 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c fb = plane->state->fb; plane 1286 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, plane 1320 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_crtc_init_with_planes(dev, crtc, plane, cursor, &dpu_crtc_funcs, plane 257 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, plane 499 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct drm_plane *primary_planes[MAX_PLANES], *plane; plane 539 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c plane = dpu_plane_init(dev, catalog->sspp[i].id, type, plane 541 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (IS_ERR(plane)) { plane 543 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c ret = PTR_ERR(plane); plane 546 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c priv->planes[priv->num_planes++] = plane; plane 549 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c cursor_planes[cursor_planes_idx++] = plane; plane 551 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c primary_planes[primary_planes_idx++] = plane; plane 122 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane) plane 124 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct msm_drm_private *priv = plane->dev->dev_private; plane 136 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static int _dpu_plane_calc_fill_level(struct drm_plane *plane, plane 144 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (!fmt || !plane->state || !src_width || !fmt->bpp) { plane 149 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pdpu = to_dpu_plane(plane); plane 150 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pstate = to_dpu_plane_state(plane->state); plane 185 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->base.id, pdpu->pipe - SSPP_VIG0, plane 222 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void _dpu_plane_set_qos_lut(struct drm_plane *plane, plane 225 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 236 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c total_fl = _dpu_plane_calc_fill_level(plane, fmt, plane 255 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->base.id, plane 268 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void _dpu_plane_set_danger_lut(struct drm_plane *plane, plane 271 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 308 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->base.id, plane 325 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane, plane 328 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 352 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->base.id, plane 369 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void _dpu_plane_set_ot_limit(struct drm_plane *plane, plane 372 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 374 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane); plane 394 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void _dpu_plane_set_qos_remap(struct drm_plane *plane) plane 396 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 398 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane); plane 408 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->base.id, qos_params.num, plane 416 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void _dpu_plane_set_scanout(struct drm_plane *plane, plane 421 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 576 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c const struct drm_plane *plane = &pdpu->base; plane 577 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state); plane 634 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c int dpu_plane_validate_multirect_v2(struct dpu_multirect_plane_states *plane) plane 649 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_state[i] = i ? plane->r1 : plane->r0; plane 664 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c dpu_plane[i] = to_dpu_plane(drm_state[i]->plane); plane 668 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_state[i]->plane->base.id); plane 729 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_state[R0]->plane->base.id, plane 730 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_state[R1]->plane->base.id); plane 756 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c void dpu_plane_get_ctl_flush(struct drm_plane *plane, struct dpu_hw_ctl *ctl, plane 759 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c *flush_sspp = ctl->ops.get_bitmask_sspp(ctl, dpu_plane_pipe(plane)); plane 762 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static int dpu_plane_prepare_fb(struct drm_plane *plane, plane 766 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 785 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_gem_fb_prepare_fb(plane, new_state); plane 807 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void dpu_plane_cleanup_fb(struct drm_plane *plane, plane 810 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 842 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static int dpu_plane_atomic_check(struct drm_plane *plane, plane 846 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 922 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c void dpu_plane_flush(struct drm_plane *plane) plane 927 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (!plane || !plane->state) { plane 932 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pdpu = to_dpu_plane(plane); plane 933 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pstate = to_dpu_plane_state(plane->state); plane 949 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (plane->state) plane 957 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c void dpu_plane_set_error(struct drm_plane *plane, bool error) plane 961 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (!plane) plane 964 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pdpu = to_dpu_plane(plane); plane 968 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) plane 971 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 972 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct drm_plane_state *state = plane->state; plane 981 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_scanout(plane, pstate, &pdpu->pipe_cfg, fb); plane 986 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_qos_ctrl(plane, false, DPU_PLANE_QOS_PANIC_CTRL); plane 1083 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_qos_lut(plane, fb); plane 1084 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_danger_lut(plane, fb); plane 1086 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (plane->type != DRM_PLANE_TYPE_CURSOR) { plane 1087 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_qos_ctrl(plane, true, DPU_PLANE_QOS_PANIC_CTRL); plane 1088 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_ot_limit(plane, crtc); plane 1091 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_qos_remap(plane); plane 1094 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void _dpu_plane_atomic_disable(struct drm_plane *plane) plane 1096 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 1097 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct drm_plane_state *state = plane->state; plane 1100 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c trace_dpu_plane_disable(DRMID(plane), is_dpu_plane_virtual(plane), plane 1105 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (is_dpu_plane_virtual(plane) && plane 1111 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void dpu_plane_atomic_update(struct drm_plane *plane, plane 1114 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 1115 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct drm_plane_state *state = plane->state; plane 1122 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_atomic_disable(plane); plane 1124 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c dpu_plane_sspp_atomic_update(plane); plane 1128 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c void dpu_plane_restore(struct drm_plane *plane) plane 1132 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (!plane || !plane->state) { plane 1137 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pdpu = to_dpu_plane(plane); plane 1142 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c dpu_plane_atomic_update(plane, plane->state); plane 1145 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void dpu_plane_destroy(struct drm_plane *plane) plane 1147 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = plane ? to_dpu_plane(plane) : NULL; plane 1152 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_qos_ctrl(plane, false, DPU_PLANE_QOS_PANIC_CTRL); plane 1157 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_plane_cleanup(plane); plane 1165 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void dpu_plane_destroy_state(struct drm_plane *plane, plane 1173 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c dpu_plane_duplicate_state(struct drm_plane *plane) plane 1179 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (!plane) { plane 1182 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c } else if (!plane->state) { plane 1187 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c old_state = to_dpu_plane_state(plane->state); plane 1188 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pdpu = to_dpu_plane(plane); plane 1199 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c __drm_atomic_helper_plane_duplicate_state(plane, &pstate->base); plane 1204 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void dpu_plane_reset(struct drm_plane *plane) plane 1209 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (!plane) { plane 1214 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pdpu = to_dpu_plane(plane); plane 1218 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (plane->state) { plane 1219 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c dpu_plane_destroy_state(plane, plane->state); plane 1220 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->state = 0; plane 1229 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pstate->base.plane = plane; plane 1231 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->state = &pstate->base; plane 1235 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) plane 1237 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 1238 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane); plane 1244 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_qos_ctrl(plane, enable, DPU_PLANE_QOS_PANIC_CTRL); plane 1262 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct drm_plane *plane; plane 1264 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_for_each_plane(plane, kms->dev) { plane 1265 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (plane->fb && plane->state) { plane 1266 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c dpu_plane_danger_signal_ctrl(plane, enable); plane 1268 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->base.id, plane->fb->width, plane 1269 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->fb->height); plane 1271 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->state->src_x >> 16, plane 1272 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->state->src_y >> 16, plane 1273 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->state->src_w >> 16, plane 1274 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->state->src_h >> 16, plane 1275 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->state->crtc_x, plane->state->crtc_y, plane 1276 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->state->crtc_w, plane->state->crtc_h); plane 1278 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c DPU_DEBUG("Inactive plane:%d\n", plane->base.id); plane 1315 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static int _dpu_plane_init_debugfs(struct drm_plane *plane) plane 1317 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 1318 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_kms *kms = _dpu_plane_get_kms(plane); plane 1325 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->dev->primary->debugfs_root); plane 1389 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static int _dpu_plane_init_debugfs(struct drm_plane *plane) plane 1395 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static int dpu_plane_late_register(struct drm_plane *plane) plane 1397 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c return _dpu_plane_init_debugfs(plane); plane 1400 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static void dpu_plane_early_unregister(struct drm_plane *plane) plane 1402 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct dpu_plane *pdpu = to_dpu_plane(plane); plane 1407 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c static bool dpu_plane_format_mod_supported(struct drm_plane *plane, plane 1443 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c enum dpu_sspp dpu_plane_pipe(struct drm_plane *plane) plane 1445 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c return plane ? to_dpu_plane(plane)->pipe : SSPP_NONE; plane 1448 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c bool is_dpu_plane_virtual(struct drm_plane *plane) plane 1450 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c return plane ? to_dpu_plane(plane)->is_virtual : false; plane 1458 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct drm_plane *plane = NULL, *master_plane = NULL; plane 1476 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane = &pdpu->base; plane 1516 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c ret = drm_universal_plane_init(dev, plane, 0xff, &dpu_plane_funcs, plane 1531 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c ret = drm_plane_create_zpos_property(plane, 0, 0, zpos_max); plane 1535 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_plane_create_rotation_property(plane, plane 1542 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_plane_enable_fb_damage_clips(plane); plane 1545 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_plane_helper_add(plane, &dpu_plane_helper_funcs); plane 1548 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c snprintf(pdpu->pipe_name, DPU_NAME_SIZE, "plane%u", plane->base.id); plane 1553 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pipe, plane->base.id, master_plane_id); plane 1554 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c return plane; plane 62 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h enum dpu_sspp dpu_plane_pipe(struct drm_plane *plane); plane 70 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h bool is_dpu_plane_virtual(struct drm_plane *plane); plane 78 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h void dpu_plane_get_ctl_flush(struct drm_plane *plane, struct dpu_hw_ctl *ctl, plane 85 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h void dpu_plane_restore(struct drm_plane *plane); plane 91 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h void dpu_plane_flush(struct drm_plane *plane); plane 97 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h void dpu_plane_set_error(struct drm_plane *plane, bool error); plane 119 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h int dpu_plane_validate_multirect_v2(struct dpu_multirect_plane_states *plane); plane 134 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h int dpu_plane_color_fill(struct drm_plane *plane, plane 79 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_plane *plane; plane 82 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { plane 83 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane); plane 163 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_plane *plane; plane 165 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { plane 166 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane); plane 180 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_plane *plane; plane 189 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { plane 190 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane); plane 194 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c to_mdp_format(msm_framebuffer_format(plane->state->fb)); plane 618 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_plane *plane, int id, int ovlp_id, plane 649 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_crtc_init_with_planes(dev, crtc, plane, NULL, &mdp4_crtc_funcs, plane 340 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct drm_plane *plane; plane 363 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c plane = mdp4_plane_init(dev, vg_planes[i], false); plane 364 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c if (IS_ERR(plane)) { plane 367 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c ret = PTR_ERR(plane); plane 370 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c priv->planes[priv->num_planes++] = plane; plane 374 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c plane = mdp4_plane_init(dev, rgb_planes[i], true); plane 375 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c if (IS_ERR(plane)) { plane 378 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c ret = PTR_ERR(plane); plane 382 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c crtc = mdp4_crtc_init(dev, plane, priv->num_crtcs, i, plane 185 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane); plane 194 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h struct drm_plane *plane, int id, int ovlp_id, plane 44 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c static void mdp4_plane_set_scanout(struct drm_plane *plane, plane 46 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c static int mdp4_plane_mode_set(struct drm_plane *plane, plane 53 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c static struct mdp4_kms *get_kms(struct drm_plane *plane) plane 55 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct msm_drm_private *priv = plane->dev->dev_private; plane 59 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c static void mdp4_plane_destroy(struct drm_plane *plane) plane 61 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); plane 63 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c drm_plane_cleanup(plane); plane 69 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c static void mdp4_plane_install_properties(struct drm_plane *plane, plane 75 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c static int mdp4_plane_set_property(struct drm_plane *plane, plane 92 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c static void mdp4_plane_cleanup_fb(struct drm_plane *plane, plane 95 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); plane 96 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct mdp4_kms *mdp4_kms = get_kms(plane); plane 108 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c static int mdp4_plane_atomic_check(struct drm_plane *plane, plane 114 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c static void mdp4_plane_atomic_update(struct drm_plane *plane, plane 117 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct drm_plane_state *state = plane->state; plane 120 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c ret = mdp4_plane_mode_set(plane, plane 137 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c static void mdp4_plane_set_scanout(struct drm_plane *plane, plane 140 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); plane 141 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct mdp4_kms *mdp4_kms = get_kms(plane); plane 192 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c static int mdp4_plane_mode_set(struct drm_plane *plane, plane 199 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct drm_device *dev = plane->dev; plane 200 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); plane 201 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct mdp4_kms *mdp4_kms = get_kms(plane); plane 297 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c mdp4_plane_set_scanout(plane, fb); plane 344 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane) plane 346 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); plane 354 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct drm_plane *plane = NULL; plane 365 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c plane = &mdp4_plane->base; plane 376 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs, plane 382 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c drm_plane_helper_add(plane, &mdp4_plane_helper_funcs); plane 384 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c mdp4_plane_install_properties(plane, &plane->base); plane 386 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c drm_plane_enable_fb_damage_clips(plane); plane 388 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c return plane; plane 391 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c if (plane) plane 392 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c mdp4_plane_destroy(plane); plane 110 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_plane *plane; plane 117 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { plane 118 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (!plane->state->visible) plane 120 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c flush_mask |= mdp5_plane_get_flush(plane); plane 216 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_plane *plane; plane 245 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { plane 248 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (!plane->state->visible) plane 251 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c pstate = to_mdp5_plane_state(plane->state); plane 253 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c stage[pstate->stage][PIPE_LEFT] = mdp5_plane_pipe(plane); plane 260 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_plane_pipe(plane); plane 266 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c right_pipe = mdp5_plane_right_pipe(plane); plane 292 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c plane = pstates[i]->base.plane; plane 567 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_plane *plane; plane 614 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_plane *plane; plane 628 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { plane 632 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c pstates[cnt].plane = plane; plane 643 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 671 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c (pstates[cnt - 1].plane->type != DRM_PLANE_TYPE_CURSOR)); plane 690 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c pstates[i].plane->name, plane 1208 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_plane *plane, plane 1232 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_crtc_init_with_planes(dev, crtc, plane, cursor_plane, plane 501 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct drm_plane *plane; plane 511 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c plane = mdp5_plane_init(dev, type); plane 512 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c if (IS_ERR(plane)) { plane 513 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c ret = PTR_ERR(plane); plane 517 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c priv->planes[priv->num_planes++] = plane; plane 520 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c primary[pi++] = plane; plane 522 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c cursor[ci++] = plane; plane 273 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h uint32_t mdp5_plane_get_flush(struct drm_plane *plane); plane 274 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane); plane 275 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h enum mdp5_pipe mdp5_plane_right_pipe(struct drm_plane *plane); plane 287 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h struct drm_plane *plane, plane 9 drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c int mdp5_pipe_assign(struct drm_atomic_state *s, struct drm_plane *plane, plane 53 drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c plane->type != DRM_PLANE_TYPE_CURSOR) plane 110 drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c (*hwpipe)->name, plane->name, caps); plane 111 drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c new_state->hwpipe_to_plane[(*hwpipe)->idx] = plane; plane 115 drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c (*r_hwpipe)->name, plane->name, caps); plane 116 drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c new_state->hwpipe_to_plane[(*r_hwpipe)->idx] = plane; plane 36 drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.h int mdp5_pipe_assign(struct drm_atomic_state *s, struct drm_plane *plane, plane 22 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static int mdp5_plane_mode_set(struct drm_plane *plane, plane 26 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static struct mdp5_kms *get_kms(struct drm_plane *plane) plane 28 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct msm_drm_private *priv = plane->dev->dev_private; plane 37 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static void mdp5_plane_destroy(struct drm_plane *plane) plane 39 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane); plane 41 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_plane_cleanup(plane); plane 47 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_plane *plane) plane 49 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_plane_create_rotation_property(plane, plane 58 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static void mdp5_plane_install_properties(struct drm_plane *plane, plane 61 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_device *dev = plane->dev; plane 78 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_object_attach_property(&plane->base, prop, init_val); \ plane 92 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c mdp5_plane_install_rotation_property(dev, plane); plane 99 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static int mdp5_plane_atomic_set_property(struct drm_plane *plane, plane 103 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_device *dev = plane->dev; plane 127 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static int mdp5_plane_atomic_get_property(struct drm_plane *plane, plane 131 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_device *dev = plane->dev; plane 160 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct mdp5_kms *mdp5_kms = get_kms(state->plane); plane 174 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static void mdp5_plane_reset(struct drm_plane *plane) plane 178 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (plane->state && plane->state->fb) plane 179 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_framebuffer_put(plane->state->fb); plane 181 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c kfree(to_mdp5_plane_state(plane->state)); plane 188 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (plane->type == DRM_PLANE_TYPE_PRIMARY) plane 191 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c mdp5_state->zpos = STAGE0 + drm_plane_index(plane); plane 193 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c mdp5_state->base.plane = plane; plane 195 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state = &mdp5_state->base; plane 199 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c mdp5_plane_duplicate_state(struct drm_plane *plane) plane 203 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (WARN_ON(!plane->state)) plane 206 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c mdp5_state = kmemdup(to_mdp5_plane_state(plane->state), plane 211 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c __drm_atomic_helper_plane_duplicate_state(plane, &mdp5_state->base); plane 216 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static void mdp5_plane_destroy_state(struct drm_plane *plane, plane 239 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static void mdp5_plane_cleanup_fb(struct drm_plane *plane, plane 242 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct mdp5_kms *mdp5_kms = get_kms(plane); plane 249 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c DBG("%s: cleanup: FB[%u]", plane->name, fb->base.id); plane 257 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_plane *plane = state->plane; plane 258 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_plane_state *old_state = plane->state; plane 259 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct mdp5_cfg *config = mdp5_cfg_get_config(get_kms(plane)->cfg); plane 268 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c DBG("%s: check (%d -> %d)", plane->name, plane 310 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct mdp5_kms *mdp5_kms = get_kms(plane); plane 332 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 371 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ret = mdp5_pipe_assign(state->state, plane, caps, plane 377 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->name); plane 405 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static int mdp5_plane_atomic_check(struct drm_plane *plane, plane 411 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c crtc = state->crtc ? state->crtc : plane->state->crtc; plane 422 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static void mdp5_plane_atomic_update(struct drm_plane *plane, plane 425 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_plane_state *state = plane->state; plane 427 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c DBG("%s: update", plane->name); plane 432 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ret = mdp5_plane_mode_set(plane, plane 440 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static int mdp5_plane_atomic_async_check(struct drm_plane *plane, plane 463 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (plane->state->crtc != state->crtc || plane 464 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state->src_w != state->src_w || plane 465 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state->src_h != state->src_h || plane 466 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state->crtc_w != state->crtc_w || plane 467 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state->crtc_h != state->crtc_h || plane 468 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c !plane->state->fb || plane 469 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state->fb != state->fb) plane 488 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (state->visible != plane->state->visible) plane 494 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static void mdp5_plane_atomic_async_update(struct drm_plane *plane, plane 497 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_framebuffer *old_fb = plane->state->fb; plane 499 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state->src_x = new_state->src_x; plane 500 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state->src_y = new_state->src_y; plane 501 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state->crtc_x = new_state->crtc_x; plane 502 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state->crtc_y = new_state->crtc_y; plane 510 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ret = mdp5_plane_mode_set(plane, new_state->crtc, new_state->fb, plane 516 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c mdp5_ctl_commit(ctl, pipeline, mdp5_plane_get_flush(plane), true); plane 519 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c *to_mdp5_plane_state(plane->state) = plane 645 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static int calc_scalex_steps(struct drm_plane *plane, plane 650 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct mdp5_kms *mdp5_kms = get_kms(plane); plane 668 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static int calc_scaley_steps(struct drm_plane *plane, plane 673 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct mdp5_kms *mdp5_kms = get_kms(plane); plane 913 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c static int mdp5_plane_mode_set(struct drm_plane *plane, plane 917 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_plane_state *pstate = plane->state; plane 919 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct mdp5_kms *mdp5_kms = get_kms(plane); plane 965 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", plane->name, plane 981 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ret = calc_scalex_steps(plane, pix_format, src_w, crtc_w, step.x); plane 985 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ret = calc_scaley_steps(plane, pix_format, src_h, crtc_h, step.y); plane 1029 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane) plane 1031 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state); plane 1039 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c enum mdp5_pipe mdp5_plane_right_pipe(struct drm_plane *plane) plane 1041 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state); plane 1049 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c uint32_t mdp5_plane_get_flush(struct drm_plane *plane) plane 1051 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state); plane 1069 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_plane *plane = NULL; plane 1079 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane = &mdp5_plane->base; plane 1084 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ret = drm_universal_plane_init(dev, plane, 0xff, &mdp5_plane_funcs, plane 1090 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_plane_helper_add(plane, &mdp5_plane_helper_funcs); plane 1092 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c mdp5_plane_install_properties(plane, &plane->base); plane 1094 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_plane_enable_fb_damage_clips(plane); plane 1096 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c return plane; plane 1099 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (plane) plane 1100 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c mdp5_plane_destroy(plane); plane 39 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c static inline u32 pipe2client(enum mdp5_pipe pipe, int plane) plane 43 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c if (WARN_ON(plane >= pipe2nclients(pipe))) plane 58 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c return mdp5_cfg->smp.clients[pipe] + plane; plane 352 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c struct drm_plane *plane = hwpstate->hwpipe_to_plane[hwpipe->idx]; plane 361 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c plane ? plane->name : NULL); plane 16 drivers/gpu/drm/msm/msm_atomic.c int msm_atomic_prepare_fb(struct drm_plane *plane, plane 19 drivers/gpu/drm/msm/msm_atomic.c struct msm_drm_private *priv = plane->dev->dev_private; plane 25 drivers/gpu/drm/msm/msm_atomic.c drm_gem_fb_prepare_fb(plane, new_state); plane 226 drivers/gpu/drm/msm/msm_drv.h int msm_atomic_prepare_fb(struct drm_plane *plane, plane 334 drivers/gpu/drm/msm/msm_drv.h struct msm_gem_address_space *aspace, int plane); plane 335 drivers/gpu/drm/msm/msm_drv.h struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane); plane 81 drivers/gpu/drm/msm/msm_fb.c struct msm_gem_address_space *aspace, int plane) plane 83 drivers/gpu/drm/msm/msm_fb.c if (!fb->obj[plane]) plane 85 drivers/gpu/drm/msm/msm_fb.c return msm_gem_iova(fb->obj[plane], aspace) + fb->offsets[plane]; plane 88 drivers/gpu/drm/msm/msm_fb.c struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane) plane 90 drivers/gpu/drm/msm/msm_fb.c return drm_gem_fb_get_obj(fb, plane); plane 192 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_framebuffer *fb = mxsfb->pipe.plane.state->fb; plane 105 drivers/gpu/drm/mxsfb/mxsfb_drv.c struct drm_device *drm = pipe->plane.dev; plane 116 drivers/gpu/drm/mxsfb/mxsfb_drv.c struct drm_device *drm = pipe->plane.dev; plane 290 drivers/gpu/drm/nouveau/dispnv04/hw.c bool save, unsigned plane) plane 294 drivers/gpu/drm/nouveau/dispnv04/hw.c NVWriteVgaSeq(dev, 0, NV_VIO_SR_PLANE_MASK_INDEX, 1 << plane); plane 295 drivers/gpu/drm/nouveau/dispnv04/hw.c NVWriteVgaGr(dev, 0, NV_VIO_GX_READ_MAP_INDEX, plane); plane 298 drivers/gpu/drm/nouveau/dispnv04/hw.c nv04_display(dev)->saved_vga_font[plane][i] = plane 301 drivers/gpu/drm/nouveau/dispnv04/hw.c iowrite32_native(nv04_display(dev)->saved_vga_font[plane][i], plane 313 drivers/gpu/drm/nouveau/dispnv04/hw.c unsigned plane; plane 354 drivers/gpu/drm/nouveau/dispnv04/hw.c for (plane = 0; plane < 4; plane++) plane 355 drivers/gpu/drm/nouveau/dispnv04/hw.c nouveau_vga_font_io(dev, iovram, save, plane); plane 112 drivers/gpu/drm/nouveau/dispnv04/overlay.c nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, plane 119 drivers/gpu/drm/nouveau/dispnv04/overlay.c struct nouveau_drm *drm = nouveau_drm(plane->dev); plane 122 drivers/gpu/drm/nouveau/dispnv04/overlay.c container_of(plane, struct nouveau_plane, base); plane 190 drivers/gpu/drm/nouveau/dispnv04/overlay.c nv10_disable_plane(struct drm_plane *plane, plane 193 drivers/gpu/drm/nouveau/dispnv04/overlay.c struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object; plane 195 drivers/gpu/drm/nouveau/dispnv04/overlay.c container_of(plane, struct nouveau_plane, base); plane 207 drivers/gpu/drm/nouveau/dispnv04/overlay.c nv_destroy_plane(struct drm_plane *plane) plane 209 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_plane_force_disable(plane); plane 210 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_plane_cleanup(plane); plane 211 drivers/gpu/drm/nouveau/dispnv04/overlay.c kfree(plane); plane 215 drivers/gpu/drm/nouveau/dispnv04/overlay.c nv10_set_params(struct nouveau_plane *plane) plane 217 drivers/gpu/drm/nouveau/dispnv04/overlay.c struct nvif_object *dev = &nouveau_drm(plane->base.dev)->client.device.object; plane 218 drivers/gpu/drm/nouveau/dispnv04/overlay.c u32 luma = (plane->brightness - 512) << 16 | plane->contrast; plane 219 drivers/gpu/drm/nouveau/dispnv04/overlay.c u32 chroma = ((sin_mul(plane->hue, plane->saturation) & 0xffff) << 16) | plane 220 drivers/gpu/drm/nouveau/dispnv04/overlay.c (cos_mul(plane->hue, plane->saturation) & 0xffff); plane 227 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_COLOR_KEY, plane->colorkey & 0xffffff); plane 229 drivers/gpu/drm/nouveau/dispnv04/overlay.c if (plane->cur) { plane 230 drivers/gpu/drm/nouveau/dispnv04/overlay.c if (plane->color_encoding == DRM_COLOR_YCBCR_BT709) plane 232 drivers/gpu/drm/nouveau/dispnv04/overlay.c if (plane->colorkey & (1 << 24)) plane 234 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_mask(dev, NV_PVIDEO_FORMAT(plane->flip), plane 242 drivers/gpu/drm/nouveau/dispnv04/overlay.c nv_set_property(struct drm_plane *plane, plane 247 drivers/gpu/drm/nouveau/dispnv04/overlay.c container_of(plane, struct nouveau_plane, base); plane 280 drivers/gpu/drm/nouveau/dispnv04/overlay.c struct nouveau_plane *plane = kzalloc(sizeof(struct nouveau_plane), GFP_KERNEL); plane 284 drivers/gpu/drm/nouveau/dispnv04/overlay.c if (!plane) plane 297 drivers/gpu/drm/nouveau/dispnv04/overlay.c ret = drm_plane_init(device, &plane->base, 3 /* both crtc's */, plane 304 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.colorkey = drm_property_create_range( plane 306 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.contrast = drm_property_create_range( plane 308 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.brightness = drm_property_create_range( plane 310 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.hue = drm_property_create_range( plane 312 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.saturation = drm_property_create_range( plane 314 drivers/gpu/drm/nouveau/dispnv04/overlay.c if (!plane->props.colorkey || plane 315 drivers/gpu/drm/nouveau/dispnv04/overlay.c !plane->props.contrast || plane 316 drivers/gpu/drm/nouveau/dispnv04/overlay.c !plane->props.brightness || plane 317 drivers/gpu/drm/nouveau/dispnv04/overlay.c !plane->props.hue || plane 318 drivers/gpu/drm/nouveau/dispnv04/overlay.c !plane->props.saturation) plane 321 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->colorkey = 0; plane 322 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_object_attach_property(&plane->base.base, plane 323 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.colorkey, plane->colorkey); plane 325 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->contrast = 0x1000; plane 326 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_object_attach_property(&plane->base.base, plane 327 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.contrast, plane->contrast); plane 329 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->brightness = 512; plane 330 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_object_attach_property(&plane->base.base, plane 331 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.brightness, plane->brightness); plane 333 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->hue = 0; plane 334 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_object_attach_property(&plane->base.base, plane 335 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.hue, plane->hue); plane 337 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->saturation = 0x1000; plane 338 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_object_attach_property(&plane->base.base, plane 339 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.saturation, plane->saturation); plane 341 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->color_encoding = DRM_COLOR_YCBCR_BT601; plane 342 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_plane_create_color_properties(&plane->base, plane 349 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->set_params = nv10_set_params; plane 350 drivers/gpu/drm/nouveau/dispnv04/overlay.c nv10_set_params(plane); plane 351 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_plane_force_disable(&plane->base); plane 354 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_plane_cleanup(&plane->base); plane 356 drivers/gpu/drm/nouveau/dispnv04/overlay.c kfree(plane); plane 361 drivers/gpu/drm/nouveau/dispnv04/overlay.c nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, plane 368 drivers/gpu/drm/nouveau/dispnv04/overlay.c struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object; plane 370 drivers/gpu/drm/nouveau/dispnv04/overlay.c container_of(plane, struct nouveau_plane, base); plane 439 drivers/gpu/drm/nouveau/dispnv04/overlay.c nv04_disable_plane(struct drm_plane *plane, plane 442 drivers/gpu/drm/nouveau/dispnv04/overlay.c struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object; plane 444 drivers/gpu/drm/nouveau/dispnv04/overlay.c container_of(plane, struct nouveau_plane, base); plane 469 drivers/gpu/drm/nouveau/dispnv04/overlay.c struct nouveau_plane *plane = kzalloc(sizeof(struct nouveau_plane), GFP_KERNEL); plane 472 drivers/gpu/drm/nouveau/dispnv04/overlay.c if (!plane) plane 475 drivers/gpu/drm/nouveau/dispnv04/overlay.c ret = drm_plane_init(device, &plane->base, 1 /* single crtc */, plane 482 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.colorkey = drm_property_create_range( plane 484 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.brightness = drm_property_create_range( plane 486 drivers/gpu/drm/nouveau/dispnv04/overlay.c if (!plane->props.colorkey || plane 487 drivers/gpu/drm/nouveau/dispnv04/overlay.c !plane->props.brightness) plane 490 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->colorkey = 0; plane 491 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_object_attach_property(&plane->base.base, plane 492 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.colorkey, plane->colorkey); plane 494 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->brightness = 512; plane 495 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_object_attach_property(&plane->base.base, plane 496 drivers/gpu/drm/nouveau/dispnv04/overlay.c plane->props.brightness, plane->brightness); plane 498 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_plane_force_disable(&plane->base); plane 501 drivers/gpu/drm/nouveau/dispnv04/overlay.c drm_plane_cleanup(&plane->base); plane 503 drivers/gpu/drm/nouveau/dispnv04/overlay.c kfree(plane); plane 54 drivers/gpu/drm/nouveau/dispnv50/curs507a.c u32 handle = nv50_disp(wndw->plane.dev)->core->chan.vram.handle; plane 1812 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_plane *plane; plane 1815 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_new_plane_in_state(state, plane, new_plane_state, i) { plane 1816 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); plane 1831 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_plane *plane; plane 1867 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_new_plane_in_state(state, plane, new_plane_state, i) { plane 1869 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); plane 1871 drivers/gpu/drm/nouveau/dispnv50/disp.c NV_ATOMIC(drm, "%s: clr %02x (set %02x)\n", plane->name, plane 1954 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_new_plane_in_state(state, plane, new_plane_state, i) { plane 1956 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); plane 1958 drivers/gpu/drm/nouveau/dispnv50/disp.c NV_ATOMIC(drm, "%s: set %02x (clr %02x)\n", plane->name, plane 1984 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_new_plane_in_state(state, plane, new_plane_state, i) { plane 1986 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); plane 1989 drivers/gpu/drm/nouveau/dispnv50/disp.c NV_ERROR(drm, "%s: timeout\n", plane->name); plane 2031 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_plane *plane; plane 2058 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_new_plane_in_state(state, plane, new_plane_state, i) { plane 2060 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); plane 2256 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_plane *plane; plane 2258 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_for_each_plane(plane, dev) { plane 2259 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); plane 2260 drivers/gpu/drm/nouveau/dispnv50/disp.c if (plane->funcs != &nv50_wndw) plane 2278 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_plane *plane; plane 2290 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_for_each_plane(plane, dev) { plane 2291 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); plane 2292 drivers/gpu/drm/nouveau/dispnv50/disp.c if (plane->funcs != &nv50_wndw) plane 510 drivers/gpu/drm/nouveau/dispnv50/head.c drm_crtc_init_with_planes(dev, crtc, &base->plane, &curs->plane, plane 104 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_disp *disp = nv50_disp(wndw->plane.dev); plane 169 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_disp *disp = nv50_disp(wndw->plane.dev); plane 185 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev); plane 186 drivers/gpu/drm/nouveau/dispnv50/wndw.c NV_ATOMIC(drm, "%s release\n", wndw->plane.name); plane 238 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev); plane 241 drivers/gpu/drm/nouveau/dispnv50/wndw.c NV_ATOMIC(drm, "%s acquire\n", wndw->plane.name); plane 390 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_atomic_check(struct drm_plane *plane, struct drm_plane_state *state) plane 392 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nouveau_drm *drm = nouveau_drm(plane->dev); plane 393 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_wndw *wndw = nv50_wndw(plane); plane 394 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_wndw_atom *armw = nv50_wndw_atom(wndw->plane.state); plane 400 drivers/gpu/drm/nouveau/dispnv50/wndw.c NV_ATOMIC(drm, "%s atomic_check\n", plane->name); plane 465 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_cleanup_fb(struct drm_plane *plane, struct drm_plane_state *old_state) plane 468 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nouveau_drm *drm = nouveau_drm(plane->dev); plane 470 drivers/gpu/drm/nouveau/dispnv50/wndw.c NV_ATOMIC(drm, "%s cleanup: %p\n", plane->name, old_state->fb); plane 478 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state) plane 481 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nouveau_drm *drm = nouveau_drm(plane->dev); plane 482 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_wndw *wndw = nv50_wndw(plane); plane 488 drivers/gpu/drm/nouveau/dispnv50/wndw.c NV_ATOMIC(drm, "%s prepare: %p\n", plane->name, state->fb); plane 528 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_atomic_destroy_state(struct drm_plane *plane, plane 537 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_atomic_duplicate_state(struct drm_plane *plane) plane 539 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_wndw_atom *armw = nv50_wndw_atom(plane->state); plane 543 drivers/gpu/drm/nouveau/dispnv50/wndw.c __drm_atomic_helper_plane_duplicate_state(plane, &asyw->state); plane 557 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_zpos_default(struct drm_plane *plane) plane 559 drivers/gpu/drm/nouveau/dispnv50/wndw.c return (plane->type == DRM_PLANE_TYPE_PRIMARY) ? 0 : plane 560 drivers/gpu/drm/nouveau/dispnv50/wndw.c (plane->type == DRM_PLANE_TYPE_OVERLAY) ? 1 : 255; plane 564 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_reset(struct drm_plane *plane) plane 571 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (plane->state) plane 572 drivers/gpu/drm/nouveau/dispnv50/wndw.c plane->funcs->atomic_destroy_state(plane, plane->state); plane 574 drivers/gpu/drm/nouveau/dispnv50/wndw.c __drm_atomic_helper_plane_reset(plane, &asyw->state); plane 575 drivers/gpu/drm/nouveau/dispnv50/wndw.c plane->state->zpos = nv50_wndw_zpos_default(plane); plane 576 drivers/gpu/drm/nouveau/dispnv50/wndw.c plane->state->normalized_zpos = nv50_wndw_zpos_default(plane); plane 580 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_destroy(struct drm_plane *plane) plane 582 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_wndw *wndw = nv50_wndw(plane); plane 595 drivers/gpu/drm/nouveau/dispnv50/wndw.c drm_plane_cleanup(&wndw->plane); plane 653 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = drm_universal_plane_init(dev, &wndw->plane, heads, &nv50_wndw, plane 662 drivers/gpu/drm/nouveau/dispnv50/wndw.c drm_plane_helper_add(&wndw->plane, &nv50_wndw_helper); plane 673 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = drm_plane_create_zpos_property(&wndw->plane, plane 674 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_zpos_default(&wndw->plane), 0, 254); plane 678 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = drm_plane_create_alpha_property(&wndw->plane); plane 682 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = drm_plane_create_blend_mode_property(&wndw->plane, plane 689 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = drm_plane_create_zpos_immutable_property(&wndw->plane, plane 690 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_zpos_default(&wndw->plane)); plane 3 drivers/gpu/drm/nouveau/dispnv50/wndw.h #define nv50_wndw(p) container_of((p), struct nv50_wndw, plane) plane 26 drivers/gpu/drm/nouveau/dispnv50/wndw.h struct drm_plane plane; plane 352 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane); plane 354 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane); plane 744 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane = OMAP_DSS_WB; plane 747 drivers/gpu/drm/omapdrm/dss/dispc.c enable = REG_GET(dispc, DISPC_OVL_ATTRIBUTES(plane), 0, 0) == 1; plane 762 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int reg, plane 765 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_H(plane, reg), value); plane 769 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int reg, plane 772 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_HV(plane, reg), value); plane 776 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int reg, plane 779 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_V(plane, reg), value); plane 783 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int reg, plane 786 drivers/gpu/drm/omapdrm/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 788 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_H2(plane, reg), value); plane 792 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int reg, plane 795 drivers/gpu/drm/omapdrm/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 797 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_HV2(plane, reg), value); plane 801 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int reg, plane 804 drivers/gpu/drm/omapdrm/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 806 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_V2(plane, reg), value); plane 810 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int fir_hinc, plane 839 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_write_firh_reg(dispc, plane, i, h); plane 840 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_write_firhv_reg(dispc, plane, i, hv); plane 842 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_write_firh2_reg(dispc, plane, i, h); plane 843 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_write_firhv2_reg(dispc, plane, i, hv); plane 854 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_write_firv_reg(dispc, plane, i, v); plane 856 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_write_firv2_reg(dispc, plane, i, v); plane 872 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 877 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 0), CVAL(ct->rcr, ct->ry)); plane 878 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 1), CVAL(ct->gy, ct->rcb)); plane 879 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 2), CVAL(ct->gcb, ct->gcr)); plane 880 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 3), CVAL(ct->bcr, ct->by)); plane 881 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 4), CVAL(0, ct->bcb)); plane 883 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), ct->full_range, 11, 11); plane 891 drivers/gpu/drm/omapdrm/dss/dispc.c const enum omap_plane_id plane = OMAP_DSS_WB; plane 895 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 0), CVAL(ct->yg, ct->yr)); plane 896 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 1), CVAL(ct->crr, ct->yb)); plane 897 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 2), CVAL(ct->crb, ct->crg)); plane 898 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 3), CVAL(ct->cbg, ct->cbr)); plane 899 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 4), CVAL(0, ct->cbb)); plane 901 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), ct->full_range, 11, 11); plane 935 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, u32 paddr) plane 937 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_BA0(plane), paddr); plane 941 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, u32 paddr) plane 943 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_BA1(plane), paddr); plane 947 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, u32 paddr) plane 949 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_BA0_UV(plane), paddr); plane 953 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, u32 paddr) plane 955 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_BA1_UV(plane), paddr); plane 959 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 969 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_POSITION(plane), val); plane 973 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int width, plane 978 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane == OMAP_DSS_GFX || plane == OMAP_DSS_WB) plane 979 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_SIZE(plane), val); plane 981 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_PICTURE_SIZE(plane), val); plane 985 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int width, plane 990 drivers/gpu/drm/omapdrm/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 994 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane == OMAP_DSS_WB) plane 995 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_PICTURE_SIZE(plane), val); plane 997 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_SIZE(plane), val); plane 1001 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1007 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), zorder, 27, 26); plane 1022 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1029 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 28, 28); plane 1033 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1043 drivers/gpu/drm/omapdrm/dss/dispc.c shift = shifts[plane]; plane 1048 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, s32 inc) plane 1050 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_PIXEL_INC(plane), inc); plane 1054 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, s32 inc) plane 1056 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ROW_INC(plane), inc); plane 1060 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, u32 fourcc) plane 1063 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane != OMAP_DSS_GFX) { plane 1129 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), m, 4, 1); plane 1133 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1140 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), 1, 29, 29); plane 1142 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), 0, 29, 29); plane 1146 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1153 drivers/gpu/drm/omapdrm/dss/dispc.c switch (plane) { plane 1167 drivers/gpu/drm/omapdrm/dss/dispc.c val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane)); plane 1205 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ATTRIBUTES(plane), val); plane 1209 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane) plane 1214 drivers/gpu/drm/omapdrm/dss/dispc.c switch (plane) { plane 1228 drivers/gpu/drm/omapdrm/dss/dispc.c val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane)); plane 1250 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1256 drivers/gpu/drm/omapdrm/dss/dispc.c shift = shifts[plane]; plane 1257 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), burst_size, plane 1274 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane) plane 1281 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, u32 fourcc) plane 1286 drivers/gpu/drm/omapdrm/dss/dispc.c modes = dispc->feat->supported_color_modes[plane]; plane 1297 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane) plane 1299 drivers/gpu/drm/omapdrm/dss/dispc.c return dispc->feat->supported_color_modes[plane]; plane 1333 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, bool enable) plane 1337 drivers/gpu/drm/omapdrm/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 1339 drivers/gpu/drm/omapdrm/dss/dispc.c val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane)); plane 1341 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ATTRIBUTES(plane), val); plane 1345 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1355 drivers/gpu/drm/omapdrm/dss/dispc.c shift = shifts[plane]; plane 1356 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift); plane 1446 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane) plane 1452 drivers/gpu/drm/omapdrm/dss/dispc.c if (dispc->fifo_assignment[fifo] == plane) plane 1460 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1480 drivers/gpu/drm/omapdrm/dss/dispc.c plane, plane 1481 drivers/gpu/drm/omapdrm/dss/dispc.c REG_GET(dispc, DISPC_OVL_FIFO_THRESHOLD(plane), plane 1483 drivers/gpu/drm/omapdrm/dss/dispc.c REG_GET(dispc, DISPC_OVL_FIFO_THRESHOLD(plane), plane 1487 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIFO_THRESHOLD(plane), plane 1497 drivers/gpu/drm/omapdrm/dss/dispc.c dispc->feat->set_max_preload && plane != OMAP_DSS_WB) plane 1498 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_PRELOAD(plane), plane 1514 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1526 drivers/gpu/drm/omapdrm/dss/dispc.c burst_size = dispc_ovl_get_burst_size(dispc, plane); plane 1527 drivers/gpu/drm/omapdrm/dss/dispc.c ovl_fifo_size = dispc_ovl_get_fifo_size(dispc, plane); plane 1546 drivers/gpu/drm/omapdrm/dss/dispc.c } else if (plane == OMAP_DSS_WB) { plane 1561 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, bool enable) plane 1565 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane == OMAP_DSS_GFX) plane 1570 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), enable, bit, bit); plane 1574 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1577 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_MFLAG_THRESHOLD(plane), plane 1639 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1655 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR(plane), val); plane 1658 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR2(plane), val); plane 1663 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int haccu, plane 1677 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ACCU0(plane), val); plane 1681 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int haccu, plane 1695 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ACCU1(plane), val); plane 1699 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int haccu, plane 1705 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ACCU2_0(plane), val); plane 1709 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, int haccu, plane 1715 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ACCU2_1(plane), val); plane 1719 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1730 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_scale_coef(dispc, plane, fir_hinc, fir_vinc, five_taps, plane 1732 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_fir(dispc, plane, fir_hinc, fir_vinc, color_comp); plane 1736 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1820 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_vid_accu2_0(dispc, plane, h_accu2_0, v_accu2_0); plane 1821 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_vid_accu2_1(dispc, plane, h_accu2_1, v_accu2_1); plane 1825 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1836 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_scale_param(dispc, plane, orig_width, orig_height, plane 1839 drivers/gpu/drm/omapdrm/dss/dispc.c l = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane)); plane 1860 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ATTRIBUTES(plane), l); plane 1875 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_vid_accu0(dispc, plane, 0, accu0); plane 1876 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_vid_accu1(dispc, plane, 0, accu1); plane 1880 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1889 drivers/gpu/drm/omapdrm/dss/dispc.c bool chroma_upscale = plane != OMAP_DSS_WB; plane 1899 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane != OMAP_DSS_WB) plane 1900 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES2(plane), plane 1905 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_accu_uv(dispc, plane, orig_width, orig_height, out_width, plane 1948 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_scale_param(dispc, plane, orig_width, orig_height, plane 1952 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane != OMAP_DSS_WB) plane 1953 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES2(plane), plane 1957 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), scale_x ? 1 : 0, 5, 5); plane 1959 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), scale_y ? 1 : 0, 6, 6); plane 1963 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 1970 drivers/gpu/drm/omapdrm/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 1972 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_scaling_common(dispc, plane, orig_width, orig_height, plane 1976 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_scaling_uv(dispc, plane, orig_width, orig_height, plane 1982 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, u8 rotation, plane 2038 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), vidrot, 13, 12); plane 2040 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), plane 2043 drivers/gpu/drm/omapdrm/dss/dispc.c if (dispc_ovl_color_mode_supported(dispc, plane, DRM_FORMAT_NV12)) { plane 2050 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), plane 2493 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 2513 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane == OMAP_DSS_WB) { plane 2589 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 2613 drivers/gpu/drm/omapdrm/dss/dispc.c unsigned long pclk = dispc_plane_pclk_rate(dispc, plane); plane 2614 drivers/gpu/drm/omapdrm/dss/dispc.c unsigned long lclk = dispc_plane_lclk_rate(dispc, plane); plane 2620 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane == OMAP_DSS_WB) plane 2634 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane != OMAP_DSS_WB) { plane 2649 drivers/gpu/drm/omapdrm/dss/dispc.c if (!dispc_ovl_color_mode_supported(dispc, plane, fourcc)) plane 2652 drivers/gpu/drm/omapdrm/dss/dispc.c r = dispc_ovl_calc_scaling(dispc, plane, pclk, lclk, caps, vm, in_width, plane 2700 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane == OMAP_DSS_WB) plane 2714 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_color_mode(dispc, plane, fourcc); plane 2716 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_configure_burst_type(dispc, plane, rotation_type); plane 2721 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_ba0(dispc, plane, paddr + offset0); plane 2722 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_ba1(dispc, plane, paddr + offset1); plane 2725 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_ba0_uv(dispc, plane, p_uv_addr + offset0); plane 2726 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_ba1_uv(dispc, plane, p_uv_addr + offset1); plane 2732 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_row_inc(dispc, plane, row_inc); plane 2733 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_pix_inc(dispc, plane, pix_inc); plane 2738 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_pos(dispc, plane, caps, pos_x, pos_y); plane 2740 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_input_size(dispc, plane, in_width, in_height); plane 2743 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_scaling(dispc, plane, in_width, in_height, plane 2746 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_output_size(dispc, plane, out_width, out_height); plane 2747 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_vid_color_conv(dispc, plane, cconv); plane 2750 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_rotation_attrs(dispc, plane, rotation, rotation_type, plane 2753 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_zorder(dispc, plane, caps, zorder); plane 2754 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_pre_mult_alpha(dispc, plane, caps, pre_mult_alpha); plane 2755 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_setup_global_alpha(dispc, plane, caps, global_alpha); plane 2757 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_enable_replication(dispc, plane, caps, replication); plane 2763 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, plane 2769 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_overlay_caps caps = dispc->feat->overlay_caps[plane]; plane 2774 drivers/gpu/drm/omapdrm/dss/dispc.c plane, &oi->paddr, &oi->p_uv_addr, oi->screen_width, oi->pos_x, plane 2778 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_set_channel_out(dispc, plane, channel); plane 2780 drivers/gpu/drm/omapdrm/dss/dispc.c r = dispc_ovl_setup_common(dispc, plane, caps, oi->paddr, oi->p_uv_addr, plane 2796 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane = OMAP_DSS_WB; plane 2813 drivers/gpu/drm/omapdrm/dss/dispc.c r = dispc_ovl_setup_common(dispc, plane, caps, wi->paddr, wi->p_uv_addr, plane 2838 drivers/gpu/drm/omapdrm/dss/dispc.c l = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane)); plane 2846 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ATTRIBUTES(plane), l); plane 2850 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES2(plane), 0, 7, 0); plane 2866 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0); plane 2878 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane, bool enable) plane 2880 drivers/gpu/drm/omapdrm/dss/dispc.c DSSDBG("dispc_enable_plane %d, %d\n", plane, enable); plane 2882 drivers/gpu/drm/omapdrm/dss/dispc.c REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 0, 0); plane 3368 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane) plane 3372 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane == OMAP_DSS_WB) plane 3375 drivers/gpu/drm/omapdrm/dss/dispc.c channel = dispc_ovl_get_channel_out(dispc, plane); plane 3381 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_plane_id plane) plane 3385 drivers/gpu/drm/omapdrm/dss/dispc.c if (plane == OMAP_DSS_WB) plane 3388 drivers/gpu/drm/omapdrm/dss/dispc.c channel = dispc_ovl_get_channel_out(dispc, plane); plane 3606 drivers/gpu/drm/omapdrm/dss/dispc.c #define DISPC_REG(plane, name, i) name(plane, i) plane 3607 drivers/gpu/drm/omapdrm/dss/dispc.c #define DUMPREG(dispc, plane, name, i) \ plane 3608 drivers/gpu/drm/omapdrm/dss/dispc.c seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, p_names[plane], \ plane 3609 drivers/gpu/drm/omapdrm/dss/dispc.c (int)(46 - strlen(#name) - strlen(p_names[plane])), " ", \ plane 3610 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_read_reg(dispc, DISPC_REG(plane, name, i))) plane 342 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_OVL_BASE(enum omap_plane_id plane) plane 344 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 362 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_BA0_OFFSET(enum omap_plane_id plane) plane 364 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 378 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_BA1_OFFSET(enum omap_plane_id plane) plane 380 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 394 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane_id plane) plane 396 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 414 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane_id plane) plane 416 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 434 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_POS_OFFSET(enum omap_plane_id plane) plane 436 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 449 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_SIZE_OFFSET(enum omap_plane_id plane) plane 451 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 465 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_ATTR_OFFSET(enum omap_plane_id plane) plane 467 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 482 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane_id plane) plane 484 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 502 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_FIFO_THRESH_OFFSET(enum omap_plane_id plane) plane 504 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 519 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane_id plane) plane 521 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 536 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_ROW_INC_OFFSET(enum omap_plane_id plane) plane 538 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 553 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_PIX_INC_OFFSET(enum omap_plane_id plane) plane 555 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 570 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane_id plane) plane 572 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 586 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_TABLE_BA_OFFSET(enum omap_plane_id plane) plane 588 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 602 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_FIR_OFFSET(enum omap_plane_id plane) plane 604 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 620 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_FIR2_OFFSET(enum omap_plane_id plane) plane 622 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 640 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane_id plane) plane 642 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 659 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane_id plane) plane 661 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 677 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane_id plane) plane 679 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 697 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane_id plane) plane 699 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 715 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane_id plane) plane 717 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 736 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane_id plane, u16 i) plane 738 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 755 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane_id plane, u16 i) plane 757 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 776 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane_id plane, u16 i) plane 778 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 795 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane_id plane, u16 i) plane 797 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 816 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_CONV_COEF_OFFSET(enum omap_plane_id plane, u16 i) plane 818 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 834 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane_id plane, u16 i) plane 836 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 854 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane_id plane, u16 i) plane 856 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 874 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane_id plane) plane 876 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 891 drivers/gpu/drm/omapdrm/dss/dispc.h static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane_id plane) plane 893 drivers/gpu/drm/omapdrm/dss/dispc.h switch (plane) { plane 415 drivers/gpu/drm/omapdrm/dss/dss.h enum omap_plane_id plane, u32 low, u32 high); plane 417 drivers/gpu/drm/omapdrm/dss/dss.h enum omap_plane_id plane, plane 607 drivers/gpu/drm/omapdrm/dss/omapdss.h int (*ovl_enable)(struct dispc_device *dispc, enum omap_plane_id plane, plane 609 drivers/gpu/drm/omapdrm/dss/omapdss.h int (*ovl_setup)(struct dispc_device *dispc, enum omap_plane_id plane, plane 615 drivers/gpu/drm/omapdrm/dss/omapdss.h enum omap_plane_id plane); plane 781 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_plane *plane) plane 818 drivers/gpu/drm/omapdrm/omap_crtc.c ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL, plane 29 drivers/gpu/drm/omapdrm/omap_crtc.h struct drm_plane *plane); plane 273 drivers/gpu/drm/omapdrm/omap_drv.c struct drm_plane *plane; plane 278 drivers/gpu/drm/omapdrm/omap_drv.c plane = omap_plane_init(dev, i, type, plane_crtc_mask); plane 279 drivers/gpu/drm/omapdrm/omap_drv.c if (IS_ERR(plane)) plane 280 drivers/gpu/drm/omapdrm/omap_drv.c return PTR_ERR(plane); plane 282 drivers/gpu/drm/omapdrm/omap_drv.c priv->planes[priv->num_planes++] = plane; plane 53 drivers/gpu/drm/omapdrm/omap_fb.c struct plane planes[2]; plane 86 drivers/gpu/drm/omapdrm/omap_fb.c struct plane *plane = &omap_fb->planes[n]; plane 93 drivers/gpu/drm/omapdrm/omap_fb.c return plane->dma_addr + offset; plane 138 drivers/gpu/drm/omapdrm/omap_fb.c struct plane *plane = &omap_fb->planes[0]; plane 212 drivers/gpu/drm/omapdrm/omap_fb.c plane = &omap_fb->planes[1]; plane 241 drivers/gpu/drm/omapdrm/omap_fb.c struct plane *plane = &omap_fb->planes[i]; plane 242 drivers/gpu/drm/omapdrm/omap_fb.c ret = omap_gem_pin(fb->obj[i], &plane->dma_addr); plane 256 drivers/gpu/drm/omapdrm/omap_fb.c struct plane *plane = &omap_fb->planes[i]; plane 258 drivers/gpu/drm/omapdrm/omap_fb.c plane->dma_addr = 0; plane 282 drivers/gpu/drm/omapdrm/omap_fb.c struct plane *plane = &omap_fb->planes[i]; plane 284 drivers/gpu/drm/omapdrm/omap_fb.c plane->dma_addr = 0; plane 394 drivers/gpu/drm/omapdrm/omap_fb.c struct plane *plane = &omap_fb->planes[i]; plane 409 drivers/gpu/drm/omapdrm/omap_fb.c plane->dma_addr = 0; plane 26 drivers/gpu/drm/omapdrm/omap_plane.c static int omap_plane_prepare_fb(struct drm_plane *plane, plane 35 drivers/gpu/drm/omapdrm/omap_plane.c static void omap_plane_cleanup_fb(struct drm_plane *plane, plane 42 drivers/gpu/drm/omapdrm/omap_plane.c static void omap_plane_atomic_update(struct drm_plane *plane, plane 45 drivers/gpu/drm/omapdrm/omap_plane.c struct omap_drm_private *priv = plane->dev->dev_private; plane 46 drivers/gpu/drm/omapdrm/omap_plane.c struct omap_plane *omap_plane = to_omap_plane(plane); plane 47 drivers/gpu/drm/omapdrm/omap_plane.c struct drm_plane_state *state = plane->state; plane 77 drivers/gpu/drm/omapdrm/omap_plane.c dev_err(plane->dev->dev, "Failed to setup plane %s\n", plane 86 drivers/gpu/drm/omapdrm/omap_plane.c static void omap_plane_atomic_disable(struct drm_plane *plane, plane 89 drivers/gpu/drm/omapdrm/omap_plane.c struct omap_drm_private *priv = plane->dev->dev_private; plane 90 drivers/gpu/drm/omapdrm/omap_plane.c struct omap_plane *omap_plane = to_omap_plane(plane); plane 92 drivers/gpu/drm/omapdrm/omap_plane.c plane->state->rotation = DRM_MODE_ROTATE_0; plane 93 drivers/gpu/drm/omapdrm/omap_plane.c plane->state->zpos = plane->type == DRM_PLANE_TYPE_PRIMARY plane 99 drivers/gpu/drm/omapdrm/omap_plane.c static int omap_plane_atomic_check(struct drm_plane *plane, plane 143 drivers/gpu/drm/omapdrm/omap_plane.c static void omap_plane_destroy(struct drm_plane *plane) plane 145 drivers/gpu/drm/omapdrm/omap_plane.c struct omap_plane *omap_plane = to_omap_plane(plane); plane 149 drivers/gpu/drm/omapdrm/omap_plane.c drm_plane_cleanup(plane); plane 155 drivers/gpu/drm/omapdrm/omap_plane.c void omap_plane_install_properties(struct drm_plane *plane, plane 158 drivers/gpu/drm/omapdrm/omap_plane.c struct drm_device *dev = plane->dev; plane 162 drivers/gpu/drm/omapdrm/omap_plane.c if (!plane->rotation_property) plane 163 drivers/gpu/drm/omapdrm/omap_plane.c drm_plane_create_rotation_property(plane, plane 170 drivers/gpu/drm/omapdrm/omap_plane.c if (plane->rotation_property && obj != &plane->base) plane 171 drivers/gpu/drm/omapdrm/omap_plane.c drm_object_attach_property(obj, plane->rotation_property, plane 178 drivers/gpu/drm/omapdrm/omap_plane.c static void omap_plane_reset(struct drm_plane *plane) plane 180 drivers/gpu/drm/omapdrm/omap_plane.c struct omap_plane *omap_plane = to_omap_plane(plane); plane 182 drivers/gpu/drm/omapdrm/omap_plane.c drm_atomic_helper_plane_reset(plane); plane 183 drivers/gpu/drm/omapdrm/omap_plane.c if (!plane->state) plane 190 drivers/gpu/drm/omapdrm/omap_plane.c plane->state->zpos = plane->type == DRM_PLANE_TYPE_PRIMARY plane 194 drivers/gpu/drm/omapdrm/omap_plane.c static int omap_plane_atomic_set_property(struct drm_plane *plane, plane 199 drivers/gpu/drm/omapdrm/omap_plane.c struct omap_drm_private *priv = plane->dev->dev_private; plane 209 drivers/gpu/drm/omapdrm/omap_plane.c static int omap_plane_atomic_get_property(struct drm_plane *plane, plane 214 drivers/gpu/drm/omapdrm/omap_plane.c struct omap_drm_private *priv = plane->dev->dev_private; plane 256 drivers/gpu/drm/omapdrm/omap_plane.c struct drm_plane *plane; plane 280 drivers/gpu/drm/omapdrm/omap_plane.c plane = &omap_plane->base; plane 282 drivers/gpu/drm/omapdrm/omap_plane.c ret = drm_universal_plane_init(dev, plane, possible_crtcs, plane 288 drivers/gpu/drm/omapdrm/omap_plane.c drm_plane_helper_add(plane, &omap_plane_helper_funcs); plane 290 drivers/gpu/drm/omapdrm/omap_plane.c omap_plane_install_properties(plane, &plane->base); plane 291 drivers/gpu/drm/omapdrm/omap_plane.c drm_plane_create_zpos_property(plane, 0, 0, num_planes - 1); plane 292 drivers/gpu/drm/omapdrm/omap_plane.c drm_plane_create_alpha_property(plane); plane 293 drivers/gpu/drm/omapdrm/omap_plane.c drm_plane_create_blend_mode_property(plane, BIT(DRM_MODE_BLEND_PREMULTI) | plane 296 drivers/gpu/drm/omapdrm/omap_plane.c return plane; plane 23 drivers/gpu/drm/omapdrm/omap_plane.h void omap_plane_install_properties(struct drm_plane *plane, plane 90 drivers/gpu/drm/pl111/pl111_display.c struct drm_framebuffer *old_fb = pipe->plane.state->fb; plane 124 drivers/gpu/drm/pl111/pl111_display.c struct drm_plane *plane = &pipe->plane; plane 128 drivers/gpu/drm/pl111/pl111_display.c struct drm_framebuffer *fb = plane->state->fb; plane 396 drivers/gpu/drm/pl111/pl111_display.c struct drm_plane *plane = &pipe->plane; plane 397 drivers/gpu/drm/pl111/pl111_display.c struct drm_plane_state *pstate = plane->state; plane 475 drivers/gpu/drm/qxl/qxl_display.c static int qxl_primary_atomic_check(struct drm_plane *plane, plane 478 drivers/gpu/drm/qxl/qxl_display.c struct qxl_device *qdev = plane->dev->dev_private; plane 489 drivers/gpu/drm/qxl/qxl_display.c static int qxl_primary_apply_cursor(struct drm_plane *plane) plane 491 drivers/gpu/drm/qxl/qxl_display.c struct drm_device *dev = plane->dev; plane 493 drivers/gpu/drm/qxl/qxl_display.c struct drm_framebuffer *fb = plane->state->fb; plane 494 drivers/gpu/drm/qxl/qxl_display.c struct qxl_crtc *qcrtc = to_qxl_crtc(plane->state->crtc); plane 518 drivers/gpu/drm/qxl/qxl_display.c cmd->u.set.position.x = plane->state->crtc_x + fb->hot_x; plane 519 drivers/gpu/drm/qxl/qxl_display.c cmd->u.set.position.y = plane->state->crtc_y + fb->hot_y; plane 536 drivers/gpu/drm/qxl/qxl_display.c static void qxl_primary_atomic_update(struct drm_plane *plane, plane 539 drivers/gpu/drm/qxl/qxl_display.c struct qxl_device *qdev = plane->dev->dev_private; plane 540 drivers/gpu/drm/qxl/qxl_display.c struct qxl_bo *bo = gem_to_qxl_bo(plane->state->fb->obj[0]); plane 545 drivers/gpu/drm/qxl/qxl_display.c .x2 = plane->state->fb->width, plane 546 drivers/gpu/drm/qxl/qxl_display.c .y2 = plane->state->fb->height plane 556 drivers/gpu/drm/qxl/qxl_display.c qxl_primary_apply_cursor(plane); plane 561 drivers/gpu/drm/qxl/qxl_display.c qdev->dumb_heads[plane->state->crtc->index].x; plane 563 drivers/gpu/drm/qxl/qxl_display.c qxl_draw_dirty_fb(qdev, plane->state->fb, bo, 0, 0, &norect, 1, 1, plane 567 drivers/gpu/drm/qxl/qxl_display.c static void qxl_primary_atomic_disable(struct drm_plane *plane, plane 570 drivers/gpu/drm/qxl/qxl_display.c struct qxl_device *qdev = plane->dev->dev_private; plane 582 drivers/gpu/drm/qxl/qxl_display.c static void qxl_cursor_atomic_update(struct drm_plane *plane, plane 585 drivers/gpu/drm/qxl/qxl_display.c struct drm_device *dev = plane->dev; plane 587 drivers/gpu/drm/qxl/qxl_display.c struct drm_framebuffer *fb = plane->state->fb; plane 588 drivers/gpu/drm/qxl/qxl_display.c struct qxl_crtc *qcrtc = to_qxl_crtc(plane->state->crtc); plane 664 drivers/gpu/drm/qxl/qxl_display.c cmd->u.position.x = plane->state->crtc_x + fb->hot_x; plane 665 drivers/gpu/drm/qxl/qxl_display.c cmd->u.position.y = plane->state->crtc_y + fb->hot_y; plane 692 drivers/gpu/drm/qxl/qxl_display.c static void qxl_cursor_atomic_disable(struct drm_plane *plane, plane 695 drivers/gpu/drm/qxl/qxl_display.c struct qxl_device *qdev = plane->dev->dev_private; plane 775 drivers/gpu/drm/qxl/qxl_display.c static int qxl_plane_prepare_fb(struct drm_plane *plane, plane 778 drivers/gpu/drm/qxl/qxl_display.c struct qxl_device *qdev = plane->dev->dev_private; plane 790 drivers/gpu/drm/qxl/qxl_display.c if (plane->type == DRM_PLANE_TYPE_PRIMARY && plane 825 drivers/gpu/drm/qxl/qxl_display.c static void qxl_plane_cleanup_fb(struct drm_plane *plane, plane 843 drivers/gpu/drm/qxl/qxl_display.c if (old_state->fb != plane->state->fb && user_bo->shadow) { plane 896 drivers/gpu/drm/qxl/qxl_display.c struct drm_plane *plane; plane 916 drivers/gpu/drm/qxl/qxl_display.c plane = kzalloc(sizeof(*plane), GFP_KERNEL); plane 917 drivers/gpu/drm/qxl/qxl_display.c if (!plane) plane 920 drivers/gpu/drm/qxl/qxl_display.c err = drm_universal_plane_init(&qdev->ddev, plane, possible_crtcs, plane 926 drivers/gpu/drm/qxl/qxl_display.c drm_plane_helper_add(plane, helper_funcs); plane 928 drivers/gpu/drm/qxl/qxl_display.c return plane; plane 931 drivers/gpu/drm/qxl/qxl_display.c kfree(plane); plane 321 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static unsigned int plane_zpos(struct rcar_du_plane *plane) plane 323 drivers/gpu/drm/rcar-du/rcar_du_crtc.c return plane->plane.state->normalized_zpos; plane 327 drivers/gpu/drm/rcar-du/rcar_du_crtc.c plane_format(struct rcar_du_plane *plane) plane 329 drivers/gpu/drm/rcar-du/rcar_du_crtc.c return to_rcar_plane_state(plane->plane.state)->format; plane 344 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_plane *plane = &rcrtc->group->planes[i]; plane 347 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (plane->plane.state->crtc != &rcrtc->crtc || plane 348 drivers/gpu/drm/rcar-du/rcar_du_crtc.c !plane->plane.state->visible) plane 353 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (plane_zpos(planes[j-1]) <= plane_zpos(plane)) plane 358 drivers/gpu/drm/rcar-du/rcar_du_crtc.c planes[j] = plane; plane 359 drivers/gpu/drm/rcar-du/rcar_du_crtc.c prio += plane_format(plane)->planes * 4; plane 363 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_plane *plane = planes[i]; plane 364 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_plane_state *state = plane->plane.state; plane 371 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (plane_format(plane)->planes == 2) { plane 826 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_plane *plane = &rcrtc->vsp->planes[i].plane; plane 829 drivers/gpu/drm/rcar-du/rcar_du_crtc.c sprintf(name, "plane%u", plane->base.id); plane 965 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (index == rcrtc->vsp->planes[i].plane.base.id) plane 1186 drivers/gpu/drm/rcar-du/rcar_du_crtc.c primary = &rcrtc->vsp->planes[rcrtc->vsp_pipe].plane; plane 1188 drivers/gpu/drm/rcar-du/rcar_du_crtc.c primary = &rgrp->planes[swindex % 2].plane; plane 95 drivers/gpu/drm/rcar-du/rcar_du_plane.c static int rcar_du_plane_hwalloc(struct rcar_du_plane *plane, plane 105 drivers/gpu/drm/rcar-du/rcar_du_plane.c if (plane->group->index != 0) plane 111 drivers/gpu/drm/rcar-du/rcar_du_plane.c fixed = plane->group->index == 0 ? 1 : 0; plane 146 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct rcar_du_plane *plane; plane 149 drivers/gpu/drm/rcar-du/rcar_du_plane.c plane = to_rcar_plane(drm_plane); plane 154 drivers/gpu/drm/rcar-du/rcar_du_plane.c plane->group->index, plane - plane->group->planes); plane 164 drivers/gpu/drm/rcar-du/rcar_du_plane.c index = plane - plane->group->planes; plane 165 drivers/gpu/drm/rcar-du/rcar_du_plane.c group_freed_planes[plane->group->index] |= 1 << index; plane 177 drivers/gpu/drm/rcar-du/rcar_du_plane.c groups |= 1 << plane->group->index; plane 180 drivers/gpu/drm/rcar-du/rcar_du_plane.c index = plane - plane->group->planes; plane 181 drivers/gpu/drm/rcar-du/rcar_du_plane.c group_freed_planes[plane->group->index] |= 1 << index; plane 207 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct rcar_du_plane *plane = &group->planes[i]; plane 211 drivers/gpu/drm/rcar-du/rcar_du_plane.c s = drm_atomic_get_plane_state(state, &plane->plane); plane 226 drivers/gpu/drm/rcar-du/rcar_du_plane.c __func__, plane->group->index, plane 227 drivers/gpu/drm/rcar-du/rcar_du_plane.c plane - plane->group->planes); plane 236 drivers/gpu/drm/rcar-du/rcar_du_plane.c __func__, plane->group->index, plane 237 drivers/gpu/drm/rcar-du/rcar_du_plane.c plane - plane->group->planes, plane 255 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct rcar_du_plane *plane; plane 260 drivers/gpu/drm/rcar-du/rcar_du_plane.c plane = to_rcar_plane(drm_plane); plane 265 drivers/gpu/drm/rcar-du/rcar_du_plane.c plane->group->index, plane - plane->group->planes); plane 282 drivers/gpu/drm/rcar-du/rcar_du_plane.c ? plane->group->dptsr_planes plane 283 drivers/gpu/drm/rcar-du/rcar_du_plane.c : ~plane->group->dptsr_planes; plane 284 drivers/gpu/drm/rcar-du/rcar_du_plane.c free = group_free_planes[plane->group->index]; plane 286 drivers/gpu/drm/rcar-du/rcar_du_plane.c idx = rcar_du_plane_hwalloc(plane, new_plane_state, plane 289 drivers/gpu/drm/rcar-du/rcar_du_plane.c idx = rcar_du_plane_hwalloc(plane, new_plane_state, plane 302 drivers/gpu/drm/rcar-du/rcar_du_plane.c group_free_planes[plane->group->index] &= plane 306 drivers/gpu/drm/rcar-du/rcar_du_plane.c __func__, plane->group->index, plane 307 drivers/gpu/drm/rcar-du/rcar_du_plane.c group_free_planes[plane->group->index]); plane 565 drivers/gpu/drm/rcar-du/rcar_du_plane.c int __rcar_du_plane_atomic_check(struct drm_plane *plane, plane 569 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct drm_device *dev = plane->dev; plane 609 drivers/gpu/drm/rcar-du/rcar_du_plane.c static int rcar_du_plane_atomic_check(struct drm_plane *plane, plane 614 drivers/gpu/drm/rcar-du/rcar_du_plane.c return __rcar_du_plane_atomic_check(plane, state, &rstate->format); plane 617 drivers/gpu/drm/rcar-du/rcar_du_plane.c static void rcar_du_plane_atomic_update(struct drm_plane *plane, plane 620 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct rcar_du_plane *rplane = to_rcar_plane(plane); plane 624 drivers/gpu/drm/rcar-du/rcar_du_plane.c if (!plane->state->visible) plane 638 drivers/gpu/drm/rcar-du/rcar_du_plane.c new_rstate = to_rcar_plane_state(plane->state); plane 651 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_atomic_duplicate_state(struct drm_plane *plane) plane 656 drivers/gpu/drm/rcar-du/rcar_du_plane.c if (WARN_ON(!plane->state)) plane 659 drivers/gpu/drm/rcar-du/rcar_du_plane.c state = to_rcar_plane_state(plane->state); plane 664 drivers/gpu/drm/rcar-du/rcar_du_plane.c __drm_atomic_helper_plane_duplicate_state(plane, ©->state); plane 669 drivers/gpu/drm/rcar-du/rcar_du_plane.c static void rcar_du_plane_atomic_destroy_state(struct drm_plane *plane, plane 676 drivers/gpu/drm/rcar-du/rcar_du_plane.c static void rcar_du_plane_reset(struct drm_plane *plane) plane 680 drivers/gpu/drm/rcar-du/rcar_du_plane.c if (plane->state) { plane 681 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_atomic_destroy_state(plane, plane->state); plane 682 drivers/gpu/drm/rcar-du/rcar_du_plane.c plane->state = NULL; plane 689 drivers/gpu/drm/rcar-du/rcar_du_plane.c __drm_atomic_helper_plane_reset(plane, &state->state); plane 694 drivers/gpu/drm/rcar-du/rcar_du_plane.c state->state.zpos = plane->type == DRM_PLANE_TYPE_PRIMARY ? 0 : 1; plane 697 drivers/gpu/drm/rcar-du/rcar_du_plane.c static int rcar_du_plane_atomic_set_property(struct drm_plane *plane, plane 703 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev; plane 713 drivers/gpu/drm/rcar-du/rcar_du_plane.c static int rcar_du_plane_atomic_get_property(struct drm_plane *plane, plane 719 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev; plane 772 drivers/gpu/drm/rcar-du/rcar_du_plane.c struct rcar_du_plane *plane = &rgrp->planes[i]; plane 774 drivers/gpu/drm/rcar-du/rcar_du_plane.c plane->group = rgrp; plane 776 drivers/gpu/drm/rcar-du/rcar_du_plane.c ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs, plane 783 drivers/gpu/drm/rcar-du/rcar_du_plane.c drm_plane_helper_add(&plane->plane, plane 786 drivers/gpu/drm/rcar-du/rcar_du_plane.c drm_plane_create_alpha_property(&plane->plane); plane 791 drivers/gpu/drm/rcar-du/rcar_du_plane.c drm_object_attach_property(&plane->plane.base, plane 794 drivers/gpu/drm/rcar-du/rcar_du_plane.c drm_plane_create_zpos_property(&plane->plane, 1, 1, 7); plane 34 drivers/gpu/drm/rcar-du/rcar_du_plane.h struct drm_plane plane; plane 38 drivers/gpu/drm/rcar-du/rcar_du_plane.h static inline struct rcar_du_plane *to_rcar_plane(struct drm_plane *plane) plane 40 drivers/gpu/drm/rcar-du/rcar_du_plane.h return container_of(plane, struct rcar_du_plane, plane); plane 69 drivers/gpu/drm/rcar-du/rcar_du_plane.h int __rcar_du_plane_atomic_check(struct drm_plane *plane, plane 78 drivers/gpu/drm/rcar-du/rcar_du_plane.h static inline void rcar_du_plane_setup(struct rcar_du_plane *plane) plane 81 drivers/gpu/drm/rcar-du/rcar_du_plane.h to_rcar_plane_state(plane->plane.state); plane 83 drivers/gpu/drm/rcar-du/rcar_du_plane.h return __rcar_du_plane_setup(plane->group, state); plane 147 drivers/gpu/drm/rcar-du/rcar_du_vsp.c static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane) plane 150 drivers/gpu/drm/rcar-du/rcar_du_vsp.c to_rcar_vsp_plane_state(plane->plane.state); plane 152 drivers/gpu/drm/rcar-du/rcar_du_vsp.c struct drm_framebuffer *fb = plane->plane.state->fb; plane 179 drivers/gpu/drm/rcar-du/rcar_du_vsp.c vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe, plane 180 drivers/gpu/drm/rcar-du/rcar_du_vsp.c plane->index, &cfg); plane 220 drivers/gpu/drm/rcar-du/rcar_du_vsp.c static int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane, plane 224 drivers/gpu/drm/rcar-du/rcar_du_vsp.c struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp; plane 238 drivers/gpu/drm/rcar-du/rcar_du_vsp.c return drm_gem_fb_prepare_fb(plane, state); plane 254 drivers/gpu/drm/rcar-du/rcar_du_vsp.c static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, plane 258 drivers/gpu/drm/rcar-du/rcar_du_vsp.c struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp; plane 266 drivers/gpu/drm/rcar-du/rcar_du_vsp.c static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane, plane 271 drivers/gpu/drm/rcar-du/rcar_du_vsp.c return __rcar_du_plane_atomic_check(plane, state, &rstate->format); plane 274 drivers/gpu/drm/rcar-du/rcar_du_vsp.c static void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane, plane 277 drivers/gpu/drm/rcar-du/rcar_du_vsp.c struct rcar_du_vsp_plane *rplane = to_rcar_vsp_plane(plane); plane 280 drivers/gpu/drm/rcar-du/rcar_du_vsp.c if (plane->state->visible) plane 295 drivers/gpu/drm/rcar-du/rcar_du_vsp.c rcar_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane) plane 299 drivers/gpu/drm/rcar-du/rcar_du_vsp.c if (WARN_ON(!plane->state)) plane 306 drivers/gpu/drm/rcar-du/rcar_du_vsp.c __drm_atomic_helper_plane_duplicate_state(plane, ©->state); plane 311 drivers/gpu/drm/rcar-du/rcar_du_vsp.c static void rcar_du_vsp_plane_atomic_destroy_state(struct drm_plane *plane, plane 318 drivers/gpu/drm/rcar-du/rcar_du_vsp.c static void rcar_du_vsp_plane_reset(struct drm_plane *plane) plane 322 drivers/gpu/drm/rcar-du/rcar_du_vsp.c if (plane->state) { plane 323 drivers/gpu/drm/rcar-du/rcar_du_vsp.c rcar_du_vsp_plane_atomic_destroy_state(plane, plane->state); plane 324 drivers/gpu/drm/rcar-du/rcar_du_vsp.c plane->state = NULL; plane 331 drivers/gpu/drm/rcar-du/rcar_du_vsp.c __drm_atomic_helper_plane_reset(plane, &state->state); plane 332 drivers/gpu/drm/rcar-du/rcar_du_vsp.c state->state.zpos = plane->type == DRM_PLANE_TYPE_PRIMARY ? 0 : 1; plane 379 drivers/gpu/drm/rcar-du/rcar_du_vsp.c struct rcar_du_vsp_plane *plane = &vsp->planes[i]; plane 381 drivers/gpu/drm/rcar-du/rcar_du_vsp.c plane->vsp = vsp; plane 382 drivers/gpu/drm/rcar-du/rcar_du_vsp.c plane->index = i; plane 384 drivers/gpu/drm/rcar-du/rcar_du_vsp.c ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs, plane 392 drivers/gpu/drm/rcar-du/rcar_du_vsp.c drm_plane_helper_add(&plane->plane, plane 398 drivers/gpu/drm/rcar-du/rcar_du_vsp.c drm_plane_create_alpha_property(&plane->plane); plane 399 drivers/gpu/drm/rcar-du/rcar_du_vsp.c drm_plane_create_zpos_property(&plane->plane, 1, 1, plane 21 drivers/gpu/drm/rcar-du/rcar_du_vsp.h struct drm_plane plane; plane 36 drivers/gpu/drm/rcar-du/rcar_du_vsp.h return container_of(p, struct rcar_du_vsp_plane, plane); plane 707 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_plane_destroy(struct drm_plane *plane) plane 709 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_plane_cleanup(plane); plane 712 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static int vop_plane_atomic_check(struct drm_plane *plane, plane 718 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop_win *vop_win = to_vop_win(plane); plane 763 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_plane_atomic_disable(struct drm_plane *plane, plane 766 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop_win *vop_win = to_vop_win(plane); plane 779 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_plane_atomic_update(struct drm_plane *plane, plane 782 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_plane_state *state = plane->state; plane 784 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop_win *vop_win = to_vop_win(plane); plane 815 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_plane_atomic_disable(plane, old_state); plane 917 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static int vop_plane_atomic_async_check(struct drm_plane *plane, plane 920 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop_win *vop_win = to_vop_win(plane); plane 928 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (plane != state->crtc->cursor) plane 931 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (!plane->state) plane 934 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (!plane->state->fb) plane 941 drivers/gpu/drm/rockchip/rockchip_drm_vop.c crtc_state = plane->crtc->state; plane 943 drivers/gpu/drm/rockchip/rockchip_drm_vop.c return drm_atomic_helper_check_plane_state(plane->state, crtc_state, plane 948 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_plane_atomic_async_update(struct drm_plane *plane, plane 951 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(plane->state->crtc); plane 952 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_framebuffer *old_fb = plane->state->fb; plane 954 drivers/gpu/drm/rockchip/rockchip_drm_vop.c plane->state->crtc_x = new_state->crtc_x; plane 955 drivers/gpu/drm/rockchip/rockchip_drm_vop.c plane->state->crtc_y = new_state->crtc_y; plane 956 drivers/gpu/drm/rockchip/rockchip_drm_vop.c plane->state->crtc_h = new_state->crtc_h; plane 957 drivers/gpu/drm/rockchip/rockchip_drm_vop.c plane->state->crtc_w = new_state->crtc_w; plane 958 drivers/gpu/drm/rockchip/rockchip_drm_vop.c plane->state->src_x = new_state->src_x; plane 959 drivers/gpu/drm/rockchip/rockchip_drm_vop.c plane->state->src_y = new_state->src_y; plane 960 drivers/gpu/drm/rockchip/rockchip_drm_vop.c plane->state->src_h = new_state->src_h; plane 961 drivers/gpu/drm/rockchip/rockchip_drm_vop.c plane->state->src_w = new_state->src_w; plane 962 drivers/gpu/drm/rockchip/rockchip_drm_vop.c swap(plane->state->fb, new_state->fb); plane 965 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_plane_atomic_update(plane, plane->state); plane 978 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (old_fb && plane->state->fb != old_fb) { plane 980 drivers/gpu/drm/rockchip/rockchip_drm_vop.c WARN_ON(drm_crtc_vblank_get(plane->state->crtc) != 0); plane 1231 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_plane *plane; plane 1260 drivers/gpu/drm/rockchip/rockchip_drm_vop.c for_each_oldnew_plane_in_state(old_state, plane, old_plane_state, plane 1490 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_plane_add_properties(struct drm_plane *plane, plane 1498 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0, plane 1507 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_plane *primary = NULL, *cursor = NULL, *plane, *tmp; plane 1537 drivers/gpu/drm/rockchip/rockchip_drm_vop.c plane = &vop_win->base; plane 1538 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_plane_helper_add(plane, &plane_helper_funcs); plane 1539 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_plane_add_properties(plane, win_data); plane 1540 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (plane->type == DRM_PLANE_TYPE_PRIMARY) plane 1541 drivers/gpu/drm/rockchip/rockchip_drm_vop.c primary = plane; plane 1542 drivers/gpu/drm/rockchip/rockchip_drm_vop.c else if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 1543 drivers/gpu/drm/rockchip/rockchip_drm_vop.c cursor = plane; plane 1606 drivers/gpu/drm/rockchip/rockchip_drm_vop.c list_for_each_entry_safe(plane, tmp, &drm_dev->mode_config.plane_list, plane 1608 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_plane_cleanup(plane); plane 1616 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_plane *plane, *tmp; plane 1630 drivers/gpu/drm/rockchip/rockchip_drm_vop.c list_for_each_entry_safe(plane, tmp, &drm_dev->mode_config.plane_list, plane 1632 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_plane_destroy(plane); plane 158 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct drm_plane *plane; plane 239 drivers/gpu/drm/shmobile/shmob_drm_crtc.c drm_for_each_legacy_plane(plane, dev) { plane 240 drivers/gpu/drm/shmobile/shmob_drm_crtc.c if (plane->crtc == crtc) plane 241 drivers/gpu/drm/shmobile/shmob_drm_crtc.c shmob_drm_plane_setup(plane); plane 22 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct drm_plane plane; plane 37 drivers/gpu/drm/shmobile/shmob_drm_plane.c #define to_shmob_plane(p) container_of(p, struct shmob_drm_plane, plane) plane 63 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct shmob_drm_device *sdev = splane->plane.dev->dev_private; plane 159 drivers/gpu/drm/shmobile/shmob_drm_plane.c void shmob_drm_plane_setup(struct drm_plane *plane) plane 161 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct shmob_drm_plane *splane = to_shmob_plane(plane); plane 163 drivers/gpu/drm/shmobile/shmob_drm_plane.c if (plane->fb == NULL) plane 166 drivers/gpu/drm/shmobile/shmob_drm_plane.c __shmob_drm_plane_setup(splane, plane->fb); plane 170 drivers/gpu/drm/shmobile/shmob_drm_plane.c shmob_drm_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, plane 177 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct shmob_drm_plane *splane = to_shmob_plane(plane); plane 178 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct shmob_drm_device *sdev = plane->dev->dev_private; plane 206 drivers/gpu/drm/shmobile/shmob_drm_plane.c static int shmob_drm_plane_disable(struct drm_plane *plane, plane 209 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct shmob_drm_plane *splane = to_shmob_plane(plane); plane 210 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct shmob_drm_device *sdev = plane->dev->dev_private; plane 218 drivers/gpu/drm/shmobile/shmob_drm_plane.c static void shmob_drm_plane_destroy(struct drm_plane *plane) plane 220 drivers/gpu/drm/shmobile/shmob_drm_plane.c drm_plane_force_disable(plane); plane 221 drivers/gpu/drm/shmobile/shmob_drm_plane.c drm_plane_cleanup(plane); plane 254 drivers/gpu/drm/shmobile/shmob_drm_plane.c ret = drm_plane_init(sdev->ddev, &splane->plane, 1, plane 17 drivers/gpu/drm/shmobile/shmob_drm_plane.h void shmob_drm_plane_setup(struct drm_plane *plane); plane 149 drivers/gpu/drm/sti/sti_crtc.c struct sti_plane *plane = to_sti_plane(p); plane 151 drivers/gpu/drm/sti/sti_crtc.c switch (plane->status) { plane 159 drivers/gpu/drm/sti/sti_crtc.c sti_plane_to_str(plane)); plane 161 drivers/gpu/drm/sti/sti_crtc.c if (sti_mixer_set_plane_depth(mixer, plane)) { plane 163 drivers/gpu/drm/sti/sti_crtc.c sti_plane_to_str(plane)); plane 167 drivers/gpu/drm/sti/sti_crtc.c if (sti_mixer_set_plane_status(mixer, plane, true)) { plane 169 drivers/gpu/drm/sti/sti_crtc.c sti_plane_to_str(plane)); plane 174 drivers/gpu/drm/sti/sti_crtc.c if (plane->desc == STI_HQVDP_0) plane 177 drivers/gpu/drm/sti/sti_crtc.c plane->status = STI_PLANE_READY; plane 183 drivers/gpu/drm/sti/sti_crtc.c sti_plane_to_str(plane)); plane 185 drivers/gpu/drm/sti/sti_crtc.c if (sti_mixer_set_plane_status(mixer, plane, false)) { plane 187 drivers/gpu/drm/sti/sti_crtc.c sti_plane_to_str(plane)); plane 191 drivers/gpu/drm/sti/sti_crtc.c if (plane->desc == STI_CURSOR) plane 193 drivers/gpu/drm/sti/sti_crtc.c plane->status = STI_PLANE_DISABLED; plane 196 drivers/gpu/drm/sti/sti_crtc.c plane->status = STI_PLANE_FLUSHING; plane 199 drivers/gpu/drm/sti/sti_crtc.c if (plane->desc == STI_HQVDP_0) plane 270 drivers/gpu/drm/sti/sti_crtc.c struct sti_plane *plane = to_sti_plane(p); plane 272 drivers/gpu/drm/sti/sti_crtc.c if ((plane->desc & STI_PLANE_TYPE_MASK) <= STI_VDP) plane 273 drivers/gpu/drm/sti/sti_crtc.c if (plane->status != STI_PLANE_DISABLED) plane 63 drivers/gpu/drm/sti/sti_cursor.c struct sti_plane plane; plane 77 drivers/gpu/drm/sti/sti_cursor.c #define to_sti_cursor(x) container_of(x, struct sti_cursor, plane) plane 112 drivers/gpu/drm/sti/sti_cursor.c sti_plane_to_str(&cursor->plane), cursor->regs); plane 186 drivers/gpu/drm/sti/sti_cursor.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 187 drivers/gpu/drm/sti/sti_cursor.c struct sti_cursor *cursor = to_sti_cursor(plane); plane 248 drivers/gpu/drm/sti/sti_cursor.c drm_plane->base.id, sti_plane_to_str(plane)); plane 258 drivers/gpu/drm/sti/sti_cursor.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 259 drivers/gpu/drm/sti/sti_cursor.c struct sti_cursor *cursor = to_sti_cursor(plane); plane 303 drivers/gpu/drm/sti/sti_cursor.c sti_plane_update_fps(plane, true, false); plane 305 drivers/gpu/drm/sti/sti_cursor.c plane->status = STI_PLANE_UPDATED; plane 311 drivers/gpu/drm/sti/sti_cursor.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 322 drivers/gpu/drm/sti/sti_cursor.c drm_plane->base.id, sti_plane_to_str(plane)); plane 324 drivers/gpu/drm/sti/sti_cursor.c plane->status = STI_PLANE_DISABLING; plane 342 drivers/gpu/drm/sti/sti_cursor.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 343 drivers/gpu/drm/sti/sti_cursor.c struct sti_cursor *cursor = to_sti_cursor(plane); plane 385 drivers/gpu/drm/sti/sti_cursor.c cursor->plane.desc = desc; plane 386 drivers/gpu/drm/sti/sti_cursor.c cursor->plane.status = STI_PLANE_DISABLED; plane 390 drivers/gpu/drm/sti/sti_cursor.c res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane, plane 401 drivers/gpu/drm/sti/sti_cursor.c drm_plane_helper_add(&cursor->plane.drm_plane, plane 404 drivers/gpu/drm/sti/sti_cursor.c sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR); plane 406 drivers/gpu/drm/sti/sti_cursor.c return &cursor->plane.drm_plane; plane 45 drivers/gpu/drm/sti/sti_drv.c struct sti_plane *plane = to_sti_plane(p); plane 47 drivers/gpu/drm/sti/sti_drv.c *val |= plane->fps_info.output << i; plane 61 drivers/gpu/drm/sti/sti_drv.c struct sti_plane *plane = to_sti_plane(p); plane 63 drivers/gpu/drm/sti/sti_drv.c memset(&plane->fps_info, 0, sizeof(plane->fps_info)); plane 64 drivers/gpu/drm/sti/sti_drv.c plane->fps_info.output = (val >> i) & 1; plane 82 drivers/gpu/drm/sti/sti_drv.c struct sti_plane *plane = to_sti_plane(p); plane 85 drivers/gpu/drm/sti/sti_drv.c plane->fps_info.fps_str, plane 86 drivers/gpu/drm/sti/sti_drv.c plane->fps_info.fips_str); plane 121 drivers/gpu/drm/sti/sti_gdp.c struct sti_plane plane; plane 133 drivers/gpu/drm/sti/sti_gdp.c #define to_sti_gdp(x) container_of(x, struct sti_gdp, plane) plane 217 drivers/gpu/drm/sti/sti_gdp.c struct drm_plane *drm_plane = &gdp->plane.drm_plane; plane 225 drivers/gpu/drm/sti/sti_gdp.c sti_plane_to_str(&gdp->plane), gdp->regs); plane 287 drivers/gpu/drm/sti/sti_gdp.c seq_printf(s, "\n%s[%d].top", sti_plane_to_str(&gdp->plane), b); plane 289 drivers/gpu/drm/sti/sti_gdp.c seq_printf(s, "\n%s[%d].btm", sti_plane_to_str(&gdp->plane), b); plane 322 drivers/gpu/drm/sti/sti_gdp.c switch (gdp->plane.desc) { plane 410 drivers/gpu/drm/sti/sti_gdp.c sti_plane_to_str(&gdp->plane), hw_nvn); plane 442 drivers/gpu/drm/sti/sti_gdp.c hw_nvn, sti_plane_to_str(&gdp->plane)); plane 457 drivers/gpu/drm/sti/sti_gdp.c DRM_DEBUG_DRIVER("%s\n", sti_plane_to_str(&gdp->plane)); plane 471 drivers/gpu/drm/sti/sti_gdp.c gdp->plane.status = STI_PLANE_DISABLED; plane 491 drivers/gpu/drm/sti/sti_gdp.c if (gdp->plane.status == STI_PLANE_FLUSHING) { plane 494 drivers/gpu/drm/sti/sti_gdp.c sti_plane_to_str(&gdp->plane)); plane 559 drivers/gpu/drm/sti/sti_gdp.c switch (gdp->plane.desc) { plane 619 drivers/gpu/drm/sti/sti_gdp.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 620 drivers/gpu/drm/sti/sti_gdp.c struct sti_gdp *gdp = to_sti_gdp(plane); plane 687 drivers/gpu/drm/sti/sti_gdp.c drm_plane->base.id, sti_plane_to_str(plane)); plane 689 drivers/gpu/drm/sti/sti_gdp.c sti_plane_to_str(plane), plane 700 drivers/gpu/drm/sti/sti_gdp.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 701 drivers/gpu/drm/sti/sti_gdp.c struct sti_gdp *gdp = to_sti_gdp(plane); plane 731 drivers/gpu/drm/sti/sti_gdp.c plane->status = STI_PLANE_UPDATED; plane 761 drivers/gpu/drm/sti/sti_gdp.c sti_plane_to_str(plane), top_field, btm_field); plane 831 drivers/gpu/drm/sti/sti_gdp.c sti_plane_to_str(plane)); plane 856 drivers/gpu/drm/sti/sti_gdp.c sti_plane_update_fps(plane, true, false); plane 858 drivers/gpu/drm/sti/sti_gdp.c plane->status = STI_PLANE_UPDATED; plane 864 drivers/gpu/drm/sti/sti_gdp.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 875 drivers/gpu/drm/sti/sti_gdp.c drm_plane->base.id, sti_plane_to_str(plane)); plane 877 drivers/gpu/drm/sti/sti_gdp.c plane->status = STI_PLANE_DISABLING; plane 895 drivers/gpu/drm/sti/sti_gdp.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 896 drivers/gpu/drm/sti/sti_gdp.c struct sti_gdp *gdp = to_sti_gdp(plane); plane 928 drivers/gpu/drm/sti/sti_gdp.c gdp->plane.desc = desc; plane 929 drivers/gpu/drm/sti/sti_gdp.c gdp->plane.status = STI_PLANE_DISABLED; plane 935 drivers/gpu/drm/sti/sti_gdp.c res = drm_universal_plane_init(drm_dev, &gdp->plane.drm_plane, plane 946 drivers/gpu/drm/sti/sti_gdp.c drm_plane_helper_add(&gdp->plane.drm_plane, &sti_gdp_helpers_funcs); plane 948 drivers/gpu/drm/sti/sti_gdp.c sti_plane_init_property(&gdp->plane, type); plane 950 drivers/gpu/drm/sti/sti_gdp.c return &gdp->plane.drm_plane; plane 347 drivers/gpu/drm/sti/sti_hqvdp.c struct sti_plane plane; plane 360 drivers/gpu/drm/sti/sti_hqvdp.c #define to_sti_hqvdp(x) container_of(x, struct sti_hqvdp, plane) plane 571 drivers/gpu/drm/sti/sti_hqvdp.c sti_plane_to_str(&hqvdp->plane), hqvdp->regs); plane 758 drivers/gpu/drm/sti/sti_hqvdp.c DRM_DEBUG_DRIVER("%s\n", sti_plane_to_str(&hqvdp->plane)); plane 780 drivers/gpu/drm/sti/sti_hqvdp.c hqvdp->plane.status = STI_PLANE_DISABLED; plane 806 drivers/gpu/drm/sti/sti_hqvdp.c if (hqvdp->plane.status == STI_PLANE_FLUSHING) { plane 809 drivers/gpu/drm/sti/sti_hqvdp.c sti_plane_to_str(&hqvdp->plane)); plane 843 drivers/gpu/drm/sti/sti_hqvdp.c sti_plane_update_fps(&hqvdp->plane, false, true); plane 1022 drivers/gpu/drm/sti/sti_hqvdp.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 1023 drivers/gpu/drm/sti/sti_hqvdp.c struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane); plane 1100 drivers/gpu/drm/sti/sti_hqvdp.c drm_plane->base.id, sti_plane_to_str(plane)); plane 1102 drivers/gpu/drm/sti/sti_hqvdp.c sti_plane_to_str(plane), plane 1113 drivers/gpu/drm/sti/sti_hqvdp.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 1114 drivers/gpu/drm/sti/sti_hqvdp.c struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane); plane 1139 drivers/gpu/drm/sti/sti_hqvdp.c plane->status = STI_PLANE_UPDATED; plane 1235 drivers/gpu/drm/sti/sti_hqvdp.c sti_plane_update_fps(plane, true, true); plane 1237 drivers/gpu/drm/sti/sti_hqvdp.c plane->status = STI_PLANE_UPDATED; plane 1243 drivers/gpu/drm/sti/sti_hqvdp.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 1254 drivers/gpu/drm/sti/sti_hqvdp.c drm_plane->base.id, sti_plane_to_str(plane)); plane 1256 drivers/gpu/drm/sti/sti_hqvdp.c plane->status = STI_PLANE_DISABLING; plane 1274 drivers/gpu/drm/sti/sti_hqvdp.c struct sti_plane *plane = to_sti_plane(drm_plane); plane 1275 drivers/gpu/drm/sti/sti_hqvdp.c struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane); plane 1296 drivers/gpu/drm/sti/sti_hqvdp.c hqvdp->plane.desc = desc; plane 1297 drivers/gpu/drm/sti/sti_hqvdp.c hqvdp->plane.status = STI_PLANE_DISABLED; plane 1301 drivers/gpu/drm/sti/sti_hqvdp.c res = drm_universal_plane_init(drm_dev, &hqvdp->plane.drm_plane, 1, plane 1311 drivers/gpu/drm/sti/sti_hqvdp.c drm_plane_helper_add(&hqvdp->plane.drm_plane, &sti_hqvdp_helpers_funcs); plane 1313 drivers/gpu/drm/sti/sti_hqvdp.c sti_plane_init_property(&hqvdp->plane, DRM_PLANE_TYPE_OVERLAY); plane 1315 drivers/gpu/drm/sti/sti_hqvdp.c return &hqvdp->plane.drm_plane; plane 1322 drivers/gpu/drm/sti/sti_hqvdp.c struct drm_plane *plane; plane 1329 drivers/gpu/drm/sti/sti_hqvdp.c plane = sti_hqvdp_create(drm_dev, hqvdp->dev, STI_HQVDP_0); plane 1330 drivers/gpu/drm/sti/sti_hqvdp.c if (!plane) plane 237 drivers/gpu/drm/sti/sti_mixer.c int sti_mixer_set_plane_depth(struct sti_mixer *mixer, struct sti_plane *plane) plane 239 drivers/gpu/drm/sti/sti_mixer.c int plane_id, depth = plane->drm_plane.state->normalized_zpos; plane 243 drivers/gpu/drm/sti/sti_mixer.c switch (plane->desc) { plane 263 drivers/gpu/drm/sti/sti_mixer.c DRM_ERROR("Unknown plane %d\n", plane->desc); plane 279 drivers/gpu/drm/sti/sti_mixer.c sti_plane_to_str(plane), depth); plane 314 drivers/gpu/drm/sti/sti_mixer.c static u32 sti_mixer_get_plane_mask(struct sti_plane *plane) plane 316 drivers/gpu/drm/sti/sti_mixer.c switch (plane->desc) { plane 337 drivers/gpu/drm/sti/sti_mixer.c struct sti_plane *plane, bool status) plane 342 drivers/gpu/drm/sti/sti_mixer.c sti_mixer_to_str(mixer), sti_plane_to_str(plane)); plane 344 drivers/gpu/drm/sti/sti_mixer.c mask = sti_mixer_get_plane_mask(plane); plane 54 drivers/gpu/drm/sti/sti_mixer.h struct sti_plane *plane, bool status); plane 55 drivers/gpu/drm/sti/sti_mixer.h int sti_mixer_set_plane_depth(struct sti_mixer *mixer, struct sti_plane *plane); plane 19 drivers/gpu/drm/sti/sti_plane.c const char *sti_plane_to_str(struct sti_plane *plane) plane 21 drivers/gpu/drm/sti/sti_plane.c switch (plane->desc) { plane 41 drivers/gpu/drm/sti/sti_plane.c void sti_plane_update_fps(struct sti_plane *plane, plane 45 drivers/gpu/drm/sti/sti_plane.c struct drm_plane_state *state = plane->drm_plane.state; plane 53 drivers/gpu/drm/sti/sti_plane.c fps = &plane->fps_info; plane 74 drivers/gpu/drm/sti/sti_plane.c snprintf(plane->fps_info.fps_str, FPS_LENGTH, plane 76 drivers/gpu/drm/sti/sti_plane.c plane->drm_plane.name, plane 81 drivers/gpu/drm/sti/sti_plane.c sti_plane_to_str(plane)); plane 89 drivers/gpu/drm/sti/sti_plane.c snprintf(plane->fps_info.fips_str, plane 93 drivers/gpu/drm/sti/sti_plane.c plane->fps_info.fips_str[0] = '\0'; plane 98 drivers/gpu/drm/sti/sti_plane.c plane->fps_info.fps_str, plane 99 drivers/gpu/drm/sti/sti_plane.c plane->fps_info.fips_str); plane 115 drivers/gpu/drm/sti/sti_plane.c void sti_plane_reset(struct drm_plane *plane) plane 117 drivers/gpu/drm/sti/sti_plane.c drm_atomic_helper_plane_reset(plane); plane 118 drivers/gpu/drm/sti/sti_plane.c plane->state->zpos = sti_plane_get_default_zpos(plane->type); plane 137 drivers/gpu/drm/sti/sti_plane.c void sti_plane_init_property(struct sti_plane *plane, plane 140 drivers/gpu/drm/sti/sti_plane.c sti_plane_attach_zorder_property(&plane->drm_plane, type); plane 143 drivers/gpu/drm/sti/sti_plane.c plane->drm_plane.base.id, sti_plane_to_str(plane)); plane 77 drivers/gpu/drm/sti/sti_plane.h const char *sti_plane_to_str(struct sti_plane *plane); plane 78 drivers/gpu/drm/sti/sti_plane.h void sti_plane_update_fps(struct sti_plane *plane, plane 82 drivers/gpu/drm/sti/sti_plane.h void sti_plane_init_property(struct sti_plane *plane, plane 84 drivers/gpu/drm/sti/sti_plane.h void sti_plane_reset(struct drm_plane *plane); plane 273 drivers/gpu/drm/stm/ltdc.c static inline struct ltdc_device *plane_to_ltdc(struct drm_plane *plane) plane 275 drivers/gpu/drm/stm/ltdc.c return (struct ltdc_device *)plane->dev->dev_private; plane 734 drivers/gpu/drm/stm/ltdc.c static int ltdc_plane_atomic_check(struct drm_plane *plane, plane 758 drivers/gpu/drm/stm/ltdc.c static void ltdc_plane_atomic_update(struct drm_plane *plane, plane 761 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = plane_to_ltdc(plane); plane 762 drivers/gpu/drm/stm/ltdc.c struct drm_plane_state *state = plane->state; plane 764 drivers/gpu/drm/stm/ltdc.c u32 lofs = plane->index * LAY_OFS; plane 785 drivers/gpu/drm/stm/ltdc.c plane->base.id, fb->base.id, plane 836 drivers/gpu/drm/stm/ltdc.c plane->type != DRM_PLANE_TYPE_PRIMARY) plane 858 drivers/gpu/drm/stm/ltdc.c ldev->plane_fpsi[plane->index].counter++; plane 872 drivers/gpu/drm/stm/ltdc.c static void ltdc_plane_atomic_disable(struct drm_plane *plane, plane 875 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = plane_to_ltdc(plane); plane 876 drivers/gpu/drm/stm/ltdc.c u32 lofs = plane->index * LAY_OFS; plane 882 drivers/gpu/drm/stm/ltdc.c oldstate->crtc->base.id, plane->base.id); plane 888 drivers/gpu/drm/stm/ltdc.c struct drm_plane *plane = state->plane; plane 889 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = plane_to_ltdc(plane); plane 890 drivers/gpu/drm/stm/ltdc.c struct fps_info *fpsi = &ldev->plane_fpsi[plane->index]; plane 904 drivers/gpu/drm/stm/ltdc.c static bool ltdc_plane_format_mod_supported(struct drm_plane *plane, plane 938 drivers/gpu/drm/stm/ltdc.c struct drm_plane *plane; plane 965 drivers/gpu/drm/stm/ltdc.c plane = devm_kzalloc(dev, sizeof(*plane), GFP_KERNEL); plane 966 drivers/gpu/drm/stm/ltdc.c if (!plane) plane 969 drivers/gpu/drm/stm/ltdc.c ret = drm_universal_plane_init(ddev, plane, possible_crtcs, plane 975 drivers/gpu/drm/stm/ltdc.c drm_plane_helper_add(plane, <dc_plane_helper_funcs); plane 977 drivers/gpu/drm/stm/ltdc.c DRM_DEBUG_DRIVER("plane:%d created\n", plane->base.id); plane 979 drivers/gpu/drm/stm/ltdc.c return plane; plane 984 drivers/gpu/drm/stm/ltdc.c struct drm_plane *plane, *plane_temp; plane 986 drivers/gpu/drm/stm/ltdc.c list_for_each_entry_safe(plane, plane_temp, plane 988 drivers/gpu/drm/stm/ltdc.c drm_plane_cleanup(plane); plane 168 drivers/gpu/drm/sun4i/sun4i_backend.c int layer, struct drm_plane *plane) plane 170 drivers/gpu/drm/sun4i/sun4i_backend.c struct drm_plane_state *state = plane->state; plane 174 drivers/gpu/drm/sun4i/sun4i_backend.c if (plane->type == DRM_PLANE_TYPE_PRIMARY) { plane 200 drivers/gpu/drm/sun4i/sun4i_backend.c int layer, struct drm_plane *plane) plane 202 drivers/gpu/drm/sun4i/sun4i_backend.c struct drm_plane_state *state = plane->state; plane 257 drivers/gpu/drm/sun4i/sun4i_backend.c int layer, struct drm_plane *plane) plane 259 drivers/gpu/drm/sun4i/sun4i_backend.c struct drm_plane_state *state = plane->state; plane 269 drivers/gpu/drm/sun4i/sun4i_backend.c if (plane->state->crtc) plane 270 drivers/gpu/drm/sun4i/sun4i_backend.c interlaced = plane->state->crtc->state->adjusted_mode.flags plane 290 drivers/gpu/drm/sun4i/sun4i_backend.c return sun4i_backend_update_yuv_format(backend, layer, plane); plane 345 drivers/gpu/drm/sun4i/sun4i_backend.c int layer, struct drm_plane *plane) plane 347 drivers/gpu/drm/sun4i/sun4i_backend.c struct drm_plane_state *state = plane->state; plane 383 drivers/gpu/drm/sun4i/sun4i_backend.c struct drm_plane *plane) plane 385 drivers/gpu/drm/sun4i/sun4i_backend.c struct drm_plane_state *state = plane->state; plane 426 drivers/gpu/drm/sun4i/sun4i_backend.c struct sun4i_layer *layer = plane_to_sun4i_layer(state->plane); plane 492 drivers/gpu/drm/sun4i/sun4i_backend.c struct drm_plane *plane; plane 506 drivers/gpu/drm/sun4i/sun4i_backend.c drm_for_each_plane_mask(plane, drm, crtc_state->plane_mask) { plane 508 drivers/gpu/drm/sun4i/sun4i_backend.c drm_atomic_get_plane_state(state, plane); plane 520 drivers/gpu/drm/sun4i/sun4i_backend.c plane->index); plane 199 drivers/gpu/drm/sun4i/sun4i_backend.h int layer, struct drm_plane *plane); plane 201 drivers/gpu/drm/sun4i/sun4i_backend.h int layer, struct drm_plane *plane); plane 203 drivers/gpu/drm/sun4i/sun4i_backend.h int layer, struct drm_plane *plane); plane 207 drivers/gpu/drm/sun4i/sun4i_backend.h int layer, struct drm_plane *plane); plane 210 drivers/gpu/drm/sun4i/sun4i_crtc.c struct drm_plane *plane = planes[i]; plane 212 drivers/gpu/drm/sun4i/sun4i_crtc.c switch (plane->type) { plane 214 drivers/gpu/drm/sun4i/sun4i_crtc.c primary = plane; plane 217 drivers/gpu/drm/sun4i/sun4i_crtc.c cursor = plane; plane 243 drivers/gpu/drm/sun4i/sun4i_crtc.c struct drm_plane *plane = planes[i]; plane 245 drivers/gpu/drm/sun4i/sun4i_crtc.c if (plane->type == DRM_PLANE_TYPE_OVERLAY) plane 246 drivers/gpu/drm/sun4i/sun4i_crtc.c plane->possible_crtcs = possible_crtcs; plane 157 drivers/gpu/drm/sun4i/sun4i_frontend.c struct drm_plane *plane) plane 159 drivers/gpu/drm/sun4i/sun4i_frontend.c struct drm_plane_state *state = plane->state; plane 404 drivers/gpu/drm/sun4i/sun4i_frontend.c struct drm_plane *plane, uint32_t out_fmt) plane 406 drivers/gpu/drm/sun4i/sun4i_frontend.c struct drm_plane_state *state = plane->state; plane 495 drivers/gpu/drm/sun4i/sun4i_frontend.c struct drm_plane *plane) plane 497 drivers/gpu/drm/sun4i/sun4i_frontend.c struct drm_plane_state *state = plane->state; plane 147 drivers/gpu/drm/sun4i/sun4i_frontend.h struct drm_plane *plane); plane 149 drivers/gpu/drm/sun4i/sun4i_frontend.h struct drm_plane *plane); plane 151 drivers/gpu/drm/sun4i/sun4i_frontend.h struct drm_plane *plane, uint32_t out_fmt); plane 18 drivers/gpu/drm/sun4i/sun4i_layer.c static void sun4i_backend_layer_reset(struct drm_plane *plane) plane 20 drivers/gpu/drm/sun4i/sun4i_layer.c struct sun4i_layer *layer = plane_to_sun4i_layer(plane); plane 23 drivers/gpu/drm/sun4i/sun4i_layer.c if (plane->state) { plane 24 drivers/gpu/drm/sun4i/sun4i_layer.c state = state_to_sun4i_layer_state(plane->state); plane 29 drivers/gpu/drm/sun4i/sun4i_layer.c plane->state = NULL; plane 34 drivers/gpu/drm/sun4i/sun4i_layer.c __drm_atomic_helper_plane_reset(plane, &state->state); plane 35 drivers/gpu/drm/sun4i/sun4i_layer.c plane->state->zpos = layer->id; plane 40 drivers/gpu/drm/sun4i/sun4i_layer.c sun4i_backend_layer_duplicate_state(struct drm_plane *plane) plane 42 drivers/gpu/drm/sun4i/sun4i_layer.c struct sun4i_layer_state *orig = state_to_sun4i_layer_state(plane->state); plane 49 drivers/gpu/drm/sun4i/sun4i_layer.c __drm_atomic_helper_plane_duplicate_state(plane, ©->state); plane 55 drivers/gpu/drm/sun4i/sun4i_layer.c static void sun4i_backend_layer_destroy_state(struct drm_plane *plane, plane 65 drivers/gpu/drm/sun4i/sun4i_layer.c static void sun4i_backend_layer_atomic_disable(struct drm_plane *plane, plane 69 drivers/gpu/drm/sun4i/sun4i_layer.c struct sun4i_layer *layer = plane_to_sun4i_layer(plane); plane 83 drivers/gpu/drm/sun4i/sun4i_layer.c static void sun4i_backend_layer_atomic_update(struct drm_plane *plane, plane 86 drivers/gpu/drm/sun4i/sun4i_layer.c struct sun4i_layer_state *layer_state = state_to_sun4i_layer_state(plane->state); plane 87 drivers/gpu/drm/sun4i/sun4i_layer.c struct sun4i_layer *layer = plane_to_sun4i_layer(plane); plane 95 drivers/gpu/drm/sun4i/sun4i_layer.c sun4i_frontend_update_coord(frontend, plane); plane 96 drivers/gpu/drm/sun4i/sun4i_layer.c sun4i_frontend_update_buffer(frontend, plane); plane 97 drivers/gpu/drm/sun4i/sun4i_layer.c sun4i_frontend_update_formats(frontend, plane, plane 103 drivers/gpu/drm/sun4i/sun4i_layer.c sun4i_backend_update_layer_formats(backend, layer->id, plane); plane 104 drivers/gpu/drm/sun4i/sun4i_layer.c sun4i_backend_update_layer_buffer(backend, layer->id, plane); plane 107 drivers/gpu/drm/sun4i/sun4i_layer.c sun4i_backend_update_layer_coord(backend, layer->id, plane); plane 108 drivers/gpu/drm/sun4i/sun4i_layer.c sun4i_backend_update_layer_zpos(backend, layer->id, plane); plane 112 drivers/gpu/drm/sun4i/sun4i_layer.c static bool sun4i_layer_format_mod_supported(struct drm_plane *plane, plane 115 drivers/gpu/drm/sun4i/sun4i_layer.c struct sun4i_layer *layer = plane_to_sun4i_layer(plane); plane 212 drivers/gpu/drm/sun4i/sun4i_layer.c ret = drm_universal_plane_init(drm, &layer->plane, 0, plane 221 drivers/gpu/drm/sun4i/sun4i_layer.c drm_plane_helper_add(&layer->plane, plane 224 drivers/gpu/drm/sun4i/sun4i_layer.c drm_plane_create_alpha_property(&layer->plane); plane 225 drivers/gpu/drm/sun4i/sun4i_layer.c drm_plane_create_zpos_property(&layer->plane, 0, 0, plane 256 drivers/gpu/drm/sun4i/sun4i_layer.c planes[i] = &layer->plane; plane 15 drivers/gpu/drm/sun4i/sun4i_layer.h struct drm_plane plane; plane 28 drivers/gpu/drm/sun4i/sun4i_layer.h plane_to_sun4i_layer(struct drm_plane *plane) plane 30 drivers/gpu/drm/sun4i/sun4i_layer.h return container_of(plane, struct sun4i_layer, plane); plane 371 drivers/gpu/drm/sun4i/sun8i_mixer.c planes[i] = &layer->plane; plane 384 drivers/gpu/drm/sun4i/sun8i_mixer.c planes[mixer->cfg->vi_num + i] = &layer->plane; plane 76 drivers/gpu/drm/sun4i/sun8i_ui_layer.c int overlay, struct drm_plane *plane, plane 79 drivers/gpu/drm/sun4i/sun8i_ui_layer.c struct drm_plane_state *state = plane->state; plane 102 drivers/gpu/drm/sun4i/sun8i_ui_layer.c if (plane->type == DRM_PLANE_TYPE_PRIMARY) { plane 174 drivers/gpu/drm/sun4i/sun8i_ui_layer.c int overlay, struct drm_plane *plane) plane 176 drivers/gpu/drm/sun4i/sun8i_ui_layer.c struct drm_plane_state *state = plane->state; plane 197 drivers/gpu/drm/sun4i/sun8i_ui_layer.c int overlay, struct drm_plane *plane) plane 199 drivers/gpu/drm/sun4i/sun8i_ui_layer.c struct drm_plane_state *state = plane->state; plane 236 drivers/gpu/drm/sun4i/sun8i_ui_layer.c static int sun8i_ui_layer_atomic_check(struct drm_plane *plane, plane 239 drivers/gpu/drm/sun4i/sun8i_ui_layer.c struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); plane 264 drivers/gpu/drm/sun4i/sun8i_ui_layer.c static void sun8i_ui_layer_atomic_disable(struct drm_plane *plane, plane 267 drivers/gpu/drm/sun4i/sun8i_ui_layer.c struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); plane 275 drivers/gpu/drm/sun4i/sun8i_ui_layer.c static void sun8i_ui_layer_atomic_update(struct drm_plane *plane, plane 278 drivers/gpu/drm/sun4i/sun8i_ui_layer.c struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); plane 279 drivers/gpu/drm/sun4i/sun8i_ui_layer.c unsigned int zpos = plane->state->normalized_zpos; plane 283 drivers/gpu/drm/sun4i/sun8i_ui_layer.c if (!plane->state->visible) { plane 290 drivers/gpu/drm/sun4i/sun8i_ui_layer.c layer->overlay, plane, zpos); plane 292 drivers/gpu/drm/sun4i/sun8i_ui_layer.c layer->overlay, plane); plane 294 drivers/gpu/drm/sun4i/sun8i_ui_layer.c layer->overlay, plane); plane 356 drivers/gpu/drm/sun4i/sun8i_ui_layer.c ret = drm_universal_plane_init(drm, &layer->plane, 0, plane 368 drivers/gpu/drm/sun4i/sun8i_ui_layer.c ret = drm_plane_create_zpos_property(&layer->plane, channel, plane 375 drivers/gpu/drm/sun4i/sun8i_ui_layer.c drm_plane_helper_add(&layer->plane, &sun8i_ui_layer_helper_funcs); plane 47 drivers/gpu/drm/sun4i/sun8i_ui_layer.h struct drm_plane plane; plane 54 drivers/gpu/drm/sun4i/sun8i_ui_layer.h plane_to_sun8i_ui_layer(struct drm_plane *plane) plane 56 drivers/gpu/drm/sun4i/sun8i_ui_layer.h return container_of(plane, struct sun8i_ui_layer, plane); plane 69 drivers/gpu/drm/sun4i/sun8i_vi_layer.c int overlay, struct drm_plane *plane, plane 72 drivers/gpu/drm/sun4i/sun8i_vi_layer.c struct drm_plane_state *state = plane->state; plane 144 drivers/gpu/drm/sun4i/sun8i_vi_layer.c mode = &plane->state->crtc->state->mode; plane 214 drivers/gpu/drm/sun4i/sun8i_vi_layer.c int overlay, struct drm_plane *plane) plane 216 drivers/gpu/drm/sun4i/sun8i_vi_layer.c struct drm_plane_state *state = plane->state; plane 263 drivers/gpu/drm/sun4i/sun8i_vi_layer.c int overlay, struct drm_plane *plane) plane 265 drivers/gpu/drm/sun4i/sun8i_vi_layer.c struct drm_plane_state *state = plane->state; plane 321 drivers/gpu/drm/sun4i/sun8i_vi_layer.c static int sun8i_vi_layer_atomic_check(struct drm_plane *plane, plane 324 drivers/gpu/drm/sun4i/sun8i_vi_layer.c struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); plane 349 drivers/gpu/drm/sun4i/sun8i_vi_layer.c static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane, plane 352 drivers/gpu/drm/sun4i/sun8i_vi_layer.c struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); plane 360 drivers/gpu/drm/sun4i/sun8i_vi_layer.c static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, plane 363 drivers/gpu/drm/sun4i/sun8i_vi_layer.c struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); plane 364 drivers/gpu/drm/sun4i/sun8i_vi_layer.c unsigned int zpos = plane->state->normalized_zpos; plane 368 drivers/gpu/drm/sun4i/sun8i_vi_layer.c if (!plane->state->visible) { plane 375 drivers/gpu/drm/sun4i/sun8i_vi_layer.c layer->overlay, plane, zpos); plane 377 drivers/gpu/drm/sun4i/sun8i_vi_layer.c layer->overlay, plane); plane 379 drivers/gpu/drm/sun4i/sun8i_vi_layer.c layer->overlay, plane); plane 506 drivers/gpu/drm/sun4i/sun8i_vi_layer.c ret = drm_universal_plane_init(drm, &layer->plane, 0, plane 517 drivers/gpu/drm/sun4i/sun8i_vi_layer.c ret = drm_plane_create_zpos_property(&layer->plane, index, plane 530 drivers/gpu/drm/sun4i/sun8i_vi_layer.c ret = drm_plane_create_color_properties(&layer->plane, plane 540 drivers/gpu/drm/sun4i/sun8i_vi_layer.c drm_plane_helper_add(&layer->plane, &sun8i_vi_layer_helper_funcs); plane 17 drivers/gpu/drm/sun4i/sun8i_vi_layer.h #define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \ plane 18 drivers/gpu/drm/sun4i/sun8i_vi_layer.h ((base) + 0x30 * (layer) + 0xc + 4 * (plane)) plane 19 drivers/gpu/drm/sun4i/sun8i_vi_layer.h #define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \ plane 20 drivers/gpu/drm/sun4i/sun8i_vi_layer.h ((base) + 0x30 * (layer) + 0x18 + 4 * (plane)) plane 46 drivers/gpu/drm/sun4i/sun8i_vi_layer.h struct drm_plane plane; plane 53 drivers/gpu/drm/sun4i/sun8i_vi_layer.h plane_to_sun8i_vi_layer(struct drm_plane *plane) plane 55 drivers/gpu/drm/sun4i/sun8i_vi_layer.h return container_of(plane, struct sun8i_vi_layer, plane); plane 54 drivers/gpu/drm/tegra/dc.c static inline unsigned int tegra_plane_offset(struct tegra_plane *plane, plane 59 drivers/gpu/drm/tegra/dc.c return plane->offset + offset; plane 64 drivers/gpu/drm/tegra/dc.c return plane->offset + offset; plane 69 drivers/gpu/drm/tegra/dc.c return plane->offset + offset; plane 72 drivers/gpu/drm/tegra/dc.c dev_WARN(plane->dc->dev, "invalid offset: %x\n", offset); plane 74 drivers/gpu/drm/tegra/dc.c return plane->offset + offset; plane 77 drivers/gpu/drm/tegra/dc.c static inline u32 tegra_plane_readl(struct tegra_plane *plane, plane 80 drivers/gpu/drm/tegra/dc.c return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset)); plane 83 drivers/gpu/drm/tegra/dc.c static inline void tegra_plane_writel(struct tegra_plane *plane, u32 value, plane 86 drivers/gpu/drm/tegra/dc.c tegra_dc_writel(plane->dc, value, tegra_plane_offset(plane, offset)); plane 160 drivers/gpu/drm/tegra/dc.c static void tegra_plane_setup_blending_legacy(struct tegra_plane *plane) plane 175 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, blendnokey, DC_WIN_BLEND_NOKEY); plane 176 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, foreground, DC_WIN_BLEND_1WIN); plane 178 drivers/gpu/drm/tegra/dc.c state = to_tegra_plane_state(plane->base.state); plane 255 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, background[0], DC_WIN_BLEND_2WIN_X); plane 256 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, background[1], DC_WIN_BLEND_2WIN_Y); plane 257 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, background[2], DC_WIN_BLEND_3WIN_XY); plane 274 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, blending[0], DC_WIN_BLEND_2WIN_X); plane 275 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, blending[1], DC_WIN_BLEND_2WIN_Y); plane 276 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, background[2], DC_WIN_BLEND_3WIN_XY); plane 280 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, foreground, DC_WIN_BLEND_2WIN_X); plane 281 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, foreground, DC_WIN_BLEND_2WIN_Y); plane 282 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, foreground, DC_WIN_BLEND_3WIN_XY); plane 287 drivers/gpu/drm/tegra/dc.c static void tegra_plane_setup_blending(struct tegra_plane *plane, plane 295 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, value, DC_WIN_BLEND_MATCH_SELECT); plane 300 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, value, DC_WIN_BLEND_NOMATCH_SELECT); plane 303 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, value, DC_WIN_BLEND_LAYER_CONTROL); plane 307 drivers/gpu/drm/tegra/dc.c tegra_plane_use_horizontal_filtering(struct tegra_plane *plane, plane 310 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = plane->dc; plane 315 drivers/gpu/drm/tegra/dc.c if (plane->index == 0 && dc->soc->has_win_a_without_filters) plane 322 drivers/gpu/drm/tegra/dc.c tegra_plane_use_vertical_filtering(struct tegra_plane *plane, plane 325 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = plane->dc; plane 330 drivers/gpu/drm/tegra/dc.c if (plane->index == 0 && dc->soc->has_win_a_without_filters) plane 333 drivers/gpu/drm/tegra/dc.c if (plane->index == 2 && dc->soc->has_win_c_without_vert_filter) plane 339 drivers/gpu/drm/tegra/dc.c static void tegra_dc_setup_window(struct tegra_plane *plane, plane 343 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = plane->dc; plane 357 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, window->format, DC_WIN_COLOR_DEPTH); plane 358 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, window->swap, DC_WIN_BYTE_SWAP); plane 361 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, value, DC_WIN_POSITION); plane 364 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, value, DC_WIN_SIZE); plane 372 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, value, DC_WIN_PRESCALED_SIZE); plane 385 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, value, DC_WIN_DDA_INC); plane 390 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, h_dda, DC_WIN_H_INITIAL_DDA); plane 391 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, v_dda, DC_WIN_V_INITIAL_DDA); plane 393 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0, DC_WIN_UV_BUF_STRIDE); plane 394 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0, DC_WIN_BUF_STRIDE); plane 396 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, window->base[0], DC_WINBUF_START_ADDR); plane 399 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, window->base[1], DC_WINBUF_START_ADDR_U); plane 400 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, window->base[2], DC_WINBUF_START_ADDR_V); plane 402 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, value, DC_WIN_LINE_STRIDE); plane 404 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, window->stride[0], DC_WIN_LINE_STRIDE); plane 410 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, h_offset, DC_WINBUF_ADDR_H_OFFSET); plane 411 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, v_offset, DC_WINBUF_ADDR_V_OFFSET); plane 431 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, value, DC_WINBUF_SURFACE_KIND); plane 452 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, value, DC_WIN_BUFFER_ADDR_MODE); plane 459 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x00f0, DC_WIN_CSC_YOF); plane 460 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x012a, DC_WIN_CSC_KYRGB); plane 461 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x0000, DC_WIN_CSC_KUR); plane 462 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x0198, DC_WIN_CSC_KVR); plane 463 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x039b, DC_WIN_CSC_KUG); plane 464 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x032f, DC_WIN_CSC_KVG); plane 465 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x0204, DC_WIN_CSC_KUB); plane 466 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x0000, DC_WIN_CSC_KVB); plane 476 drivers/gpu/drm/tegra/dc.c if (tegra_plane_use_horizontal_filtering(plane, window)) { plane 481 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x00008000, DC_WIN_H_FILTER_P(0)); plane 482 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x3e087ce1, DC_WIN_H_FILTER_P(1)); plane 483 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x3b117ac1, DC_WIN_H_FILTER_P(2)); plane 484 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x591b73aa, DC_WIN_H_FILTER_P(3)); plane 485 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x57256d9a, DC_WIN_H_FILTER_P(4)); plane 486 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x552f668b, DC_WIN_H_FILTER_P(5)); plane 487 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x73385e8b, DC_WIN_H_FILTER_P(6)); plane 488 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x72435583, DC_WIN_H_FILTER_P(7)); plane 489 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x714c4c8b, DC_WIN_H_FILTER_P(8)); plane 490 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x70554393, DC_WIN_H_FILTER_P(9)); plane 491 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x715e389b, DC_WIN_H_FILTER_P(10)); plane 492 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x71662faa, DC_WIN_H_FILTER_P(11)); plane 493 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x536d25ba, DC_WIN_H_FILTER_P(12)); plane 494 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x55731bca, DC_WIN_H_FILTER_P(13)); plane 495 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x387a11d9, DC_WIN_H_FILTER_P(14)); plane 496 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, 0x3c7c08f1, DC_WIN_H_FILTER_P(15)); plane 501 drivers/gpu/drm/tegra/dc.c if (tegra_plane_use_vertical_filtering(plane, window)) { plane 509 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, k, DC_WIN_V_FILTER_P(i)); plane 514 drivers/gpu/drm/tegra/dc.c tegra_plane_writel(plane, value, DC_WIN_WIN_OPTIONS); plane 517 drivers/gpu/drm/tegra/dc.c tegra_plane_setup_blending_legacy(plane); plane 519 drivers/gpu/drm/tegra/dc.c tegra_plane_setup_blending(plane, window); plane 600 drivers/gpu/drm/tegra/dc.c static int tegra_plane_atomic_check(struct drm_plane *plane, plane 606 drivers/gpu/drm/tegra/dc.c struct tegra_plane *tegra = to_tegra_plane(plane); plane 668 drivers/gpu/drm/tegra/dc.c static void tegra_plane_atomic_disable(struct drm_plane *plane, plane 671 drivers/gpu/drm/tegra/dc.c struct tegra_plane *p = to_tegra_plane(plane); plane 683 drivers/gpu/drm/tegra/dc.c static void tegra_plane_atomic_update(struct drm_plane *plane, plane 686 drivers/gpu/drm/tegra/dc.c struct tegra_plane_state *state = to_tegra_plane_state(plane->state); plane 687 drivers/gpu/drm/tegra/dc.c struct drm_framebuffer *fb = plane->state->fb; plane 688 drivers/gpu/drm/tegra/dc.c struct tegra_plane *p = to_tegra_plane(plane); plane 693 drivers/gpu/drm/tegra/dc.c if (!plane->state->crtc || !plane->state->fb) plane 696 drivers/gpu/drm/tegra/dc.c if (!plane->state->visible) plane 697 drivers/gpu/drm/tegra/dc.c return tegra_plane_atomic_disable(plane, old_state); plane 700 drivers/gpu/drm/tegra/dc.c window.src.x = plane->state->src.x1 >> 16; plane 701 drivers/gpu/drm/tegra/dc.c window.src.y = plane->state->src.y1 >> 16; plane 702 drivers/gpu/drm/tegra/dc.c window.src.w = drm_rect_width(&plane->state->src) >> 16; plane 703 drivers/gpu/drm/tegra/dc.c window.src.h = drm_rect_height(&plane->state->src) >> 16; plane 704 drivers/gpu/drm/tegra/dc.c window.dst.x = plane->state->dst.x1; plane 705 drivers/gpu/drm/tegra/dc.c window.dst.y = plane->state->dst.y1; plane 706 drivers/gpu/drm/tegra/dc.c window.dst.w = drm_rect_width(&plane->state->dst); plane 707 drivers/gpu/drm/tegra/dc.c window.dst.h = drm_rect_height(&plane->state->dst); plane 712 drivers/gpu/drm/tegra/dc.c window.zpos = plane->state->normalized_zpos; plane 762 drivers/gpu/drm/tegra/dc.c struct tegra_plane *plane; plane 768 drivers/gpu/drm/tegra/dc.c plane = kzalloc(sizeof(*plane), GFP_KERNEL); plane 769 drivers/gpu/drm/tegra/dc.c if (!plane) plane 773 drivers/gpu/drm/tegra/dc.c plane->offset = 0xa00; plane 774 drivers/gpu/drm/tegra/dc.c plane->index = 0; plane 775 drivers/gpu/drm/tegra/dc.c plane->dc = dc; plane 781 drivers/gpu/drm/tegra/dc.c err = drm_universal_plane_init(drm, &plane->base, possible_crtcs, plane 785 drivers/gpu/drm/tegra/dc.c kfree(plane); plane 789 drivers/gpu/drm/tegra/dc.c drm_plane_helper_add(&plane->base, &tegra_plane_helper_funcs); plane 790 drivers/gpu/drm/tegra/dc.c drm_plane_create_zpos_property(&plane->base, plane->index, 0, 255); plane 792 drivers/gpu/drm/tegra/dc.c err = drm_plane_create_rotation_property(&plane->base, plane 800 drivers/gpu/drm/tegra/dc.c return &plane->base; plane 807 drivers/gpu/drm/tegra/dc.c static int tegra_cursor_atomic_check(struct drm_plane *plane, plane 810 drivers/gpu/drm/tegra/dc.c struct tegra_plane *tegra = to_tegra_plane(plane); plane 837 drivers/gpu/drm/tegra/dc.c static void tegra_cursor_atomic_update(struct drm_plane *plane, plane 840 drivers/gpu/drm/tegra/dc.c struct tegra_bo *bo = tegra_fb_get_plane(plane->state->fb, 0); plane 841 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = to_tegra_dc(plane->state->crtc); plane 842 drivers/gpu/drm/tegra/dc.c struct drm_plane_state *state = plane->state; plane 846 drivers/gpu/drm/tegra/dc.c if (!plane->state->crtc || !plane->state->fb) plane 899 drivers/gpu/drm/tegra/dc.c static void tegra_cursor_atomic_disable(struct drm_plane *plane, plane 926 drivers/gpu/drm/tegra/dc.c struct tegra_plane *plane; plane 931 drivers/gpu/drm/tegra/dc.c plane = kzalloc(sizeof(*plane), GFP_KERNEL); plane 932 drivers/gpu/drm/tegra/dc.c if (!plane) plane 942 drivers/gpu/drm/tegra/dc.c plane->index = 6; plane 943 drivers/gpu/drm/tegra/dc.c plane->dc = dc; plane 948 drivers/gpu/drm/tegra/dc.c err = drm_universal_plane_init(drm, &plane->base, possible_crtcs, plane 953 drivers/gpu/drm/tegra/dc.c kfree(plane); plane 957 drivers/gpu/drm/tegra/dc.c drm_plane_helper_add(&plane->base, &tegra_cursor_plane_helper_funcs); plane 959 drivers/gpu/drm/tegra/dc.c return &plane->base; plane 1044 drivers/gpu/drm/tegra/dc.c struct tegra_plane *plane; plane 1050 drivers/gpu/drm/tegra/dc.c plane = kzalloc(sizeof(*plane), GFP_KERNEL); plane 1051 drivers/gpu/drm/tegra/dc.c if (!plane) plane 1054 drivers/gpu/drm/tegra/dc.c plane->offset = 0xa00 + 0x200 * index; plane 1055 drivers/gpu/drm/tegra/dc.c plane->index = index; plane 1056 drivers/gpu/drm/tegra/dc.c plane->dc = dc; plane 1066 drivers/gpu/drm/tegra/dc.c err = drm_universal_plane_init(drm, &plane->base, possible_crtcs, plane 1070 drivers/gpu/drm/tegra/dc.c kfree(plane); plane 1074 drivers/gpu/drm/tegra/dc.c drm_plane_helper_add(&plane->base, &tegra_plane_helper_funcs); plane 1075 drivers/gpu/drm/tegra/dc.c drm_plane_create_zpos_property(&plane->base, plane->index, 0, 255); plane 1077 drivers/gpu/drm/tegra/dc.c err = drm_plane_create_rotation_property(&plane->base, plane 1085 drivers/gpu/drm/tegra/dc.c return &plane->base; plane 1091 drivers/gpu/drm/tegra/dc.c struct drm_plane *plane, *primary = NULL; plane 1101 drivers/gpu/drm/tegra/dc.c plane = tegra_shared_plane_create(drm, dc, plane 1104 drivers/gpu/drm/tegra/dc.c if (IS_ERR(plane)) plane 1105 drivers/gpu/drm/tegra/dc.c return plane; plane 1112 drivers/gpu/drm/tegra/dc.c plane->type = DRM_PLANE_TYPE_PRIMARY; plane 1113 drivers/gpu/drm/tegra/dc.c primary = plane; plane 61 drivers/gpu/drm/tegra/hub.c static inline unsigned int tegra_plane_offset(struct tegra_plane *plane, plane 66 drivers/gpu/drm/tegra/hub.c return plane->offset + offset; plane 71 drivers/gpu/drm/tegra/hub.c return plane->offset + offset; plane 76 drivers/gpu/drm/tegra/hub.c return plane->offset + offset; plane 79 drivers/gpu/drm/tegra/hub.c dev_WARN(plane->dc->dev, "invalid offset: %x\n", offset); plane 81 drivers/gpu/drm/tegra/hub.c return plane->offset + offset; plane 84 drivers/gpu/drm/tegra/hub.c static inline u32 tegra_plane_readl(struct tegra_plane *plane, plane 87 drivers/gpu/drm/tegra/hub.c return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset)); plane 90 drivers/gpu/drm/tegra/hub.c static inline void tegra_plane_writel(struct tegra_plane *plane, u32 value, plane 93 drivers/gpu/drm/tegra/hub.c tegra_dc_writel(plane->dc, value, tegra_plane_offset(plane, offset)); plane 165 drivers/gpu/drm/tegra/hub.c static void tegra_shared_plane_update(struct tegra_plane *plane) plane 167 drivers/gpu/drm/tegra/hub.c struct tegra_dc *dc = plane->dc; plane 171 drivers/gpu/drm/tegra/hub.c mask = COMMON_UPDATE | WIN_A_UPDATE << plane->base.index; plane 185 drivers/gpu/drm/tegra/hub.c static void tegra_shared_plane_activate(struct tegra_plane *plane) plane 187 drivers/gpu/drm/tegra/hub.c struct tegra_dc *dc = plane->dc; plane 191 drivers/gpu/drm/tegra/hub.c mask = COMMON_ACTREQ | WIN_A_ACT_REQ << plane->base.index; plane 206 drivers/gpu/drm/tegra/hub.c tegra_shared_plane_get_owner(struct tegra_plane *plane, struct tegra_dc *dc) plane 209 drivers/gpu/drm/tegra/hub.c tegra_plane_offset(plane, DC_WIN_CORE_WINDOWGROUP_SET_CONTROL); plane 215 drivers/gpu/drm/tegra/hub.c struct tegra_plane *plane) plane 219 drivers/gpu/drm/tegra/hub.c if (tegra_shared_plane_get_owner(plane, dc) == dc->pipe) { plane 220 drivers/gpu/drm/tegra/hub.c if (plane->dc == dc) plane 224 drivers/gpu/drm/tegra/hub.c dc->pipe, plane->index); plane 230 drivers/gpu/drm/tegra/hub.c static int tegra_shared_plane_set_owner(struct tegra_plane *plane, plane 234 drivers/gpu/drm/tegra/hub.c tegra_plane_offset(plane, DC_WIN_CORE_WINDOWGROUP_SET_CONTROL); plane 235 drivers/gpu/drm/tegra/hub.c struct tegra_dc *old = plane->dc, *dc = new ? new : old; plane 237 drivers/gpu/drm/tegra/hub.c unsigned int owner, index = plane->index; plane 266 drivers/gpu/drm/tegra/hub.c plane->dc = new; plane 272 drivers/gpu/drm/tegra/hub.c struct tegra_plane *plane) plane 277 drivers/gpu/drm/tegra/hub.c if (!tegra_dc_owns_shared_plane(dc, plane)) { plane 278 drivers/gpu/drm/tegra/hub.c err = tegra_shared_plane_set_owner(plane, dc); plane 283 drivers/gpu/drm/tegra/hub.c value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_LINEBUF_CONFIG); plane 285 drivers/gpu/drm/tegra/hub.c tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_LINEBUF_CONFIG); plane 287 drivers/gpu/drm/tegra/hub.c value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_WGRP_FETCH_METER); plane 289 drivers/gpu/drm/tegra/hub.c tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_FETCH_METER); plane 292 drivers/gpu/drm/tegra/hub.c value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLA); plane 294 drivers/gpu/drm/tegra/hub.c tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLA); plane 296 drivers/gpu/drm/tegra/hub.c value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLB); plane 298 drivers/gpu/drm/tegra/hub.c tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLB); plane 301 drivers/gpu/drm/tegra/hub.c value = tegra_plane_readl(plane, DC_WIN_CORE_PRECOMP_WGRP_PIPE_METER); plane 303 drivers/gpu/drm/tegra/hub.c tegra_plane_writel(plane, value, DC_WIN_CORE_PRECOMP_WGRP_PIPE_METER); plane 306 drivers/gpu/drm/tegra/hub.c value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_WGRP_POOL_CONFIG); plane 308 drivers/gpu/drm/tegra/hub.c tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_POOL_CONFIG); plane 310 drivers/gpu/drm/tegra/hub.c value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_THREAD_GROUP); plane 312 drivers/gpu/drm/tegra/hub.c value |= THREAD_NUM(plane->base.index); plane 314 drivers/gpu/drm/tegra/hub.c tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_THREAD_GROUP); plane 316 drivers/gpu/drm/tegra/hub.c tegra_shared_plane_update(plane); plane 317 drivers/gpu/drm/tegra/hub.c tegra_shared_plane_activate(plane); plane 321 drivers/gpu/drm/tegra/hub.c struct tegra_plane *plane) plane 323 drivers/gpu/drm/tegra/hub.c tegra_shared_plane_set_owner(plane, NULL); plane 326 drivers/gpu/drm/tegra/hub.c static int tegra_shared_plane_atomic_check(struct drm_plane *plane, plane 330 drivers/gpu/drm/tegra/hub.c struct tegra_shared_plane *tegra = to_tegra_shared_plane(plane); plane 376 drivers/gpu/drm/tegra/hub.c static void tegra_shared_plane_atomic_disable(struct drm_plane *plane, plane 379 drivers/gpu/drm/tegra/hub.c struct tegra_plane *p = to_tegra_plane(plane); plane 408 drivers/gpu/drm/tegra/hub.c static void tegra_shared_plane_atomic_update(struct drm_plane *plane, plane 411 drivers/gpu/drm/tegra/hub.c struct tegra_plane_state *state = to_tegra_plane_state(plane->state); plane 412 drivers/gpu/drm/tegra/hub.c struct tegra_dc *dc = to_tegra_dc(plane->state->crtc); plane 413 drivers/gpu/drm/tegra/hub.c unsigned int zpos = plane->state->normalized_zpos; plane 414 drivers/gpu/drm/tegra/hub.c struct drm_framebuffer *fb = plane->state->fb; plane 415 drivers/gpu/drm/tegra/hub.c struct tegra_plane *p = to_tegra_plane(plane); plane 421 drivers/gpu/drm/tegra/hub.c if (!plane->state->crtc || !plane->state->fb) plane 424 drivers/gpu/drm/tegra/hub.c if (!plane->state->visible) { plane 425 drivers/gpu/drm/tegra/hub.c tegra_shared_plane_atomic_disable(plane, old_state); plane 465 drivers/gpu/drm/tegra/hub.c value = V_POSITION(plane->state->crtc_y) | plane 466 drivers/gpu/drm/tegra/hub.c H_POSITION(plane->state->crtc_x); plane 469 drivers/gpu/drm/tegra/hub.c value = V_SIZE(plane->state->crtc_h) | H_SIZE(plane->state->crtc_w); plane 475 drivers/gpu/drm/tegra/hub.c value = V_SIZE(plane->state->crtc_h) | H_SIZE(plane->state->crtc_w); plane 487 drivers/gpu/drm/tegra/hub.c value = OFFSET_X(plane->state->src_y >> 16) | plane 488 drivers/gpu/drm/tegra/hub.c OFFSET_Y(plane->state->src_x >> 16); plane 539 drivers/gpu/drm/tegra/hub.c struct tegra_shared_plane *plane; plane 546 drivers/gpu/drm/tegra/hub.c plane = kzalloc(sizeof(*plane), GFP_KERNEL); plane 547 drivers/gpu/drm/tegra/hub.c if (!plane) plane 550 drivers/gpu/drm/tegra/hub.c plane->base.offset = 0x0a00 + 0x0300 * index; plane 551 drivers/gpu/drm/tegra/hub.c plane->base.index = index; plane 553 drivers/gpu/drm/tegra/hub.c plane->wgrp = &hub->wgrps[wgrp]; plane 554 drivers/gpu/drm/tegra/hub.c plane->wgrp->parent = dc->dev; plane 556 drivers/gpu/drm/tegra/hub.c p = &plane->base.base; plane 566 drivers/gpu/drm/tegra/hub.c kfree(plane); plane 30 drivers/gpu/drm/tegra/hub.h to_tegra_shared_plane(struct drm_plane *plane) plane 32 drivers/gpu/drm/tegra/hub.h return container_of(plane, struct tegra_shared_plane, base.base); plane 14 drivers/gpu/drm/tegra/plane.c static void tegra_plane_destroy(struct drm_plane *plane) plane 16 drivers/gpu/drm/tegra/plane.c struct tegra_plane *p = to_tegra_plane(plane); plane 18 drivers/gpu/drm/tegra/plane.c drm_plane_cleanup(plane); plane 22 drivers/gpu/drm/tegra/plane.c static void tegra_plane_reset(struct drm_plane *plane) plane 24 drivers/gpu/drm/tegra/plane.c struct tegra_plane *p = to_tegra_plane(plane); plane 27 drivers/gpu/drm/tegra/plane.c if (plane->state) plane 28 drivers/gpu/drm/tegra/plane.c __drm_atomic_helper_plane_destroy_state(plane->state); plane 30 drivers/gpu/drm/tegra/plane.c kfree(plane->state); plane 31 drivers/gpu/drm/tegra/plane.c plane->state = NULL; plane 35 drivers/gpu/drm/tegra/plane.c plane->state = &state->base; plane 36 drivers/gpu/drm/tegra/plane.c plane->state->plane = plane; plane 37 drivers/gpu/drm/tegra/plane.c plane->state->zpos = p->index; plane 38 drivers/gpu/drm/tegra/plane.c plane->state->normalized_zpos = p->index; plane 43 drivers/gpu/drm/tegra/plane.c tegra_plane_atomic_duplicate_state(struct drm_plane *plane) plane 45 drivers/gpu/drm/tegra/plane.c struct tegra_plane_state *state = to_tegra_plane_state(plane->state); plane 53 drivers/gpu/drm/tegra/plane.c __drm_atomic_helper_plane_duplicate_state(plane, ©->base); plane 66 drivers/gpu/drm/tegra/plane.c static void tegra_plane_atomic_destroy_state(struct drm_plane *plane, plane 73 drivers/gpu/drm/tegra/plane.c static bool tegra_plane_format_mod_supported(struct drm_plane *plane, plane 98 drivers/gpu/drm/tegra/plane.c int tegra_plane_state_add(struct tegra_plane *plane, plane 118 drivers/gpu/drm/tegra/plane.c tegra->planes |= WIN_A_ACT_REQ << plane->index; plane 340 drivers/gpu/drm/tegra/plane.c struct drm_plane *plane; plane 350 drivers/gpu/drm/tegra/plane.c drm_for_each_plane(plane, tegra->base.dev) { plane 351 drivers/gpu/drm/tegra/plane.c struct tegra_plane *p = to_tegra_plane(plane); plane 358 drivers/gpu/drm/tegra/plane.c plane); plane 366 drivers/gpu/drm/tegra/plane.c static unsigned int tegra_plane_get_overlap_index(struct tegra_plane *plane, plane 371 drivers/gpu/drm/tegra/plane.c WARN_ON(plane == other); plane 374 drivers/gpu/drm/tegra/plane.c if (i == plane->index) plane 390 drivers/gpu/drm/tegra/plane.c struct drm_plane *plane; plane 393 drivers/gpu/drm/tegra/plane.c for_each_new_plane_in_state(state->base.state, plane, new, i) { plane 394 drivers/gpu/drm/tegra/plane.c struct tegra_plane *p = to_tegra_plane(plane); plane 429 drivers/gpu/drm/tegra/plane.c struct drm_plane *plane; plane 445 drivers/gpu/drm/tegra/plane.c drm_for_each_plane(plane, tegra->base.dev) { plane 446 drivers/gpu/drm/tegra/plane.c struct tegra_plane *p = to_tegra_plane(plane); plane 452 drivers/gpu/drm/tegra/plane.c new = drm_atomic_get_new_plane_state(state->base.state, plane); plane 29 drivers/gpu/drm/tegra/plane.h static inline struct tegra_plane *to_tegra_plane(struct drm_plane *plane) plane 31 drivers/gpu/drm/tegra/plane.h return container_of(plane, struct tegra_plane, base); plane 64 drivers/gpu/drm/tegra/plane.h int tegra_plane_state_add(struct tegra_plane *plane, plane 167 drivers/gpu/drm/tilcdc/tilcdc_drv.h int tilcdc_plane_init(struct drm_device *dev, struct drm_plane *plane); plane 23 drivers/gpu/drm/tilcdc/tilcdc_plane.c static int tilcdc_plane_atomic_check(struct drm_plane *plane, plane 27 drivers/gpu/drm/tilcdc/tilcdc_plane.c struct drm_plane_state *old_state = plane->state; plane 37 drivers/gpu/drm/tilcdc/tilcdc_plane.c dev_err(plane->dev->dev, "%s: crtc position must be zero.", plane 50 drivers/gpu/drm/tilcdc/tilcdc_plane.c dev_err(plane->dev->dev, plane 60 drivers/gpu/drm/tilcdc/tilcdc_plane.c dev_err(plane->dev->dev, plane 67 drivers/gpu/drm/tilcdc/tilcdc_plane.c dev_dbg(plane->dev->dev, plane 76 drivers/gpu/drm/tilcdc/tilcdc_plane.c static void tilcdc_plane_atomic_update(struct drm_plane *plane, plane 79 drivers/gpu/drm/tilcdc/tilcdc_plane.c struct drm_plane_state *state = plane->state; plane 98 drivers/gpu/drm/tilcdc/tilcdc_plane.c struct drm_plane *plane) plane 103 drivers/gpu/drm/tilcdc/tilcdc_plane.c ret = drm_plane_init(dev, plane, 1, plane 113 drivers/gpu/drm/tilcdc/tilcdc_plane.c drm_plane_helper_add(plane, &plane_helper_funcs); plane 612 drivers/gpu/drm/tiny/gm12u320.c struct drm_plane_state *state = pipe->plane.state; plane 617 drivers/gpu/drm/tiny/gm12u320.c gm12u320_fb_mark_dirty(pipe->plane.state->fb, &rect); plane 167 drivers/gpu/drm/tiny/ili9225.c struct drm_plane_state *state = pipe->plane.state; plane 858 drivers/gpu/drm/tiny/repaper.c struct drm_plane_state *state = pipe->plane.state; plane 161 drivers/gpu/drm/tiny/st7586.c struct drm_plane_state *state = pipe->plane.state; plane 75 drivers/gpu/drm/tve200/tve200_display.c struct drm_framebuffer *old_fb = pipe->plane.state->fb; plane 125 drivers/gpu/drm/tve200/tve200_display.c struct drm_plane *plane = &pipe->plane; plane 129 drivers/gpu/drm/tve200/tve200_display.c struct drm_framebuffer *fb = plane->state->fb; plane 246 drivers/gpu/drm/tve200/tve200_display.c struct drm_plane *plane = &pipe->plane; plane 247 drivers/gpu/drm/tve200/tve200_display.c struct drm_plane_state *pstate = plane->state; plane 263 drivers/gpu/drm/vboxvideo/vbox_mode.c static int vbox_primary_atomic_check(struct drm_plane *plane, plane 281 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_primary_atomic_update(struct drm_plane *plane, plane 284 drivers/gpu/drm/vboxvideo/vbox_mode.c struct drm_crtc *crtc = plane->state->crtc; plane 285 drivers/gpu/drm/vboxvideo/vbox_mode.c struct drm_framebuffer *fb = plane->state->fb; plane 288 drivers/gpu/drm/vboxvideo/vbox_mode.c plane->state->src_x >> 16, plane 289 drivers/gpu/drm/vboxvideo/vbox_mode.c plane->state->src_y >> 16); plane 292 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_primary_atomic_disable(struct drm_plane *plane, plane 303 drivers/gpu/drm/vboxvideo/vbox_mode.c static int vbox_primary_prepare_fb(struct drm_plane *plane, plane 320 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_primary_cleanup_fb(struct drm_plane *plane, plane 332 drivers/gpu/drm/vboxvideo/vbox_mode.c static int vbox_cursor_atomic_check(struct drm_plane *plane, plane 382 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_cursor_atomic_update(struct drm_plane *plane, plane 386 drivers/gpu/drm/vboxvideo/vbox_mode.c container_of(plane->dev, struct vbox_private, ddev); plane 387 drivers/gpu/drm/vboxvideo/vbox_mode.c struct vbox_crtc *vbox_crtc = to_vbox_crtc(plane->state->crtc); plane 388 drivers/gpu/drm/vboxvideo/vbox_mode.c struct drm_framebuffer *fb = plane->state->fb; plane 391 drivers/gpu/drm/vboxvideo/vbox_mode.c u32 width = plane->state->crtc_w; plane 392 drivers/gpu/drm/vboxvideo/vbox_mode.c u32 height = plane->state->crtc_h; plane 437 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_cursor_atomic_disable(struct drm_plane *plane, plane 441 drivers/gpu/drm/vboxvideo/vbox_mode.c container_of(plane->dev, struct vbox_private, ddev); plane 462 drivers/gpu/drm/vboxvideo/vbox_mode.c static int vbox_cursor_prepare_fb(struct drm_plane *plane, plane 474 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_cursor_cleanup_fb(struct drm_plane *plane, plane 479 drivers/gpu/drm/vboxvideo/vbox_mode.c if (!plane->state->fb) plane 482 drivers/gpu/drm/vboxvideo/vbox_mode.c gbo = drm_gem_vram_of_gem(to_vbox_framebuffer(plane->state->fb)->obj); plane 535 drivers/gpu/drm/vboxvideo/vbox_mode.c struct drm_plane *plane; plane 554 drivers/gpu/drm/vboxvideo/vbox_mode.c plane = kzalloc(sizeof(*plane), GFP_KERNEL); plane 555 drivers/gpu/drm/vboxvideo/vbox_mode.c if (!plane) plane 558 drivers/gpu/drm/vboxvideo/vbox_mode.c err = drm_universal_plane_init(&vbox->ddev, plane, possible_crtcs, plane 564 drivers/gpu/drm/vboxvideo/vbox_mode.c drm_plane_helper_add(plane, helper_funcs); plane 566 drivers/gpu/drm/vboxvideo/vbox_mode.c return plane; plane 569 drivers/gpu/drm/vboxvideo/vbox_mode.c kfree(plane); plane 631 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_plane *plane; plane 645 drivers/gpu/drm/vc4/vc4_crtc.c drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, state) plane 689 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_plane *plane; plane 702 drivers/gpu/drm/vc4/vc4_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { plane 713 drivers/gpu/drm/vc4/vc4_crtc.c vc4_plane_state = to_vc4_plane_state(plane->state); plane 717 drivers/gpu/drm/vc4/vc4_crtc.c dlist_next += vc4_plane_write_dlist(plane, dlist_next); plane 851 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_plane *plane = crtc->primary; plane 853 drivers/gpu/drm/vc4/vc4_crtc.c vc4_plane_async_set_fb(plane, flip_state->fb); plane 899 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_plane *plane = crtc->primary; plane 944 drivers/gpu/drm/vc4/vc4_crtc.c flip_state->old_fb = plane->state->fb; plane 954 drivers/gpu/drm/vc4/vc4_crtc.c drm_atomic_set_fb_for_plane(plane->state, fb); plane 1188 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_plane *plane = plane 1191 drivers/gpu/drm/vc4/vc4_crtc.c if (IS_ERR(plane)) plane 1194 drivers/gpu/drm/vc4/vc4_crtc.c plane->possible_crtcs = drm_crtc_mask(crtc); plane 338 drivers/gpu/drm/vc4/vc4_drv.h to_vc4_plane(struct drm_plane *plane) plane 340 drivers/gpu/drm/vc4/vc4_drv.h return (struct vc4_plane *)plane; plane 842 drivers/gpu/drm/vc4/vc4_drv.h u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist); plane 844 drivers/gpu/drm/vc4/vc4_drv.h void vc4_plane_async_set_fb(struct drm_plane *plane, plane 415 drivers/gpu/drm/vc4/vc4_kms.c struct drm_plane *plane; plane 424 drivers/gpu/drm/vc4/vc4_kms.c for_each_oldnew_plane_in_state(state, plane, old_plane_state, plane 145 drivers/gpu/drm/vc4/vc4_plane.c static struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane) plane 149 drivers/gpu/drm/vc4/vc4_plane.c if (WARN_ON(!plane->state)) plane 152 drivers/gpu/drm/vc4/vc4_plane.c vc4_state = kmemdup(plane->state, sizeof(*vc4_state), GFP_KERNEL); plane 159 drivers/gpu/drm/vc4/vc4_plane.c __drm_atomic_helper_plane_duplicate_state(plane, &vc4_state->base); plane 175 drivers/gpu/drm/vc4/vc4_plane.c static void vc4_plane_destroy_state(struct drm_plane *plane, plane 178 drivers/gpu/drm/vc4/vc4_plane.c struct vc4_dev *vc4 = to_vc4_dev(plane->dev); plane 195 drivers/gpu/drm/vc4/vc4_plane.c static void vc4_plane_reset(struct drm_plane *plane) plane 199 drivers/gpu/drm/vc4/vc4_plane.c WARN_ON(plane->state); plane 205 drivers/gpu/drm/vc4/vc4_plane.c __drm_atomic_helper_plane_reset(plane, &vc4_state->base); plane 231 drivers/gpu/drm/vc4/vc4_plane.c static u32 vc4_get_scl_field(struct drm_plane_state *state, int plane) plane 235 drivers/gpu/drm/vc4/vc4_plane.c switch (vc4_state->x_scaling[plane] << 2 | vc4_state->y_scaling[plane]) { plane 545 drivers/gpu/drm/vc4/vc4_plane.c struct vc4_dev *vc4 = to_vc4_dev(state->plane->dev); plane 583 drivers/gpu/drm/vc4/vc4_plane.c static int vc4_plane_mode_set(struct drm_plane *plane, plane 586 drivers/gpu/drm/vc4/vc4_plane.c struct vc4_dev *vc4 = to_vc4_dev(plane->dev); plane 940 drivers/gpu/drm/vc4/vc4_plane.c static int vc4_plane_atomic_check(struct drm_plane *plane, plane 951 drivers/gpu/drm/vc4/vc4_plane.c ret = vc4_plane_mode_set(plane, state); plane 958 drivers/gpu/drm/vc4/vc4_plane.c static void vc4_plane_atomic_update(struct drm_plane *plane, plane 968 drivers/gpu/drm/vc4/vc4_plane.c u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist) plane 970 drivers/gpu/drm/vc4/vc4_plane.c struct vc4_plane_state *vc4_state = to_vc4_plane_state(plane->state); plane 993 drivers/gpu/drm/vc4/vc4_plane.c void vc4_plane_async_set_fb(struct drm_plane *plane, struct drm_framebuffer *fb) plane 995 drivers/gpu/drm/vc4/vc4_plane.c struct vc4_plane_state *vc4_state = to_vc4_plane_state(plane->state); plane 1002 drivers/gpu/drm/vc4/vc4_plane.c WARN_ON_ONCE(plane->state->crtc_x < 0 || plane->state->crtc_y < 0); plane 1018 drivers/gpu/drm/vc4/vc4_plane.c static void vc4_plane_atomic_async_update(struct drm_plane *plane, plane 1023 drivers/gpu/drm/vc4/vc4_plane.c swap(plane->state->fb, state->fb); plane 1024 drivers/gpu/drm/vc4/vc4_plane.c plane->state->crtc_x = state->crtc_x; plane 1025 drivers/gpu/drm/vc4/vc4_plane.c plane->state->crtc_y = state->crtc_y; plane 1026 drivers/gpu/drm/vc4/vc4_plane.c plane->state->crtc_w = state->crtc_w; plane 1027 drivers/gpu/drm/vc4/vc4_plane.c plane->state->crtc_h = state->crtc_h; plane 1028 drivers/gpu/drm/vc4/vc4_plane.c plane->state->src_x = state->src_x; plane 1029 drivers/gpu/drm/vc4/vc4_plane.c plane->state->src_y = state->src_y; plane 1030 drivers/gpu/drm/vc4/vc4_plane.c plane->state->src_w = state->src_w; plane 1031 drivers/gpu/drm/vc4/vc4_plane.c plane->state->src_h = state->src_h; plane 1032 drivers/gpu/drm/vc4/vc4_plane.c plane->state->src_h = state->src_h; plane 1033 drivers/gpu/drm/vc4/vc4_plane.c plane->state->alpha = state->alpha; plane 1034 drivers/gpu/drm/vc4/vc4_plane.c plane->state->pixel_blend_mode = state->pixel_blend_mode; plane 1035 drivers/gpu/drm/vc4/vc4_plane.c plane->state->rotation = state->rotation; plane 1036 drivers/gpu/drm/vc4/vc4_plane.c plane->state->zpos = state->zpos; plane 1037 drivers/gpu/drm/vc4/vc4_plane.c plane->state->normalized_zpos = state->normalized_zpos; plane 1038 drivers/gpu/drm/vc4/vc4_plane.c plane->state->color_encoding = state->color_encoding; plane 1039 drivers/gpu/drm/vc4/vc4_plane.c plane->state->color_range = state->color_range; plane 1040 drivers/gpu/drm/vc4/vc4_plane.c plane->state->src = state->src; plane 1041 drivers/gpu/drm/vc4/vc4_plane.c plane->state->dst = state->dst; plane 1042 drivers/gpu/drm/vc4/vc4_plane.c plane->state->visible = state->visible; plane 1045 drivers/gpu/drm/vc4/vc4_plane.c vc4_state = to_vc4_plane_state(plane->state); plane 1087 drivers/gpu/drm/vc4/vc4_plane.c static int vc4_plane_atomic_async_check(struct drm_plane *plane, plane 1094 drivers/gpu/drm/vc4/vc4_plane.c ret = vc4_plane_mode_set(plane, state); plane 1098 drivers/gpu/drm/vc4/vc4_plane.c old_vc4_state = to_vc4_plane_state(plane->state); plane 1104 drivers/gpu/drm/vc4/vc4_plane.c vc4_lbm_size(plane->state) != vc4_lbm_size(state)) plane 1125 drivers/gpu/drm/vc4/vc4_plane.c static int vc4_prepare_fb(struct drm_plane *plane, plane 1136 drivers/gpu/drm/vc4/vc4_plane.c drm_gem_fb_prepare_fb(plane, state); plane 1138 drivers/gpu/drm/vc4/vc4_plane.c if (plane->state->fb == state->fb) plane 1148 drivers/gpu/drm/vc4/vc4_plane.c static void vc4_cleanup_fb(struct drm_plane *plane, plane 1153 drivers/gpu/drm/vc4/vc4_plane.c if (plane->state->fb == state->fb || !state->fb) plane 1169 drivers/gpu/drm/vc4/vc4_plane.c static void vc4_plane_destroy(struct drm_plane *plane) plane 1171 drivers/gpu/drm/vc4/vc4_plane.c drm_plane_cleanup(plane); plane 1174 drivers/gpu/drm/vc4/vc4_plane.c static bool vc4_format_mod_supported(struct drm_plane *plane, plane 1231 drivers/gpu/drm/vc4/vc4_plane.c struct drm_plane *plane = NULL; plane 1253 drivers/gpu/drm/vc4/vc4_plane.c plane = &vc4_plane->base; plane 1254 drivers/gpu/drm/vc4/vc4_plane.c ret = drm_universal_plane_init(dev, plane, 0, plane 1259 drivers/gpu/drm/vc4/vc4_plane.c drm_plane_helper_add(plane, &vc4_plane_helper_funcs); plane 1261 drivers/gpu/drm/vc4/vc4_plane.c drm_plane_create_alpha_property(plane); plane 1262 drivers/gpu/drm/vc4/vc4_plane.c drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0, plane 1268 drivers/gpu/drm/vc4/vc4_plane.c return plane; plane 69 drivers/gpu/drm/virtio/virtgpu_plane.c static void virtio_gpu_plane_destroy(struct drm_plane *plane) plane 71 drivers/gpu/drm/virtio/virtgpu_plane.c drm_plane_cleanup(plane); plane 72 drivers/gpu/drm/virtio/virtgpu_plane.c kfree(plane); plane 84 drivers/gpu/drm/virtio/virtgpu_plane.c static int virtio_gpu_plane_atomic_check(struct drm_plane *plane, plane 90 drivers/gpu/drm/virtio/virtgpu_plane.c static void virtio_gpu_primary_plane_update(struct drm_plane *plane, plane 93 drivers/gpu/drm/virtio/virtgpu_plane.c struct drm_device *dev = plane->dev; plane 100 drivers/gpu/drm/virtio/virtgpu_plane.c if (plane->state->crtc) plane 101 drivers/gpu/drm/virtio/virtgpu_plane.c output = drm_crtc_to_virtio_gpu_output(plane->state->crtc); plane 107 drivers/gpu/drm/virtio/virtgpu_plane.c if (plane->state->fb && output->enabled) { plane 108 drivers/gpu/drm/virtio/virtgpu_plane.c vgfb = to_virtio_gpu_framebuffer(plane->state->fb); plane 114 drivers/gpu/drm/virtio/virtgpu_plane.c cpu_to_le32(plane->state->src_w >> 16), plane 115 drivers/gpu/drm/virtio/virtgpu_plane.c cpu_to_le32(plane->state->src_h >> 16), plane 116 drivers/gpu/drm/virtio/virtgpu_plane.c cpu_to_le32(plane->state->src_x >> 16), plane 117 drivers/gpu/drm/virtio/virtgpu_plane.c cpu_to_le32(plane->state->src_y >> 16), NULL); plane 124 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->crtc_w, plane->state->crtc_h, plane 125 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->crtc_x, plane->state->crtc_y, plane 126 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_w >> 16, plane 127 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_h >> 16, plane 128 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_x >> 16, plane 129 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_y >> 16); plane 131 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_w >> 16, plane 132 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_h >> 16, plane 133 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_x >> 16, plane 134 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_y >> 16); plane 137 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_x >> 16, plane 138 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_y >> 16, plane 139 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_w >> 16, plane 140 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_h >> 16); plane 143 drivers/gpu/drm/virtio/virtgpu_plane.c static int virtio_gpu_cursor_prepare_fb(struct drm_plane *plane, plane 146 drivers/gpu/drm/virtio/virtgpu_plane.c struct drm_device *dev = plane->dev; plane 156 drivers/gpu/drm/virtio/virtgpu_plane.c if (bo && bo->dumb && (plane->state->fb != new_state->fb)) { plane 165 drivers/gpu/drm/virtio/virtgpu_plane.c static void virtio_gpu_cursor_cleanup_fb(struct drm_plane *plane, plane 170 drivers/gpu/drm/virtio/virtgpu_plane.c if (!plane->state->fb) plane 173 drivers/gpu/drm/virtio/virtgpu_plane.c vgfb = to_virtio_gpu_framebuffer(plane->state->fb); plane 180 drivers/gpu/drm/virtio/virtgpu_plane.c static void virtio_gpu_cursor_plane_update(struct drm_plane *plane, plane 183 drivers/gpu/drm/virtio/virtgpu_plane.c struct drm_device *dev = plane->dev; plane 191 drivers/gpu/drm/virtio/virtgpu_plane.c if (plane->state->crtc) plane 192 drivers/gpu/drm/virtio/virtgpu_plane.c output = drm_crtc_to_virtio_gpu_output(plane->state->crtc); plane 198 drivers/gpu/drm/virtio/virtgpu_plane.c if (plane->state->fb) { plane 199 drivers/gpu/drm/virtio/virtgpu_plane.c vgfb = to_virtio_gpu_framebuffer(plane->state->fb); plane 206 drivers/gpu/drm/virtio/virtgpu_plane.c if (bo && bo->dumb && (plane->state->fb != old_state->fb)) { plane 210 drivers/gpu/drm/virtio/virtgpu_plane.c cpu_to_le32(plane->state->crtc_w), plane 211 drivers/gpu/drm/virtio/virtgpu_plane.c cpu_to_le32(plane->state->crtc_h), plane 224 drivers/gpu/drm/virtio/virtgpu_plane.c if (plane->state->fb != old_state->fb) { plane 226 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->crtc_x, plane 227 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->crtc_y, plane 228 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->fb ? plane->state->fb->hot_x : 0, plane 229 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->fb ? plane->state->fb->hot_y : 0); plane 233 drivers/gpu/drm/virtio/virtgpu_plane.c if (plane->state->fb) { plane 235 drivers/gpu/drm/virtio/virtgpu_plane.c cpu_to_le32(plane->state->fb->hot_x); plane 237 drivers/gpu/drm/virtio/virtgpu_plane.c cpu_to_le32(plane->state->fb->hot_y); plane 244 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->crtc_x, plane 245 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->crtc_y); plane 249 drivers/gpu/drm/virtio/virtgpu_plane.c output->cursor.pos.x = cpu_to_le32(plane->state->crtc_x); plane 250 drivers/gpu/drm/virtio/virtgpu_plane.c output->cursor.pos.y = cpu_to_le32(plane->state->crtc_y); plane 272 drivers/gpu/drm/virtio/virtgpu_plane.c struct drm_plane *plane; plane 276 drivers/gpu/drm/virtio/virtgpu_plane.c plane = kzalloc(sizeof(*plane), GFP_KERNEL); plane 277 drivers/gpu/drm/virtio/virtgpu_plane.c if (!plane) plane 289 drivers/gpu/drm/virtio/virtgpu_plane.c ret = drm_universal_plane_init(dev, plane, 1 << index, plane 296 drivers/gpu/drm/virtio/virtgpu_plane.c drm_plane_helper_add(plane, funcs); plane 297 drivers/gpu/drm/virtio/virtgpu_plane.c return plane; plane 300 drivers/gpu/drm/virtio/virtgpu_plane.c kfree(plane); plane 167 drivers/gpu/drm/vkms/vkms_crtc.c struct drm_plane *plane; plane 178 drivers/gpu/drm/vkms/vkms_crtc.c drm_for_each_plane_mask(plane, crtc->dev, state->plane_mask) { plane 180 drivers/gpu/drm/vkms/vkms_crtc.c plane); plane 189 drivers/gpu/drm/vkms/vkms_crtc.c vkms_state->active_planes = kcalloc(i, sizeof(plane), GFP_KERNEL); plane 195 drivers/gpu/drm/vkms/vkms_crtc.c drm_for_each_plane_mask(plane, crtc->dev, state->plane_mask) { plane 197 drivers/gpu/drm/vkms/vkms_crtc.c plane); plane 20 drivers/gpu/drm/vkms/vkms_plane.c vkms_plane_duplicate_state(struct drm_plane *plane) plane 38 drivers/gpu/drm/vkms/vkms_plane.c __drm_atomic_helper_plane_duplicate_state(plane, plane 44 drivers/gpu/drm/vkms/vkms_plane.c static void vkms_plane_destroy_state(struct drm_plane *plane, plane 65 drivers/gpu/drm/vkms/vkms_plane.c static void vkms_plane_reset(struct drm_plane *plane) plane 69 drivers/gpu/drm/vkms/vkms_plane.c if (plane->state) plane 70 drivers/gpu/drm/vkms/vkms_plane.c vkms_plane_destroy_state(plane, plane->state); plane 78 drivers/gpu/drm/vkms/vkms_plane.c plane->state = &vkms_state->base; plane 79 drivers/gpu/drm/vkms/vkms_plane.c plane->state->plane = plane; plane 91 drivers/gpu/drm/vkms/vkms_plane.c static void vkms_plane_atomic_update(struct drm_plane *plane, plane 95 drivers/gpu/drm/vkms/vkms_plane.c struct drm_framebuffer *fb = plane->state->fb; plane 98 drivers/gpu/drm/vkms/vkms_plane.c if (!plane->state->crtc || !fb) plane 101 drivers/gpu/drm/vkms/vkms_plane.c vkms_plane_state = to_vkms_plane_state(plane->state); plane 104 drivers/gpu/drm/vkms/vkms_plane.c memcpy(&composer->src, &plane->state->src, sizeof(struct drm_rect)); plane 105 drivers/gpu/drm/vkms/vkms_plane.c memcpy(&composer->dst, &plane->state->dst, sizeof(struct drm_rect)); plane 113 drivers/gpu/drm/vkms/vkms_plane.c static int vkms_plane_atomic_check(struct drm_plane *plane, plane 127 drivers/gpu/drm/vkms/vkms_plane.c if (plane->type == DRM_PLANE_TYPE_CURSOR) plane 144 drivers/gpu/drm/vkms/vkms_plane.c static int vkms_prepare_fb(struct drm_plane *plane, plane 158 drivers/gpu/drm/vkms/vkms_plane.c return drm_gem_fb_prepare_fb(plane, state); plane 161 drivers/gpu/drm/vkms/vkms_plane.c static void vkms_cleanup_fb(struct drm_plane *plane, plane 185 drivers/gpu/drm/vkms/vkms_plane.c struct drm_plane *plane; plane 189 drivers/gpu/drm/vkms/vkms_plane.c plane = kzalloc(sizeof(*plane), GFP_KERNEL); plane 190 drivers/gpu/drm/vkms/vkms_plane.c if (!plane) plane 203 drivers/gpu/drm/vkms/vkms_plane.c ret = drm_universal_plane_init(dev, plane, 1 << index, plane 208 drivers/gpu/drm/vkms/vkms_plane.c kfree(plane); plane 212 drivers/gpu/drm/vkms/vkms_plane.c drm_plane_helper_add(plane, funcs); plane 214 drivers/gpu/drm/vkms/vkms_plane.c return plane; plane 1006 drivers/gpu/drm/vmwgfx/device_include/svga3d_cmd.h float plane[4]; plane 279 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c void vmw_du_cursor_plane_destroy(struct drm_plane *plane) plane 281 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vmw_cursor_update_position(plane->dev->dev_private, false, 0, 0); plane 283 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_plane_cleanup(plane); plane 287 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c void vmw_du_primary_plane_destroy(struct drm_plane *plane) plane 289 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_plane_cleanup(plane); plane 330 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vmw_du_plane_cleanup_fb(struct drm_plane *plane, plane 348 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vmw_du_cursor_plane_prepare_fb(struct drm_plane *plane, plane 376 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vmw_du_cursor_plane_atomic_update(struct drm_plane *plane, plane 379 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc; plane 382 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state); plane 390 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (plane->state->fb) { plane 391 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c hotspot_x += plane->state->fb->hot_x; plane 392 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c hotspot_y += plane->state->fb->hot_y; plane 407 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c plane->state->crtc_w, plane 408 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c plane->state->crtc_h, plane 416 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c du->cursor_x = plane->state->crtc_x + du->set_gui_x; plane 417 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c du->cursor_y = plane->state->crtc_y + du->set_gui_y; plane 443 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c int vmw_du_primary_plane_atomic_check(struct drm_plane *plane, plane 482 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c int vmw_du_cursor_plane_atomic_check(struct drm_plane *plane, plane 663 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vmw_du_plane_duplicate_state(struct drm_plane *plane) plane 668 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vps = kmemdup(plane->state, sizeof(*vps), GFP_KERNEL); plane 685 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c __drm_atomic_helper_plane_duplicate_state(plane, state); plane 698 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c void vmw_du_plane_reset(struct drm_plane *plane) plane 703 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (plane->state) plane 704 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vmw_du_plane_destroy_state(plane, plane->state); plane 713 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c __drm_atomic_helper_plane_reset(plane, &vps->base); plane 726 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vmw_du_plane_destroy_state(struct drm_plane *plane, plane 739 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_atomic_helper_plane_destroy_state(plane, state); plane 2460 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_plane *plane = crtc->primary; plane 2462 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (plane->state->fb == &framebuffer->base) plane 2796 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_plane_state *state = update->plane->state; plane 121 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h struct drm_plane *plane; plane 454 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_primary_plane_destroy(struct drm_plane *plane); plane 455 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_cursor_plane_destroy(struct drm_plane *plane); plane 458 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h int vmw_du_primary_plane_atomic_check(struct drm_plane *plane, plane 460 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h int vmw_du_cursor_plane_atomic_check(struct drm_plane *plane, plane 462 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_cursor_plane_atomic_update(struct drm_plane *plane, plane 464 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h int vmw_du_cursor_plane_prepare_fb(struct drm_plane *plane, plane 466 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_plane_cleanup_fb(struct drm_plane *plane, plane 468 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_plane_reset(struct drm_plane *plane); plane 469 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h struct drm_plane_state *vmw_du_plane_duplicate_state(struct drm_plane *plane); plane 470 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_plane_destroy_state(struct drm_plane *plane, plane 283 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c vmw_ldu_primary_plane_atomic_update(struct drm_plane *plane, plane 290 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc; plane 294 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c dev_priv = vmw_priv(plane->dev); plane 295 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c fb = plane->state->fb; plane 378 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c vmw_sou_primary_plane_cleanup_fb(struct drm_plane *plane, plane 382 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_crtc *crtc = plane->state->crtc ? plane 383 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c plane->state->crtc : old_state->crtc; plane 390 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c vmw_du_plane_cleanup_fb(plane, old_state); plane 405 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane, plane 409 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_crtc *crtc = plane->state->crtc ?: new_state->crtc; plane 538 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_plane *plane, plane 546 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c bo_update.base.plane = plane; plane 549 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c bo_update.base.du = vmw_crtc_to_du(plane->state->crtc); plane 639 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_plane_state *state = update->plane->state; plane 699 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_plane *plane, plane 707 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c srf_update.base.plane = plane; plane 710 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c srf_update.base.du = vmw_crtc_to_du(plane->state->crtc); plane 727 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c vmw_sou_primary_plane_atomic_update(struct drm_plane *plane, plane 730 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_crtc *crtc = plane->state->crtc; plane 736 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c if (crtc && plane->state->fb) { plane 739 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c vmw_framebuffer_to_vfb(plane->state->fb); plane 742 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c ret = vmw_sou_plane_update_bo(dev_priv, plane, plane 745 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c ret = vmw_sou_plane_update_surface(dev_priv, plane, plane 1003 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane, plane 1011 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c vmw_du_plane_cleanup_fb(plane, old_state); plane 1032 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, plane 1035 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c struct vmw_private *dev_priv = vmw_priv(plane->dev); plane 1363 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c struct drm_plane *plane, plane 1371 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c bo_update.base.plane = plane; plane 1374 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c bo_update.base.du = vmw_crtc_to_du(plane->state->crtc); plane 1438 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c struct drm_plane_state *state = update->plane->state; plane 1538 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c struct drm_plane *plane, plane 1547 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c stdu = vmw_crtc_to_stdu(plane->state->crtc); plane 1551 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c srf_update.plane = plane; plane 1554 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c srf_update.du = vmw_crtc_to_du(plane->state->crtc); plane 1589 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane, plane 1592 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state); plane 1593 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c struct drm_crtc *crtc = plane->state->crtc; plane 1601 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c if (crtc && plane->state->fb) { plane 1603 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c vmw_framebuffer_to_vfb(plane->state->fb); plane 1616 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c ret = vmw_stdu_plane_update_bo(dev_priv, plane, plane 1619 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c ret = vmw_stdu_plane_update_surface(dev_priv, plane, plane 188 drivers/gpu/drm/xen/xen_drm_front_kms.c &pipe->plane); plane 48 drivers/gpu/drm/zte/zx_plane.c static int zx_vl_plane_atomic_check(struct drm_plane *plane, plane 181 drivers/gpu/drm/zte/zx_plane.c static void zx_vl_plane_atomic_update(struct drm_plane *plane, plane 184 drivers/gpu/drm/zte/zx_plane.c struct zx_plane *zplane = to_zx_plane(plane); plane 185 drivers/gpu/drm/zte/zx_plane.c struct drm_plane_state *state = plane->state; plane 254 drivers/gpu/drm/zte/zx_plane.c zx_vou_layer_enable(plane); plane 259 drivers/gpu/drm/zte/zx_plane.c static void zx_plane_atomic_disable(struct drm_plane *plane, plane 262 drivers/gpu/drm/zte/zx_plane.c struct zx_plane *zplane = to_zx_plane(plane); plane 265 drivers/gpu/drm/zte/zx_plane.c zx_vou_layer_disable(plane, old_state); plane 277 drivers/gpu/drm/zte/zx_plane.c static int zx_gl_plane_atomic_check(struct drm_plane *plane, plane 349 drivers/gpu/drm/zte/zx_plane.c static void zx_gl_plane_atomic_update(struct drm_plane *plane, plane 352 drivers/gpu/drm/zte/zx_plane.c struct zx_plane *zplane = to_zx_plane(plane); plane 353 drivers/gpu/drm/zte/zx_plane.c struct drm_framebuffer *fb = plane->state->fb; plane 372 drivers/gpu/drm/zte/zx_plane.c src_x = plane->state->src_x >> 16; plane 373 drivers/gpu/drm/zte/zx_plane.c src_y = plane->state->src_y >> 16; plane 374 drivers/gpu/drm/zte/zx_plane.c src_w = plane->state->src_w >> 16; plane 375 drivers/gpu/drm/zte/zx_plane.c src_h = plane->state->src_h >> 16; plane 377 drivers/gpu/drm/zte/zx_plane.c dst_x = plane->state->crtc_x; plane 378 drivers/gpu/drm/zte/zx_plane.c dst_y = plane->state->crtc_y; plane 379 drivers/gpu/drm/zte/zx_plane.c dst_w = plane->state->crtc_w; plane 380 drivers/gpu/drm/zte/zx_plane.c dst_h = plane->state->crtc_h; plane 430 drivers/gpu/drm/zte/zx_plane.c zx_vou_layer_enable(plane); plane 441 drivers/gpu/drm/zte/zx_plane.c static void zx_plane_destroy(struct drm_plane *plane) plane 443 drivers/gpu/drm/zte/zx_plane.c drm_plane_cleanup(plane); plane 455 drivers/gpu/drm/zte/zx_plane.c void zx_plane_set_update(struct drm_plane *plane) plane 457 drivers/gpu/drm/zte/zx_plane.c struct zx_plane *zplane = to_zx_plane(plane); plane 460 drivers/gpu/drm/zte/zx_plane.c if (!plane->state->crtc) plane 463 drivers/gpu/drm/zte/zx_plane.c switch (plane->type) { plane 473 drivers/gpu/drm/zte/zx_plane.c WARN_ONCE(1, "unsupported plane type %d\n", plane->type); plane 499 drivers/gpu/drm/zte/zx_plane.c struct drm_plane *plane = &zplane->plane; plane 522 drivers/gpu/drm/zte/zx_plane.c ret = drm_universal_plane_init(drm, plane, VOU_CRTC_MASK, plane 530 drivers/gpu/drm/zte/zx_plane.c drm_plane_helper_add(plane, helper); plane 11 drivers/gpu/drm/zte/zx_plane.h struct drm_plane plane; plane 20 drivers/gpu/drm/zte/zx_plane.h #define to_zx_plane(plane) container_of(plane, struct zx_plane, plane) plane 24 drivers/gpu/drm/zte/zx_plane.h void zx_plane_set_update(struct drm_plane *plane); plane 590 drivers/gpu/drm/zte/zx_vou.c zcrtc->primary = &zplane->plane; plane 609 drivers/gpu/drm/zte/zx_vou.c void zx_vou_layer_enable(struct drm_plane *plane) plane 611 drivers/gpu/drm/zte/zx_vou.c struct zx_crtc *zcrtc = to_zx_crtc(plane->state->crtc); plane 613 drivers/gpu/drm/zte/zx_vou.c struct zx_plane *zplane = to_zx_plane(plane); plane 629 drivers/gpu/drm/zte/zx_vou.c void zx_vou_layer_disable(struct drm_plane *plane, plane 634 drivers/gpu/drm/zte/zx_vou.c struct zx_plane *zplane = to_zx_plane(plane); plane 674 drivers/gpu/drm/zte/zx_vou.c struct drm_plane *plane; plane 678 drivers/gpu/drm/zte/zx_vou.c drm_for_each_plane_mask(plane, crtc->dev, crtc->state->plane_mask) plane 679 drivers/gpu/drm/zte/zx_vou.c zx_plane_set_update(plane); plane 60 drivers/gpu/drm/zte/zx_vou.h void zx_vou_layer_enable(struct drm_plane *plane); plane 61 drivers/gpu/drm/zte/zx_vou.h void zx_vou_layer_disable(struct drm_plane *plane, plane 115 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned plane; plane 119 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c for (plane = 0; plane < TPG_MAX_PLANES; plane++) { plane 120 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned pixelsz = plane ? 2 : 4; plane 122 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->lines[pat][plane] = plane 124 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (!tpg->lines[pat][plane]) plane 126 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (plane == 0) plane 128 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->downsampled_lines[pat][plane] = plane 130 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (!tpg->downsampled_lines[pat][plane]) plane 134 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c for (plane = 0; plane < TPG_MAX_PLANES; plane++) { plane 135 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned pixelsz = plane ? 2 : 4; plane 137 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->contrast_line[plane] = plane 139 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (!tpg->contrast_line[plane]) plane 141 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->black_line[plane] = plane 143 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (!tpg->black_line[plane]) plane 145 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->random_line[plane] = plane 147 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (!tpg->random_line[plane]) plane 157 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned plane; plane 160 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c for (plane = 0; plane < TPG_MAX_PLANES; plane++) { plane 161 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c vfree(tpg->lines[pat][plane]); plane 162 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->lines[pat][plane] = NULL; plane 163 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (plane == 0) plane 165 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c vfree(tpg->downsampled_lines[pat][plane]); plane 166 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->downsampled_lines[pat][plane] = NULL; plane 168 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c for (plane = 0; plane < TPG_MAX_PLANES; plane++) { plane 169 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c vfree(tpg->contrast_line[plane]); plane 170 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c vfree(tpg->black_line[plane]); plane 171 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c vfree(tpg->random_line[plane]); plane 172 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->contrast_line[plane] = NULL; plane 173 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->black_line[plane] = NULL; plane 174 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->random_line[plane] = NULL; plane 200 drivers/media/common/videobuf2/videobuf2-core.c int plane; plane 207 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 209 drivers/media/common/videobuf2/videobuf2-core.c unsigned long size = PAGE_ALIGN(vb->planes[plane].length); plane 212 drivers/media/common/videobuf2/videobuf2-core.c if (size < vb->planes[plane].length) plane 216 drivers/media/common/videobuf2/videobuf2-core.c q->alloc_devs[plane] ? : q->dev, plane 225 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].mem_priv = mem_priv; plane 231 drivers/media/common/videobuf2/videobuf2-core.c for (; plane > 0; --plane) { plane 232 drivers/media/common/videobuf2/videobuf2-core.c call_void_memop(vb, put, vb->planes[plane - 1].mem_priv); plane 233 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane - 1].mem_priv = NULL; plane 244 drivers/media/common/videobuf2/videobuf2-core.c unsigned int plane; plane 246 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 247 drivers/media/common/videobuf2/videobuf2-core.c call_void_memop(vb, put, vb->planes[plane].mem_priv); plane 248 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].mem_priv = NULL; plane 249 drivers/media/common/videobuf2/videobuf2-core.c dprintk(3, "freed plane %d of buffer %d\n", plane, vb->index); plane 259 drivers/media/common/videobuf2/videobuf2-core.c unsigned int plane; plane 261 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 262 drivers/media/common/videobuf2/videobuf2-core.c if (vb->planes[plane].mem_priv) plane 263 drivers/media/common/videobuf2/videobuf2-core.c call_void_memop(vb, put_userptr, vb->planes[plane].mem_priv); plane 264 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].mem_priv = NULL; plane 293 drivers/media/common/videobuf2/videobuf2-core.c unsigned int plane; plane 295 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) plane 296 drivers/media/common/videobuf2/videobuf2-core.c __vb2_plane_dmabuf_put(vb, &vb->planes[plane]); plane 306 drivers/media/common/videobuf2/videobuf2-core.c unsigned int plane; plane 316 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 317 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].m.offset = off; plane 320 drivers/media/common/videobuf2/videobuf2-core.c vb->index, plane, off); plane 322 drivers/media/common/videobuf2/videobuf2-core.c off += vb->planes[plane].length; plane 338 drivers/media/common/videobuf2/videobuf2-core.c unsigned int buffer, plane; plane 360 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < num_planes; ++plane) { plane 361 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].length = plane_sizes[plane]; plane 362 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].min_length = plane_sizes[plane]; plane 545 drivers/media/common/videobuf2/videobuf2-core.c unsigned int plane; plane 546 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 547 drivers/media/common/videobuf2/videobuf2-core.c void *mem_priv = vb->planes[plane].mem_priv; plane 925 drivers/media/common/videobuf2/videobuf2-core.c unsigned int plane; plane 947 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) plane 948 drivers/media/common/videobuf2/videobuf2-core.c call_void_memop(vb, finish, vb->planes[plane].mem_priv); plane 1014 drivers/media/common/videobuf2/videobuf2-core.c unsigned int plane; plane 1025 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 1027 drivers/media/common/videobuf2/videobuf2-core.c if (vb->planes[plane].m.userptr && plane 1028 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].m.userptr == planes[plane].m.userptr plane 1029 drivers/media/common/videobuf2/videobuf2-core.c && vb->planes[plane].length == planes[plane].length) plane 1033 drivers/media/common/videobuf2/videobuf2-core.c plane); plane 1036 drivers/media/common/videobuf2/videobuf2-core.c if (planes[plane].length < vb->planes[plane].min_length) { plane 1038 drivers/media/common/videobuf2/videobuf2-core.c planes[plane].length, plane 1039 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].min_length, plane 1040 drivers/media/common/videobuf2/videobuf2-core.c plane); plane 1046 drivers/media/common/videobuf2/videobuf2-core.c if (vb->planes[plane].mem_priv) { plane 1052 drivers/media/common/videobuf2/videobuf2-core.c call_void_memop(vb, put_userptr, vb->planes[plane].mem_priv); plane 1055 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].mem_priv = NULL; plane 1056 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].bytesused = 0; plane 1057 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].length = 0; plane 1058 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].m.userptr = 0; plane 1059 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].data_offset = 0; plane 1063 drivers/media/common/videobuf2/videobuf2-core.c q->alloc_devs[plane] ? : q->dev, plane 1064 drivers/media/common/videobuf2/videobuf2-core.c planes[plane].m.userptr, plane 1065 drivers/media/common/videobuf2/videobuf2-core.c planes[plane].length, q->dma_dir); plane 1068 drivers/media/common/videobuf2/videobuf2-core.c plane); plane 1072 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].mem_priv = mem_priv; plane 1079 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 1080 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].bytesused = planes[plane].bytesused; plane 1081 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].length = planes[plane].length; plane 1082 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].m.userptr = planes[plane].m.userptr; plane 1083 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].data_offset = planes[plane].data_offset; plane 1109 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 1110 drivers/media/common/videobuf2/videobuf2-core.c if (vb->planes[plane].mem_priv) plane 1112 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].mem_priv); plane 1113 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].mem_priv = NULL; plane 1114 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].m.userptr = 0; plane 1115 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].length = 0; plane 1129 drivers/media/common/videobuf2/videobuf2-core.c unsigned int plane; plane 1140 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 1141 drivers/media/common/videobuf2/videobuf2-core.c struct dma_buf *dbuf = dma_buf_get(planes[plane].m.fd); plane 1145 drivers/media/common/videobuf2/videobuf2-core.c plane); plane 1151 drivers/media/common/videobuf2/videobuf2-core.c if (planes[plane].length == 0) plane 1152 drivers/media/common/videobuf2/videobuf2-core.c planes[plane].length = dbuf->size; plane 1154 drivers/media/common/videobuf2/videobuf2-core.c if (planes[plane].length < vb->planes[plane].min_length) { plane 1156 drivers/media/common/videobuf2/videobuf2-core.c planes[plane].length, plane, plane 1157 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].min_length); plane 1164 drivers/media/common/videobuf2/videobuf2-core.c if (dbuf == vb->planes[plane].dbuf && plane 1165 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].length == planes[plane].length) { plane 1170 drivers/media/common/videobuf2/videobuf2-core.c dprintk(3, "buffer for plane %d changed\n", plane); plane 1179 drivers/media/common/videobuf2/videobuf2-core.c __vb2_plane_dmabuf_put(vb, &vb->planes[plane]); plane 1180 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].bytesused = 0; plane 1181 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].length = 0; plane 1182 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].m.fd = 0; plane 1183 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].data_offset = 0; plane 1187 drivers/media/common/videobuf2/videobuf2-core.c q->alloc_devs[plane] ? : q->dev, plane 1188 drivers/media/common/videobuf2/videobuf2-core.c dbuf, planes[plane].length, q->dma_dir); plane 1196 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].dbuf = dbuf; plane 1197 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].mem_priv = mem_priv; plane 1205 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 1206 drivers/media/common/videobuf2/videobuf2-core.c if (vb->planes[plane].dbuf_mapped) plane 1209 drivers/media/common/videobuf2/videobuf2-core.c ret = call_memop(vb, map_dmabuf, vb->planes[plane].mem_priv); plane 1212 drivers/media/common/videobuf2/videobuf2-core.c plane); plane 1215 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].dbuf_mapped = 1; plane 1222 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 1223 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].bytesused = planes[plane].bytesused; plane 1224 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].length = planes[plane].length; plane 1225 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].m.fd = planes[plane].m.fd; plane 1226 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].data_offset = planes[plane].data_offset; plane 1275 drivers/media/common/videobuf2/videobuf2-core.c unsigned int plane; plane 1320 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) plane 1321 drivers/media/common/videobuf2/videobuf2-core.c call_void_memop(vb, prepare, vb->planes[plane].mem_priv); plane 1944 drivers/media/common/videobuf2/videobuf2-core.c unsigned int plane; plane 1946 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) plane 1948 drivers/media/common/videobuf2/videobuf2-core.c vb->planes[plane].mem_priv); plane 2054 drivers/media/common/videobuf2/videobuf2-core.c unsigned int buffer, plane; plane 2064 drivers/media/common/videobuf2/videobuf2-core.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 2065 drivers/media/common/videobuf2/videobuf2-core.c if (vb->planes[plane].m.offset == off) { plane 2067 drivers/media/common/videobuf2/videobuf2-core.c *_plane = plane; plane 2077 drivers/media/common/videobuf2/videobuf2-core.c unsigned int index, unsigned int plane, unsigned int flags) plane 2111 drivers/media/common/videobuf2/videobuf2-core.c if (plane >= vb->num_planes) { plane 2121 drivers/media/common/videobuf2/videobuf2-core.c vb_plane = &vb->planes[plane]; plane 2127 drivers/media/common/videobuf2/videobuf2-core.c index, plane); plane 2134 drivers/media/common/videobuf2/videobuf2-core.c index, plane, ret); plane 2140 drivers/media/common/videobuf2/videobuf2-core.c index, plane, ret); plane 2151 drivers/media/common/videobuf2/videobuf2-core.c unsigned int buffer = 0, plane = 0; plane 2190 drivers/media/common/videobuf2/videobuf2-core.c ret = __find_plane_by_offset(q, off, &buffer, &plane); plane 2201 drivers/media/common/videobuf2/videobuf2-core.c length = PAGE_ALIGN(vb->planes[plane].length); plane 2216 drivers/media/common/videobuf2/videobuf2-core.c ret = call_memop(vb, mmap, vb->planes[plane].mem_priv, vma); plane 2223 drivers/media/common/videobuf2/videobuf2-core.c dprintk(3, "buffer %d, plane %d successfully mapped\n", buffer, plane); plane 2237 drivers/media/common/videobuf2/videobuf2-core.c unsigned int buffer, plane; plane 2249 drivers/media/common/videobuf2/videobuf2-core.c ret = __find_plane_by_offset(q, off, &buffer, &plane); plane 2255 drivers/media/common/videobuf2/videobuf2-core.c vaddr = vb2_plane_vaddr(vb, plane); plane 92 drivers/media/common/videobuf2/videobuf2-v4l2.c unsigned int plane; plane 98 drivers/media/common/videobuf2/videobuf2-v4l2.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 101 drivers/media/common/videobuf2/videobuf2-v4l2.c ? b->m.planes[plane].length plane 102 drivers/media/common/videobuf2/videobuf2-v4l2.c : vb->planes[plane].length; plane 103 drivers/media/common/videobuf2/videobuf2-v4l2.c bytesused = b->m.planes[plane].bytesused plane 104 drivers/media/common/videobuf2/videobuf2-v4l2.c ? b->m.planes[plane].bytesused : length; plane 106 drivers/media/common/videobuf2/videobuf2-v4l2.c if (b->m.planes[plane].bytesused > length) plane 109 drivers/media/common/videobuf2/videobuf2-v4l2.c if (b->m.planes[plane].data_offset > 0 && plane 110 drivers/media/common/videobuf2/videobuf2-v4l2.c b->m.planes[plane].data_offset >= bytesused) plane 174 drivers/media/common/videobuf2/videobuf2-v4l2.c unsigned int plane; plane 201 drivers/media/common/videobuf2/videobuf2-v4l2.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 202 drivers/media/common/videobuf2/videobuf2-v4l2.c planes[plane].m.userptr = plane 203 drivers/media/common/videobuf2/videobuf2-v4l2.c b->m.planes[plane].m.userptr; plane 204 drivers/media/common/videobuf2/videobuf2-v4l2.c planes[plane].length = plane 205 drivers/media/common/videobuf2/videobuf2-v4l2.c b->m.planes[plane].length; plane 209 drivers/media/common/videobuf2/videobuf2-v4l2.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 210 drivers/media/common/videobuf2/videobuf2-v4l2.c planes[plane].m.fd = plane 211 drivers/media/common/videobuf2/videobuf2-v4l2.c b->m.planes[plane].m.fd; plane 212 drivers/media/common/videobuf2/videobuf2-v4l2.c planes[plane].length = plane 213 drivers/media/common/videobuf2/videobuf2-v4l2.c b->m.planes[plane].length; plane 217 drivers/media/common/videobuf2/videobuf2-v4l2.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 218 drivers/media/common/videobuf2/videobuf2-v4l2.c planes[plane].m.offset = plane 219 drivers/media/common/videobuf2/videobuf2-v4l2.c vb->planes[plane].m.offset; plane 220 drivers/media/common/videobuf2/videobuf2-v4l2.c planes[plane].length = plane 221 drivers/media/common/videobuf2/videobuf2-v4l2.c vb->planes[plane].length; plane 244 drivers/media/common/videobuf2/videobuf2-v4l2.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 245 drivers/media/common/videobuf2/videobuf2-v4l2.c struct vb2_plane *pdst = &planes[plane]; plane 246 drivers/media/common/videobuf2/videobuf2-v4l2.c struct v4l2_plane *psrc = &b->m.planes[plane]; plane 469 drivers/media/common/videobuf2/videobuf2-v4l2.c unsigned int plane; plane 491 drivers/media/common/videobuf2/videobuf2-v4l2.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 492 drivers/media/common/videobuf2/videobuf2-v4l2.c struct v4l2_plane *pdst = &b->m.planes[plane]; plane 493 drivers/media/common/videobuf2/videobuf2-v4l2.c struct vb2_plane *psrc = &vb->planes[plane]; plane 576 drivers/media/common/videobuf2/videobuf2-v4l2.c unsigned int plane; plane 581 drivers/media/common/videobuf2/videobuf2-v4l2.c for (plane = 0; plane < vb->num_planes; ++plane) { plane 583 drivers/media/common/videobuf2/videobuf2-v4l2.c planes[plane].m = vbuf->planes[plane].m; plane 584 drivers/media/common/videobuf2/videobuf2-v4l2.c planes[plane].length = vbuf->planes[plane].length; plane 586 drivers/media/common/videobuf2/videobuf2-v4l2.c planes[plane].bytesused = vbuf->planes[plane].bytesused; plane 587 drivers/media/common/videobuf2/videobuf2-v4l2.c planes[plane].data_offset = vbuf->planes[plane].data_offset; plane 822 drivers/media/common/videobuf2/videobuf2-v4l2.c eb->plane, eb->flags); plane 30 drivers/media/platform/cadence/cdns-csi2rx.c #define CSI2RX_STATIC_CFG_DLANE_MAP(llane, plane) ((plane) << (16 + (llane) * 4)) plane 383 drivers/media/platform/exynos-gsc/gsc-core.h u32 get_plane_size(struct gsc_frame *fr, unsigned int plane); plane 220 drivers/media/platform/exynos4-is/fimc-capture.c unsigned int plane = ffs(f->fmt->mdataplanes) - 1; plane 221 drivers/media/platform/exynos4-is/fimc-capture.c unsigned int size = f->payload[plane]; plane 228 drivers/media/platform/exynos4-is/fimc-capture.c vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane); plane 711 drivers/media/platform/exynos4-is/fimc-is-param.c isp->dma1_input.plane = 0; plane 723 drivers/media/platform/exynos4-is/fimc-is-param.c isp->dma2_input.plane = 0; plane 786 drivers/media/platform/exynos4-is/fimc-is-param.c isp->dma1_output.plane = 0; plane 802 drivers/media/platform/exynos4-is/fimc-is-param.c isp->dma2_output.plane = 0; plane 838 drivers/media/platform/exynos4-is/fimc-is-param.c drc->dma_input.plane = 0; plane 877 drivers/media/platform/exynos4-is/fimc-is-param.c fd->dma_input.plane = 0; plane 482 drivers/media/platform/exynos4-is/fimc-is-param.h u32 plane; plane 507 drivers/media/platform/exynos4-is/fimc-is-param.h u32 plane; plane 429 drivers/media/platform/exynos4-is/fimc-isp-video.c dma->plane = ifmt->memplanes; plane 310 drivers/media/platform/qcom/camss/camss-vfe-4-1.c static void vfe_get_wm_sizes(struct v4l2_pix_format_mplane *pix, u8 plane, plane 319 drivers/media/platform/qcom/camss/camss-vfe-4-1.c if (plane == 1) plane 333 drivers/media/platform/qcom/camss/camss-vfe-4-1.c u8 plane, u32 enable) plane 340 drivers/media/platform/qcom/camss/camss-vfe-4-1.c vfe_get_wm_sizes(pix, plane, &width, &height, &bytesperline); plane 351 drivers/media/platform/qcom/camss/camss-vfe-4-7.c static void vfe_get_wm_sizes(struct v4l2_pix_format_mplane *pix, u8 plane, plane 360 drivers/media/platform/qcom/camss/camss-vfe-4-7.c if (plane == 1) plane 375 drivers/media/platform/qcom/camss/camss-vfe-4-7.c *bytesperline = pix->plane_fmt[plane].bytesperline; plane 383 drivers/media/platform/qcom/camss/camss-vfe-4-7.c u8 plane, u32 enable) plane 390 drivers/media/platform/qcom/camss/camss-vfe-4-7.c vfe_get_wm_sizes(pix, plane, &width, &height, &bytesperline); plane 90 drivers/media/platform/qcom/camss/camss-vfe.h u8 plane, u32 enable); plane 560 drivers/media/platform/renesas-ceu.c static void ceu_update_plane_sizes(struct v4l2_plane_pix_format *plane, plane 563 drivers/media/platform/renesas-ceu.c memset(plane, 0, sizeof(*plane)); plane 565 drivers/media/platform/renesas-ceu.c plane->sizeimage = szimage; plane 566 drivers/media/platform/renesas-ceu.c if (plane->bytesperline < bpl || plane->bytesperline > CEU_MAX_BPL) plane 567 drivers/media/platform/renesas-ceu.c plane->bytesperline = bpl; plane 97 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c unsigned int plane; plane 102 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c for (plane = 0; plane < csi->fmt.num_planes; plane++) { plane 103 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c writel(addr, csi->regs + CSI_BUF_ADDR_REG(plane, slot)); plane 104 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c addr += csi->fmt.plane_fmt[plane].sizeimage; plane 115 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c unsigned int plane; plane 133 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c for (plane = 0; plane < csi->fmt.num_planes; plane++) { plane 137 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c plane); plane 138 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c writel(buf_addr, csi->regs + CSI_BUF_ADDR_REG(plane, slot)); plane 1031 drivers/media/platform/ti-vpe/vpe.c int plane = fmt->coplanar ? p_data->vb_part : 0; plane 1033 drivers/media/platform/ti-vpe/vpe.c vpdma_fmt = fmt->vpdma_fmt[plane]; plane 1038 drivers/media/platform/ti-vpe/vpe.c if (q_data->nplanes == 1 && plane) { plane 1043 drivers/media/platform/ti-vpe/vpe.c dma_addr = vb2_dma_contig_plane_dma_addr(vb, plane); plane 1095 drivers/media/platform/ti-vpe/vpe.c int plane = fmt->coplanar ? p_data->vb_part : 0; plane 1097 drivers/media/platform/ti-vpe/vpe.c vpdma_fmt = fmt->vpdma_fmt[plane]; plane 1102 drivers/media/platform/ti-vpe/vpe.c if (q_data->nplanes == 1 && plane) { plane 1107 drivers/media/platform/ti-vpe/vpe.c dma_addr = vb2_dma_contig_plane_dma_addr(vb, plane); plane 1137 drivers/media/platform/ti-vpe/vpe.c if (plane) plane 845 drivers/media/platform/vicodec/vicodec-core.c struct v4l2_plane_pix_format *plane; plane 874 drivers/media/platform/vicodec/vicodec-core.c plane = pix_mp->plane_fmt; plane 888 drivers/media/platform/vicodec/vicodec-core.c plane->bytesperline = plane 890 drivers/media/platform/vicodec/vicodec-core.c plane->sizeimage = pix_mp->width * pix_mp->height * plane 893 drivers/media/platform/vicodec/vicodec-core.c plane->sizeimage += sizeof(struct fwht_cframe_hdr); plane 895 drivers/media/platform/vicodec/vicodec-core.c memset(plane->reserved, 0, sizeof(plane->reserved)); plane 320 drivers/media/v4l2-core/v4l2-common.c static inline unsigned int v4l2_format_block_width(const struct v4l2_format_info *info, int plane) plane 322 drivers/media/v4l2-core/v4l2-common.c if (!info->block_w[plane]) plane 324 drivers/media/v4l2-core/v4l2-common.c return info->block_w[plane]; plane 327 drivers/media/v4l2-core/v4l2-common.c static inline unsigned int v4l2_format_block_height(const struct v4l2_format_info *info, int plane) plane 329 drivers/media/v4l2-core/v4l2-common.c if (!info->block_h[plane]) plane 331 drivers/media/v4l2-core/v4l2-common.c return info->block_h[plane]; plane 355 drivers/media/v4l2-core/v4l2-common.c struct v4l2_plane_pix_format *plane; plane 368 drivers/media/v4l2-core/v4l2-common.c plane = &pixfmt->plane_fmt[0]; plane 369 drivers/media/v4l2-core/v4l2-common.c plane->bytesperline = ALIGN(width, v4l2_format_block_width(info, 0)) * info->bpp[0]; plane 370 drivers/media/v4l2-core/v4l2-common.c plane->sizeimage = 0; plane 381 drivers/media/v4l2-core/v4l2-common.c plane->sizeimage += info->bpp[i] * plane 395 drivers/media/v4l2-core/v4l2-common.c plane = &pixfmt->plane_fmt[i]; plane 396 drivers/media/v4l2-core/v4l2-common.c plane->bytesperline = plane 398 drivers/media/v4l2-core/v4l2-common.c plane->sizeimage = plane 399 drivers/media/v4l2-core/v4l2-common.c plane->bytesperline * DIV_ROUND_UP(aligned_height, vdiv); plane 474 drivers/media/v4l2-core/v4l2-ioctl.c const struct v4l2_plane *plane; plane 490 drivers/media/v4l2-core/v4l2-ioctl.c plane = &p->m.planes[i]; plane 493 drivers/media/v4l2-core/v4l2-ioctl.c i, plane->bytesused, plane->data_offset, plane 494 drivers/media/v4l2-core/v4l2-ioctl.c plane->m.userptr, plane->length); plane 512 drivers/media/v4l2-core/v4l2-ioctl.c p->index, p->plane, p->flags); plane 237 drivers/mtd/nand/spi/core.c rdesc = spinand->dirmaps[req->pos.plane].rdesc; plane 305 drivers/mtd/nand/spi/core.c wdesc = spinand->dirmaps[req->pos.plane].wdesc; plane 696 drivers/mtd/nand/spi/core.c unsigned int plane) plane 706 drivers/mtd/nand/spi/core.c info.offset = plane << fls(nand->memorg.pagesize); plane 714 drivers/mtd/nand/spi/core.c spinand->dirmaps[plane].wdesc = desc; plane 722 drivers/mtd/nand/spi/core.c spinand->dirmaps[plane].rdesc = desc; plane 171 drivers/staging/media/sunxi/cedrus/cedrus.h unsigned int plane) plane 176 drivers/staging/media/sunxi/cedrus/cedrus.h pix_fmt->height * plane : 0); plane 180 drivers/staging/media/sunxi/cedrus/cedrus.h int index, unsigned int plane) plane 192 drivers/staging/media/sunxi/cedrus/cedrus.h return buf ? cedrus_buf_addr(buf, &ctx->dst_fmt, plane) : 0; plane 152 drivers/video/fbdev/au1200fb.c int plane; plane 702 drivers/video/fbdev/au1200fb.c static int au1200_setlocation (struct au1200fb_device *fbdev, int plane, plane 710 drivers/video/fbdev/au1200fb.c winctrl0 = lcd->window[plane].winctrl0; plane 711 drivers/video/fbdev/au1200fb.c winctrl1 = lcd->window[plane].winctrl1; plane 716 drivers/video/fbdev/au1200fb.c xsz = win->w[plane].xres; plane 717 drivers/video/fbdev/au1200fb.c ysz = win->w[plane].yres; plane 718 drivers/video/fbdev/au1200fb.c if ((xpos + win->w[plane].xres) > panel->Xres) { plane 724 drivers/video/fbdev/au1200fb.c if ((ypos + win->w[plane].yres) > panel->Yres) { plane 732 drivers/video/fbdev/au1200fb.c xsz = win->w[plane].xres + xpos; plane 733 drivers/video/fbdev/au1200fb.c fb_offset += (((0 - xpos) * winbpp(lcd->window[plane].winctrl1))/8); plane 740 drivers/video/fbdev/au1200fb.c ysz = win->w[plane].yres + ypos; plane 747 drivers/video/fbdev/au1200fb.c win->w[plane].xpos = xpos; plane 748 drivers/video/fbdev/au1200fb.c win->w[plane].ypos = ypos; plane 758 drivers/video/fbdev/au1200fb.c winenable = lcd->winenable & (1 << plane); plane 760 drivers/video/fbdev/au1200fb.c lcd->winenable &= ~(1 << plane); plane 761 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl0 = winctrl0; plane 762 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl1 = winctrl1; plane 763 drivers/video/fbdev/au1200fb.c lcd->window[plane].winbuf0 = plane 764 drivers/video/fbdev/au1200fb.c lcd->window[plane].winbuf1 = fbdev->fb_phys; plane 765 drivers/video/fbdev/au1200fb.c lcd->window[plane].winbufctrl = 0; /* select winbuf0 */ plane 939 drivers/video/fbdev/au1200fb.c int plane = fbdev->plane; plane 941 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl1 = ( 0 plane 942 drivers/video/fbdev/au1200fb.c | LCD_WINCTRL1_PRI_N(plane) plane 943 drivers/video/fbdev/au1200fb.c | win->w[plane].mode_winctrl1 /* FRM,CCO,PO,PIPE */ plane 946 drivers/video/fbdev/au1200fb.c au1200_setlocation(fbdev, plane, win->w[plane].xpos, win->w[plane].ypos); plane 948 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl2 = ( 0 plane 955 drivers/video/fbdev/au1200fb.c lcd->winenable |= win->w[plane].mode_winenable; plane 1041 drivers/video/fbdev/au1200fb.c int screen_size, plane; plane 1043 drivers/video/fbdev/au1200fb.c plane = fbdev->plane; plane 1047 drivers/video/fbdev/au1200fb.c var->xres = win->w[plane].xres; plane 1048 drivers/video/fbdev/au1200fb.c var->yres = win->w[plane].yres; plane 1054 drivers/video/fbdev/au1200fb.c var->bits_per_pixel = winbpp(win->w[plane].mode_winctrl1); plane 1288 drivers/video/fbdev/au1200fb.c static void set_window(unsigned int plane, plane 1295 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl0 & ~(LCD_WINCTRL0_OX | plane 1299 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl0 = val; plane 1302 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl0 & ~(LCD_WINCTRL0_A); plane 1304 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl0 = val; plane 1307 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl0 & ~(LCD_WINCTRL0_AEN); plane 1309 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl0 = val; plane 1314 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_PRI); plane 1316 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl1 = val; plane 1319 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_PIPE); plane 1321 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl1 = val; plane 1324 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_FRM); plane 1326 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl1 = val; plane 1329 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_CCO); plane 1331 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl1 = val; plane 1334 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_PO); plane 1336 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl1 = val; plane 1339 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_SZX | plane 1343 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl1 = val; plane 1346 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_BX); plane 1348 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl2 = val; plane 1353 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_CKMODE); plane 1355 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl2 = val; plane 1358 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_DBM); plane 1360 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl2 = val; plane 1363 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_RAM); plane 1365 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl2 = val; plane 1371 drivers/video/fbdev/au1200fb.c val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_SCX | plane 1375 drivers/video/fbdev/au1200fb.c lcd->window[plane].winctrl2 = val; plane 1380 drivers/video/fbdev/au1200fb.c val &= ~(1<<plane); plane 1381 drivers/video/fbdev/au1200fb.c val |= (pdata->enable & 1) << plane; plane 1387 drivers/video/fbdev/au1200fb.c static void get_window(unsigned int plane, plane 1391 drivers/video/fbdev/au1200fb.c pdata->xpos = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OX) >> 21; plane 1392 drivers/video/fbdev/au1200fb.c pdata->ypos = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OY) >> 10; plane 1393 drivers/video/fbdev/au1200fb.c pdata->alpha_color = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_A) >> 2; plane 1394 drivers/video/fbdev/au1200fb.c pdata->alpha_mode = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_AEN) >> 1; plane 1397 drivers/video/fbdev/au1200fb.c pdata->priority = (lcd->window[plane].winctrl1& LCD_WINCTRL1_PRI) >> 30; plane 1398 drivers/video/fbdev/au1200fb.c pdata->channel = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_PIPE) >> 29; plane 1399 drivers/video/fbdev/au1200fb.c pdata->buffer_format = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_FRM) >> 25; plane 1400 drivers/video/fbdev/au1200fb.c pdata->color_order = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_CCO) >> 24; plane 1401 drivers/video/fbdev/au1200fb.c pdata->pixel_order = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_PO) >> 22; plane 1402 drivers/video/fbdev/au1200fb.c pdata->xsize = ((lcd->window[plane].winctrl1 & LCD_WINCTRL1_SZX) >> 11) + 1; plane 1403 drivers/video/fbdev/au1200fb.c pdata->ysize = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_SZY) + 1; plane 1406 drivers/video/fbdev/au1200fb.c pdata->colorkey_mode = (lcd->window[plane].winctrl2 & LCD_WINCTRL2_CKMODE) >> 24; plane 1407 drivers/video/fbdev/au1200fb.c pdata->double_buffer_mode = (lcd->window[plane].winctrl2 & LCD_WINCTRL2_DBM) >> 23; plane 1408 drivers/video/fbdev/au1200fb.c pdata->ram_array_mode = (lcd->window[plane].winctrl2 & LCD_WINCTRL2_RAM) >> 21; plane 1410 drivers/video/fbdev/au1200fb.c pdata->enable = (lcd->winenable >> plane) & 1; plane 1418 drivers/video/fbdev/au1200fb.c int plane; plane 1421 drivers/video/fbdev/au1200fb.c plane = fbinfo2index(info); plane 1422 drivers/video/fbdev/au1200fb.c print_dbg("au1200fb: ioctl %d on plane %d\n", cmd, plane); plane 1445 drivers/video/fbdev/au1200fb.c set_window(plane, &iodata.window); plane 1450 drivers/video/fbdev/au1200fb.c get_window(plane, &iodata.window); plane 1524 drivers/video/fbdev/au1200fb.c bpp = winbpp(win->w[fbdev->plane].mode_winctrl1); plane 1649 drivers/video/fbdev/au1200fb.c int bpp, plane, ret, irq; plane 1668 drivers/video/fbdev/au1200fb.c for (plane = 0; plane < device_count; ++plane) { plane 1669 drivers/video/fbdev/au1200fb.c bpp = winbpp(win->w[plane].mode_winctrl1); plane 1670 drivers/video/fbdev/au1200fb.c if (win->w[plane].xres == 0) plane 1671 drivers/video/fbdev/au1200fb.c win->w[plane].xres = panel->Xres; plane 1672 drivers/video/fbdev/au1200fb.c if (win->w[plane].yres == 0) plane 1673 drivers/video/fbdev/au1200fb.c win->w[plane].yres = panel->Yres; plane 1682 drivers/video/fbdev/au1200fb.c _au1200fb_infos[plane] = fbi; plane 1688 drivers/video/fbdev/au1200fb.c fbdev->plane = plane; plane 1691 drivers/video/fbdev/au1200fb.c fbdev->fb_len = (win->w[plane].xres * win->w[plane].yres * bpp) / 8; plane 1721 drivers/video/fbdev/au1200fb.c if (plane == 0) plane 1748 drivers/video/fbdev/au1200fb.c for (plane = 0; plane < device_count; ++plane) { plane 1749 drivers/video/fbdev/au1200fb.c fbi = _au1200fb_infos[plane]; plane 1760 drivers/video/fbdev/au1200fb.c _au1200fb_infos[plane] = NULL; plane 1769 drivers/video/fbdev/au1200fb.c int plane; plane 1774 drivers/video/fbdev/au1200fb.c for (plane = 0; plane < device_count; ++plane) { plane 1775 drivers/video/fbdev/au1200fb.c fbi = _au1200fb_infos[plane]; plane 1784 drivers/video/fbdev/au1200fb.c _au1200fb_infos[plane] = NULL; plane 513 drivers/video/fbdev/omap/hwa742.c static int hwa742_setup_plane(int plane, int channel_out, plane 518 drivers/video/fbdev/omap/hwa742.c if (plane != OMAPFB_PLANE_GFX || plane 525 drivers/video/fbdev/omap/hwa742.c static int hwa742_enable_plane(int plane, int enable) plane 527 drivers/video/fbdev/omap/hwa742.c if (plane != 0) plane 530 drivers/video/fbdev/omap/hwa742.c hwa742.int_ctrl->enable_plane(plane, enable); plane 885 drivers/video/fbdev/omap/hwa742.c static void hwa742_get_caps(int plane, struct omapfb_caps *caps) plane 887 drivers/video/fbdev/omap/hwa742.c hwa742.int_ctrl->get_caps(plane, caps); plane 171 drivers/video/fbdev/omap/lcdc.c struct omapfb_plane_struct *plane = lcdc.fbdev->fb_info[0]->par; plane 180 drivers/video/fbdev/omap/lcdc.c if (plane->info.mirror || (src & 3) || plane 223 drivers/video/fbdev/omap/lcdc.c omap_set_lcd_dma_b1_mirror(plane->info.mirror); plane 278 drivers/video/fbdev/omap/lcdc.c static int omap_lcdc_setup_plane(int plane, int channel_out, plane 294 drivers/video/fbdev/omap/lcdc.c if (plane != 0 || channel_out != 0 || pos_x != 0 || pos_y != 0 || plane 299 drivers/video/fbdev/omap/lcdc.c "w %d h %d\n", plane, pos_x, pos_y, width, height); plane 365 drivers/video/fbdev/omap/lcdc.c static int omap_lcdc_enable_plane(int plane, int enable) plane 369 drivers/video/fbdev/omap/lcdc.c plane, enable, lcdc.update_mode, lcdc.ext_mode); plane 370 drivers/video/fbdev/omap/lcdc.c if (plane != OMAPFB_PLANE_GFX) plane 569 drivers/video/fbdev/omap/lcdc.c static void omap_lcdc_get_caps(int plane, struct omapfb_caps *caps) plane 150 drivers/video/fbdev/omap/omapfb.h void (*get_caps) (int plane, struct omapfb_caps *caps); plane 153 drivers/video/fbdev/omap/omapfb.h int (*setup_plane) (int plane, int channel_out, plane 159 drivers/video/fbdev/omap/omapfb.h int (*setup_mem) (int plane, size_t size, plane 163 drivers/video/fbdev/omap/omapfb.h int (*set_scale) (int plane, plane 166 drivers/video/fbdev/omap/omapfb.h int (*enable_plane) (int plane, int enable); plane 183 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 184 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 192 drivers/video/fbdev/omap/omapfb_main.c r = fbdev->ctrl->setup_plane(plane->idx, plane->info.channel_out, plane 194 drivers/video/fbdev/omap/omapfb_main.c plane->info.pos_x, plane->info.pos_y, plane 195 drivers/video/fbdev/omap/omapfb_main.c var->xres, var->yres, plane->color_mode); plane 206 drivers/video/fbdev/omap/omapfb_main.c r = fbdev->ctrl->set_scale(plane->idx, plane 208 drivers/video/fbdev/omap/omapfb_main.c plane->info.out_width, plane 209 drivers/video/fbdev/omap/omapfb_main.c plane->info.out_height); plane 242 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = info->par; plane 243 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 247 drivers/video/fbdev/omap/omapfb_main.c switch (plane->color_mode) { plane 316 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 317 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 357 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 358 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 374 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 378 drivers/video/fbdev/omap/omapfb_main.c rg = &plane->fbdev->mem_desc.region[plane->idx]; plane 413 drivers/video/fbdev/omap/omapfb_main.c static int set_color_mode(struct omapfb_plane_struct *plane, plane 421 drivers/video/fbdev/omap/omapfb_main.c plane->color_mode = var->nonstd; plane 425 drivers/video/fbdev/omap/omapfb_main.c plane->color_mode = var->nonstd; plane 429 drivers/video/fbdev/omap/omapfb_main.c plane->color_mode = var->nonstd; plane 437 drivers/video/fbdev/omap/omapfb_main.c plane->color_mode = OMAPFB_COLOR_CLUT_1BPP; plane 440 drivers/video/fbdev/omap/omapfb_main.c plane->color_mode = OMAPFB_COLOR_CLUT_2BPP; plane 443 drivers/video/fbdev/omap/omapfb_main.c plane->color_mode = OMAPFB_COLOR_CLUT_4BPP; plane 446 drivers/video/fbdev/omap/omapfb_main.c plane->color_mode = OMAPFB_COLOR_CLUT_8BPP; plane 452 drivers/video/fbdev/omap/omapfb_main.c if (plane->fbdev->panel->bpp == 12) plane 453 drivers/video/fbdev/omap/omapfb_main.c plane->color_mode = OMAPFB_COLOR_RGB444; plane 455 drivers/video/fbdev/omap/omapfb_main.c plane->color_mode = OMAPFB_COLOR_RGB565; plane 474 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 475 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 478 drivers/video/fbdev/omap/omapfb_main.c if (set_color_mode(plane, var) < 0) plane 482 drivers/video/fbdev/omap/omapfb_main.c if (plane->color_mode == OMAPFB_COLOR_RGB444) plane 525 drivers/video/fbdev/omap/omapfb_main.c max_frame_size = fbdev->mem_desc.region[plane->idx].size; plane 550 drivers/video/fbdev/omap/omapfb_main.c if (plane->color_mode == OMAPFB_COLOR_RGB444) { plane 594 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 595 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 621 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 622 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 629 drivers/video/fbdev/omap/omapfb_main.c else if (mirror != plane->info.mirror) { plane 630 drivers/video/fbdev/omap/omapfb_main.c plane->info.mirror = mirror; plane 644 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 645 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 663 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 664 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 681 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 682 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 726 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 729 drivers/video/fbdev/omap/omapfb_main.c omapfb_rqueue_lock(plane->fbdev); plane 731 drivers/video/fbdev/omap/omapfb_main.c omapfb_rqueue_unlock(plane->fbdev); plane 738 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 739 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 766 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 767 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 777 drivers/video/fbdev/omap/omapfb_main.c if (pi->enabled && !fbdev->mem_desc.region[plane->idx].size) { plane 785 drivers/video/fbdev/omap/omapfb_main.c old_info = plane->info; plane 786 drivers/video/fbdev/omap/omapfb_main.c plane->info = *pi; plane 790 drivers/video/fbdev/omap/omapfb_main.c plane->info = old_info; plane 794 drivers/video/fbdev/omap/omapfb_main.c r = fbdev->ctrl->enable_plane(plane->idx, pi->enabled); plane 796 drivers/video/fbdev/omap/omapfb_main.c plane->info = old_info; plane 806 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 808 drivers/video/fbdev/omap/omapfb_main.c *pi = plane->info; plane 814 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 815 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 816 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_mem_region *rg = &fbdev->mem_desc.region[plane->idx]; plane 827 drivers/video/fbdev/omap/omapfb_main.c if (plane->info.enabled) { plane 856 drivers/video/fbdev/omap/omapfb_main.c r = fbdev->ctrl->setup_mem(plane->idx, size, mi->type, &paddr); plane 890 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 891 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 894 drivers/video/fbdev/omap/omapfb_main.c rg = &fbdev->mem_desc.region[plane->idx]; plane 1018 drivers/video/fbdev/omap/omapfb_main.c static void omapfb_get_caps(struct omapfb_device *fbdev, int plane, plane 1022 drivers/video/fbdev/omap/omapfb_main.c fbdev->ctrl->get_caps(plane, caps); plane 1053 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = fbi->par; plane 1054 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 1158 drivers/video/fbdev/omap/omapfb_main.c omapfb_get_caps(fbdev, plane->idx, &p.caps); plane 1201 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane = info->par; plane 1202 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_device *fbdev = plane->fbdev; plane 1242 drivers/video/fbdev/omap/omapfb_main.c int plane; plane 1246 drivers/video/fbdev/omap/omapfb_main.c plane = 0; plane 1248 drivers/video/fbdev/omap/omapfb_main.c while (size < PAGE_SIZE && plane < OMAPFB_PLANE_NUM) { plane 1249 drivers/video/fbdev/omap/omapfb_main.c omapfb_get_caps(fbdev, plane, &caps); plane 1252 drivers/video/fbdev/omap/omapfb_main.c plane, caps.ctrl, caps.plane_color, caps.wnd_color); plane 1253 drivers/video/fbdev/omap/omapfb_main.c plane++; plane 1264 drivers/video/fbdev/omap/omapfb_main.c int plane; plane 1267 drivers/video/fbdev/omap/omapfb_main.c plane = 0; plane 1269 drivers/video/fbdev/omap/omapfb_main.c while (size < PAGE_SIZE && plane < OMAPFB_PLANE_NUM) { plane 1270 drivers/video/fbdev/omap/omapfb_main.c omapfb_get_caps(fbdev, plane, &caps); plane 1272 drivers/video/fbdev/omap/omapfb_main.c "plane#%d:\n", plane); plane 1296 drivers/video/fbdev/omap/omapfb_main.c plane++; plane 1502 drivers/video/fbdev/omap/omapfb_main.c struct omapfb_plane_struct *plane; plane 1509 drivers/video/fbdev/omap/omapfb_main.c plane = fbi->par; plane 1510 drivers/video/fbdev/omap/omapfb_main.c plane->idx = i; plane 1511 drivers/video/fbdev/omap/omapfb_main.c plane->fbdev = fbdev; plane 1512 drivers/video/fbdev/omap/omapfb_main.c plane->info.mirror = def_mirror; plane 1520 drivers/video/fbdev/omap/omapfb_main.c plane->info.out_width = fbi->var.xres; plane 1521 drivers/video/fbdev/omap/omapfb_main.c plane->info.out_height = fbi->var.yres; plane 248 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static unsigned long dispc_plane_pclk_rate(enum omap_plane plane); plane 249 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static unsigned long dispc_plane_lclk_rate(enum omap_plane plane); plane 589 drivers/video/fbdev/omap2/omapfb/dss/dispc.c enum omap_plane plane = OMAP_DSS_WB; plane 592 drivers/video/fbdev/omap2/omapfb/dss/dispc.c enable = REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0) == 1; plane 606 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_write_firh_reg(enum omap_plane plane, int reg, u32 value) plane 608 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_H(plane, reg), value); plane 611 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_write_firhv_reg(enum omap_plane plane, int reg, u32 value) plane 613 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_HV(plane, reg), value); plane 616 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_write_firv_reg(enum omap_plane plane, int reg, u32 value) plane 618 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_V(plane, reg), value); plane 621 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_write_firh2_reg(enum omap_plane plane, int reg, u32 value) plane 623 drivers/video/fbdev/omap2/omapfb/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 625 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_H2(plane, reg), value); plane 628 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_write_firhv2_reg(enum omap_plane plane, int reg, plane 631 drivers/video/fbdev/omap2/omapfb/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 633 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_HV2(plane, reg), value); plane 636 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_write_firv2_reg(enum omap_plane plane, int reg, u32 value) plane 638 drivers/video/fbdev/omap2/omapfb/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 640 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_V2(plane, reg), value); plane 643 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_scale_coef(enum omap_plane plane, int fir_hinc, plane 666 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_write_firh_reg(plane, i, h); plane 667 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_write_firhv_reg(plane, i, hv); plane 669 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_write_firh2_reg(plane, i, h); plane 670 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_write_firhv2_reg(plane, i, hv); plane 681 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_write_firv_reg(plane, i, v); plane 683 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_write_firv2_reg(plane, i, v); plane 689 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_write_color_conv_coef(enum omap_plane plane, plane 694 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 0), CVAL(ct->rcr, ct->ry)); plane 695 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 1), CVAL(ct->gy, ct->rcb)); plane 696 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 2), CVAL(ct->gcb, ct->gcr)); plane 697 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 3), CVAL(ct->bcr, ct->by)); plane 698 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 4), CVAL(0, ct->bcb)); plane 700 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), ct->full_range, 11, 11); plane 725 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_ba0(enum omap_plane plane, u32 paddr) plane 727 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_BA0(plane), paddr); plane 730 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_ba1(enum omap_plane plane, u32 paddr) plane 732 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_BA1(plane), paddr); plane 735 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_ba0_uv(enum omap_plane plane, u32 paddr) plane 737 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_BA0_UV(plane), paddr); plane 740 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_ba1_uv(enum omap_plane plane, u32 paddr) plane 742 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_BA1_UV(plane), paddr); plane 745 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_pos(enum omap_plane plane, plane 755 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_POSITION(plane), val); plane 758 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_input_size(enum omap_plane plane, int width, plane 763 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (plane == OMAP_DSS_GFX || plane == OMAP_DSS_WB) plane 764 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_SIZE(plane), val); plane 766 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_PICTURE_SIZE(plane), val); plane 769 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_output_size(enum omap_plane plane, int width, plane 774 drivers/video/fbdev/omap2/omapfb/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 778 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (plane == OMAP_DSS_WB) plane 779 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_PICTURE_SIZE(plane), val); plane 781 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_SIZE(plane), val); plane 784 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_zorder(enum omap_plane plane, plane 790 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), zorder, 27, 26); plane 804 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_pre_mult_alpha(enum omap_plane plane, plane 810 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 28, 28); plane 813 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_setup_global_alpha(enum omap_plane plane, plane 822 drivers/video/fbdev/omap2/omapfb/dss/dispc.c shift = shifts[plane]; plane 826 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_pix_inc(enum omap_plane plane, s32 inc) plane 828 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_PIXEL_INC(plane), inc); plane 831 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_row_inc(enum omap_plane plane, s32 inc) plane 833 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ROW_INC(plane), inc); plane 836 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_color_mode(enum omap_plane plane, plane 840 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (plane != OMAP_DSS_GFX) { plane 914 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), m, 4, 1); plane 917 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_configure_burst_type(enum omap_plane plane, plane 924 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), 1, 29, 29); plane 926 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), 0, 29, 29); plane 929 drivers/video/fbdev/omap2/omapfb/dss/dispc.c void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel) plane 935 drivers/video/fbdev/omap2/omapfb/dss/dispc.c switch (plane) { plane 949 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); plane 987 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); plane 991 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static enum omap_channel dispc_ovl_get_channel_out(enum omap_plane plane) plane 996 drivers/video/fbdev/omap2/omapfb/dss/dispc.c switch (plane) { plane 1010 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); plane 1033 drivers/video/fbdev/omap2/omapfb/dss/dispc.c enum omap_plane plane = OMAP_DSS_WB; plane 1035 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), channel, 18, 16); plane 1038 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_burst_size(enum omap_plane plane, plane 1044 drivers/video/fbdev/omap2/omapfb/dss/dispc.c shift = shifts[plane]; plane 1045 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), burst_size, shift + 1, shift); plane 1060 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static u32 dispc_ovl_get_burst_size(enum omap_plane plane) plane 1109 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_vid_color_conv(enum omap_plane plane, bool enable) plane 1113 drivers/video/fbdev/omap2/omapfb/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 1115 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); plane 1117 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); plane 1120 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_enable_replication(enum omap_plane plane, plane 1129 drivers/video/fbdev/omap2/omapfb/dss/dispc.c shift = shifts[plane]; plane 1130 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift); plane 1217 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static u32 dispc_ovl_get_fifo_size(enum omap_plane plane) plane 1223 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (dispc.fifo_assignment[fifo] == plane) plane 1230 drivers/video/fbdev/omap2/omapfb/dss/dispc.c void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high) plane 1247 drivers/video/fbdev/omap2/omapfb/dss/dispc.c plane, plane 1248 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_GET(DISPC_OVL_FIFO_THRESHOLD(plane), plane 1250 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_GET(DISPC_OVL_FIFO_THRESHOLD(plane), plane 1254 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIFO_THRESHOLD(plane), plane 1264 drivers/video/fbdev/omap2/omapfb/dss/dispc.c plane != OMAP_DSS_WB) plane 1265 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_PRELOAD(plane), min(high, 0xfffu)); plane 1279 drivers/video/fbdev/omap2/omapfb/dss/dispc.c void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane, plane 1292 drivers/video/fbdev/omap2/omapfb/dss/dispc.c burst_size = dispc_ovl_get_burst_size(plane); plane 1293 drivers/video/fbdev/omap2/omapfb/dss/dispc.c ovl_fifo_size = dispc_ovl_get_fifo_size(plane); plane 1312 drivers/video/fbdev/omap2/omapfb/dss/dispc.c } else if (plane == OMAP_DSS_WB) { plane 1326 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_mflag(enum omap_plane plane, bool enable) plane 1330 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (plane == OMAP_DSS_GFX) plane 1335 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, bit, bit); plane 1338 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_mflag_threshold(enum omap_plane plane, plane 1341 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_MFLAG_THRESHOLD(plane), plane 1402 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_fir(enum omap_plane plane, plane 1418 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR(plane), val); plane 1421 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR2(plane), val); plane 1425 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_vid_accu0(enum omap_plane plane, int haccu, int vaccu) plane 1436 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ACCU0(plane), val); plane 1439 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_vid_accu1(enum omap_plane plane, int haccu, int vaccu) plane 1450 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ACCU1(plane), val); plane 1453 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_vid_accu2_0(enum omap_plane plane, int haccu, plane 1459 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ACCU2_0(plane), val); plane 1462 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_vid_accu2_1(enum omap_plane plane, int haccu, plane 1468 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ACCU2_1(plane), val); plane 1471 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_scale_param(enum omap_plane plane, plane 1482 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_scale_coef(plane, fir_hinc, fir_vinc, five_taps, plane 1484 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_fir(plane, fir_hinc, fir_vinc, color_comp); plane 1487 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_accu_uv(enum omap_plane plane, plane 1571 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_vid_accu2_0(plane, h_accu2_0, v_accu2_0); plane 1572 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_vid_accu2_1(plane, h_accu2_1, v_accu2_1); plane 1575 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_scaling_common(enum omap_plane plane, plane 1586 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_scale_param(plane, orig_width, orig_height, plane 1589 drivers/video/fbdev/omap2/omapfb/dss/dispc.c l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); plane 1610 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), l); plane 1625 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_vid_accu0(plane, 0, accu0); plane 1626 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_vid_accu1(plane, 0, accu1); plane 1629 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_scaling_uv(enum omap_plane plane, plane 1638 drivers/video/fbdev/omap2/omapfb/dss/dispc.c bool chroma_upscale = plane != OMAP_DSS_WB ? true : false; plane 1646 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (plane != OMAP_DSS_WB) plane 1647 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), 0, 8, 8); plane 1651 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_accu_uv(plane, orig_width, orig_height, out_width, plane 1695 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_scale_param(plane, orig_width, orig_height, plane 1699 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (plane != OMAP_DSS_WB) plane 1700 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), plane 1704 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_x ? 1 : 0, 5, 5); plane 1706 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_y ? 1 : 0, 6, 6); plane 1709 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_scaling(enum omap_plane plane, plane 1716 drivers/video/fbdev/omap2/omapfb/dss/dispc.c BUG_ON(plane == OMAP_DSS_GFX); plane 1718 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_scaling_common(plane, plane 1725 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_scaling_uv(plane, plane 1733 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static void dispc_ovl_set_rotation_attrs(enum omap_plane plane, u8 rotation, plane 1790 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), vidrot, 13, 12); plane 1792 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), plane 1800 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), doublestride, 22, 22); plane 2546 drivers/video/fbdev/omap2/omapfb/dss/dispc.c int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel, plane 2551 drivers/video/fbdev/omap2/omapfb/dss/dispc.c enum omap_overlay_caps caps = dss_feat_get_overlay_caps(plane); plane 2577 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (!dss_feat_color_mode_supported(plane, oi->color_mode)) plane 2587 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static int dispc_ovl_setup_common(enum omap_plane plane, plane 2608 drivers/video/fbdev/omap2/omapfb/dss/dispc.c unsigned long pclk = dispc_plane_pclk_rate(plane); plane 2609 drivers/video/fbdev/omap2/omapfb/dss/dispc.c unsigned long lclk = dispc_plane_lclk_rate(plane); plane 2646 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (!dss_feat_color_mode_supported(plane, color_mode)) plane 2708 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (plane == OMAP_DSS_WB) { plane 2737 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_color_mode(plane, color_mode); plane 2739 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_configure_burst_type(plane, rotation_type); plane 2741 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_ba0(plane, paddr + offset0); plane 2742 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_ba1(plane, paddr + offset1); plane 2745 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_ba0_uv(plane, p_uv_addr + offset0); plane 2746 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_ba1_uv(plane, p_uv_addr + offset1); plane 2752 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_row_inc(plane, row_inc); plane 2753 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_pix_inc(plane, pix_inc); plane 2758 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_pos(plane, caps, pos_x, pos_y); plane 2760 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_input_size(plane, in_width, in_height); plane 2763 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_scaling(plane, in_width, in_height, out_width, plane 2766 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_output_size(plane, out_width, out_height); plane 2767 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_vid_color_conv(plane, cconv); plane 2770 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_rotation_attrs(plane, rotation, rotation_type, mirror, plane 2773 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_zorder(plane, caps, zorder); plane 2774 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_set_pre_mult_alpha(plane, caps, pre_mult_alpha); plane 2775 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_setup_global_alpha(plane, caps, global_alpha); plane 2777 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_enable_replication(plane, caps, replication); plane 2782 drivers/video/fbdev/omap2/omapfb/dss/dispc.c int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, plane 2787 drivers/video/fbdev/omap2/omapfb/dss/dispc.c enum omap_overlay_caps caps = dss_feat_get_overlay_caps(plane); plane 2790 drivers/video/fbdev/omap2/omapfb/dss/dispc.c channel = dispc_ovl_get_channel_out(plane); plane 2794 drivers/video/fbdev/omap2/omapfb/dss/dispc.c plane, &oi->paddr, &oi->p_uv_addr, oi->screen_width, oi->pos_x, plane 2798 drivers/video/fbdev/omap2/omapfb/dss/dispc.c r = dispc_ovl_setup_common(plane, caps, oi->paddr, oi->p_uv_addr, plane 2813 drivers/video/fbdev/omap2/omapfb/dss/dispc.c enum omap_plane plane = OMAP_DSS_WB; plane 2828 drivers/video/fbdev/omap2/omapfb/dss/dispc.c r = dispc_ovl_setup_common(plane, caps, wi->paddr, wi->p_uv_addr, plane 2851 drivers/video/fbdev/omap2/omapfb/dss/dispc.c l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); plane 2858 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), l); plane 2862 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), 0, 7, 0); plane 2870 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0); plane 2876 drivers/video/fbdev/omap2/omapfb/dss/dispc.c int dispc_ovl_enable(enum omap_plane plane, bool enable) plane 2878 drivers/video/fbdev/omap2/omapfb/dss/dispc.c DSSDBG("dispc_enable_plane %d, %d\n", plane, enable); plane 2880 drivers/video/fbdev/omap2/omapfb/dss/dispc.c REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 0, 0); plane 2886 drivers/video/fbdev/omap2/omapfb/dss/dispc.c bool dispc_ovl_enabled(enum omap_plane plane) plane 2888 drivers/video/fbdev/omap2/omapfb/dss/dispc.c return REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0); plane 3412 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static unsigned long dispc_plane_pclk_rate(enum omap_plane plane) plane 3416 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (plane == OMAP_DSS_WB) plane 3419 drivers/video/fbdev/omap2/omapfb/dss/dispc.c channel = dispc_ovl_get_channel_out(plane); plane 3424 drivers/video/fbdev/omap2/omapfb/dss/dispc.c static unsigned long dispc_plane_lclk_rate(enum omap_plane plane) plane 3428 drivers/video/fbdev/omap2/omapfb/dss/dispc.c if (plane == OMAP_DSS_WB) plane 3431 drivers/video/fbdev/omap2/omapfb/dss/dispc.c channel = dispc_ovl_get_channel_out(plane); plane 3646 drivers/video/fbdev/omap2/omapfb/dss/dispc.c #define DISPC_REG(plane, name, i) name(plane, i) plane 3647 drivers/video/fbdev/omap2/omapfb/dss/dispc.c #define DUMPREG(plane, name, i) \ plane 3648 drivers/video/fbdev/omap2/omapfb/dss/dispc.c seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, p_names[plane], \ plane 3649 drivers/video/fbdev/omap2/omapfb/dss/dispc.c (int)(46 - strlen(#name) - strlen(p_names[plane])), " ", \ plane 3650 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_read_reg(DISPC_REG(plane, name, i))) plane 339 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_OVL_BASE(enum omap_plane plane) plane 341 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 359 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane) plane 361 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 375 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane) plane 377 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 391 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane) plane 393 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 411 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane) plane 413 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 431 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_POS_OFFSET(enum omap_plane plane) plane 433 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 446 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_SIZE_OFFSET(enum omap_plane plane) plane 448 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 462 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_ATTR_OFFSET(enum omap_plane plane) plane 464 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 479 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane plane) plane 481 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 499 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_FIFO_THRESH_OFFSET(enum omap_plane plane) plane 501 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 516 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane plane) plane 518 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 533 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_ROW_INC_OFFSET(enum omap_plane plane) plane 535 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 550 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_PIX_INC_OFFSET(enum omap_plane plane) plane 552 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 567 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane plane) plane 569 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 583 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_TABLE_BA_OFFSET(enum omap_plane plane) plane 585 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 599 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_FIR_OFFSET(enum omap_plane plane) plane 601 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 617 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_FIR2_OFFSET(enum omap_plane plane) plane 619 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 637 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane plane) plane 639 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 656 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane plane) plane 658 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 674 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane plane) plane 676 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 694 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane plane) plane 696 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 712 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane plane) plane 714 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 733 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane plane, u16 i) plane 735 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 752 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane plane, u16 i) plane 754 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 773 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane plane, u16 i) plane 775 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 792 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane plane, u16 i) plane 794 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 813 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_CONV_COEF_OFFSET(enum omap_plane plane, u16 i) plane 815 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 831 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane plane, u16 i) plane 833 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 851 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane plane, u16 i) plane 853 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 871 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane) plane 873 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 888 drivers/video/fbdev/omap2/omapfb/dss/dispc.h static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane plane) plane 890 drivers/video/fbdev/omap2/omapfb/dss/dispc.h switch (plane) { plane 395 drivers/video/fbdev/omap2/omapfb/dss/dss.h void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high); plane 396 drivers/video/fbdev/omap2/omapfb/dss/dss.h void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane, plane 440 drivers/video/fbdev/omap2/omapfb/dss/dss.h int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel, plane 445 drivers/video/fbdev/omap2/omapfb/dss/dss.h int dispc_ovl_enable(enum omap_plane plane, bool enable); plane 446 drivers/video/fbdev/omap2/omapfb/dss/dss.h bool dispc_ovl_enabled(enum omap_plane plane); plane 447 drivers/video/fbdev/omap2/omapfb/dss/dss.h void dispc_ovl_set_channel_out(enum omap_plane plane, plane 449 drivers/video/fbdev/omap2/omapfb/dss/dss.h int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, plane 833 drivers/video/fbdev/omap2/omapfb/dss/dss_features.c enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane) plane 835 drivers/video/fbdev/omap2/omapfb/dss/dss_features.c return omap_current_dss_features->supported_color_modes[plane]; plane 839 drivers/video/fbdev/omap2/omapfb/dss/dss_features.c enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane) plane 841 drivers/video/fbdev/omap2/omapfb/dss/dss_features.c return omap_current_dss_features->overlay_caps[plane]; plane 844 drivers/video/fbdev/omap2/omapfb/dss/dss_features.c bool dss_feat_color_mode_supported(enum omap_plane plane, plane 847 drivers/video/fbdev/omap2/omapfb/dss/dss_features.c return omap_current_dss_features->supported_color_modes[plane] & plane 80 drivers/video/fbdev/omap2/omapfb/dss/dss_features.h enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane); plane 81 drivers/video/fbdev/omap2/omapfb/dss/dss_features.h bool dss_feat_color_mode_supported(enum omap_plane plane, plane 441 include/drm/drm_atomic.h struct drm_plane *plane); plane 529 include/drm/drm_atomic.h struct drm_plane *plane) plane 531 include/drm/drm_atomic.h return state->planes[drm_plane_index(plane)].state; plane 544 include/drm/drm_atomic.h struct drm_plane *plane) plane 546 include/drm/drm_atomic.h return state->planes[drm_plane_index(plane)].old_state; plane 559 include/drm/drm_atomic.h struct drm_plane *plane) plane 561 include/drm/drm_atomic.h return state->planes[drm_plane_index(plane)].new_state; plane 655 include/drm/drm_atomic.h struct drm_plane *plane) plane 657 include/drm/drm_atomic.h if (state->planes[drm_plane_index(plane)].state) plane 658 include/drm/drm_atomic.h return state->planes[drm_plane_index(plane)].state; plane 660 include/drm/drm_atomic.h return plane->state; plane 810 include/drm/drm_atomic.h #define for_each_oldnew_plane_in_state(__state, plane, old_plane_state, new_plane_state, __i) \ plane 815 include/drm/drm_atomic.h ((plane) = (__state)->planes[__i].ptr, \ plane 832 include/drm/drm_atomic.h #define for_each_oldnew_plane_in_state_reverse(__state, plane, old_plane_state, new_plane_state, __i) \ plane 837 include/drm/drm_atomic.h ((plane) = (__state)->planes[__i].ptr, \ plane 852 include/drm/drm_atomic.h #define for_each_old_plane_in_state(__state, plane, old_plane_state, __i) \ plane 857 include/drm/drm_atomic.h ((plane) = (__state)->planes[__i].ptr, \ plane 870 include/drm/drm_atomic.h #define for_each_new_plane_in_state(__state, plane, new_plane_state, __i) \ plane 875 include/drm/drm_atomic.h ((plane) = (__state)->planes[__i].ptr, \ plane 110 include/drm/drm_atomic_helper.h int drm_atomic_helper_update_plane(struct drm_plane *plane, plane 118 include/drm/drm_atomic_helper.h int drm_atomic_helper_disable_plane(struct drm_plane *plane, plane 163 include/drm/drm_atomic_helper.h #define drm_atomic_crtc_for_each_plane(plane, crtc) \ plane 164 include/drm/drm_atomic_helper.h drm_for_each_plane_mask(plane, (crtc)->dev, (crtc)->state->plane_mask) plane 176 include/drm/drm_atomic_helper.h #define drm_atomic_crtc_state_for_each_plane(plane, crtc_state) \ plane 177 include/drm/drm_atomic_helper.h drm_for_each_plane_mask(plane, (crtc_state)->state->dev, (crtc_state)->plane_mask) plane 194 include/drm/drm_atomic_helper.h #define drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) \ plane 195 include/drm/drm_atomic_helper.h drm_for_each_plane_mask(plane, (crtc_state)->state->dev, (crtc_state)->plane_mask) \ plane 198 include/drm/drm_atomic_helper.h plane))) plane 51 include/drm/drm_atomic_state_helper.h void __drm_atomic_helper_plane_reset(struct drm_plane *plane, plane 53 include/drm/drm_atomic_state_helper.h void drm_atomic_helper_plane_reset(struct drm_plane *plane); plane 54 include/drm/drm_atomic_state_helper.h void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane, plane 57 include/drm/drm_atomic_state_helper.h drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane); plane 59 include/drm/drm_atomic_state_helper.h void drm_atomic_helper_plane_destroy_state(struct drm_plane *plane, plane 45 include/drm/drm_blend.h int drm_plane_create_alpha_property(struct drm_plane *plane); plane 46 include/drm/drm_blend.h int drm_plane_create_rotation_property(struct drm_plane *plane, plane 52 include/drm/drm_blend.h int drm_plane_create_zpos_property(struct drm_plane *plane, plane 55 include/drm/drm_blend.h int drm_plane_create_zpos_immutable_property(struct drm_plane *plane, plane 59 include/drm/drm_blend.h int drm_plane_create_blend_mode_property(struct drm_plane *plane, plane 67 include/drm/drm_color_mgmt.h int drm_plane_create_color_properties(struct drm_plane *plane, plane 67 include/drm/drm_damage_helper.h void drm_plane_enable_fb_damage_clips(struct drm_plane *plane); plane 9 include/drm/drm_fb_cma_helper.h unsigned int plane); plane 13 include/drm/drm_fb_cma_helper.h unsigned int plane); plane 274 include/drm/drm_fourcc.h int plane) plane 276 include/drm/drm_fourcc.h if (!info || plane >= info->num_planes) plane 279 include/drm/drm_fourcc.h if (plane == 0) plane 296 include/drm/drm_fourcc.h int plane) plane 298 include/drm/drm_fourcc.h if (!info || plane >= info->num_planes) plane 301 include/drm/drm_fourcc.h if (plane == 0) plane 316 include/drm/drm_fourcc.h int plane); plane 318 include/drm/drm_fourcc.h int plane); plane 320 include/drm/drm_fourcc.h int plane, unsigned int buffer_width); plane 296 include/drm/drm_framebuffer.h const struct drm_framebuffer *fb, int plane); plane 298 include/drm/drm_framebuffer.h const struct drm_framebuffer *fb, int plane); plane 16 include/drm/drm_gem_framebuffer_helper.h unsigned int plane); plane 32 include/drm/drm_gem_framebuffer_helper.h int drm_gem_fb_prepare_fb(struct drm_plane *plane, plane 1103 include/drm/drm_modeset_helper_vtables.h int (*prepare_fb)(struct drm_plane *plane, plane 1114 include/drm/drm_modeset_helper_vtables.h void (*cleanup_fb)(struct drm_plane *plane, plane 1153 include/drm/drm_modeset_helper_vtables.h int (*atomic_check)(struct drm_plane *plane, plane 1171 include/drm/drm_modeset_helper_vtables.h void (*atomic_update)(struct drm_plane *plane, plane 1195 include/drm/drm_modeset_helper_vtables.h void (*atomic_disable)(struct drm_plane *plane, plane 1214 include/drm/drm_modeset_helper_vtables.h int (*atomic_async_check)(struct drm_plane *plane, plane 1253 include/drm/drm_modeset_helper_vtables.h void (*atomic_async_update)(struct drm_plane *plane, plane 1262 include/drm/drm_modeset_helper_vtables.h static inline void drm_plane_helper_add(struct drm_plane *plane, plane 1265 include/drm/drm_modeset_helper_vtables.h plane->helper_private = funcs; plane 49 include/drm/drm_plane.h struct drm_plane *plane; plane 264 include/drm/drm_plane.h int (*update_plane)(struct drm_plane *plane, plane 287 include/drm/drm_plane.h int (*disable_plane)(struct drm_plane *plane, plane 297 include/drm/drm_plane.h void (*destroy)(struct drm_plane *plane); plane 309 include/drm/drm_plane.h void (*reset)(struct drm_plane *plane); plane 325 include/drm/drm_plane.h int (*set_property)(struct drm_plane *plane, plane 359 include/drm/drm_plane.h struct drm_plane_state *(*atomic_duplicate_state)(struct drm_plane *plane); plane 369 include/drm/drm_plane.h void (*atomic_destroy_state)(struct drm_plane *plane, plane 414 include/drm/drm_plane.h int (*atomic_set_property)(struct drm_plane *plane, plane 437 include/drm/drm_plane.h int (*atomic_get_property)(struct drm_plane *plane, plane 454 include/drm/drm_plane.h int (*late_register)(struct drm_plane *plane); plane 465 include/drm/drm_plane.h void (*early_unregister)(struct drm_plane *plane); plane 495 include/drm/drm_plane.h bool (*format_mod_supported)(struct drm_plane *plane, uint32_t format, plane 714 include/drm/drm_plane.h struct drm_plane *plane, plane 723 include/drm/drm_plane.h struct drm_plane *plane, plane 728 include/drm/drm_plane.h void drm_plane_cleanup(struct drm_plane *plane); plane 737 include/drm/drm_plane.h static inline unsigned int drm_plane_index(const struct drm_plane *plane) plane 739 include/drm/drm_plane.h return plane->index; plane 746 include/drm/drm_plane.h static inline u32 drm_plane_mask(const struct drm_plane *plane) plane 748 include/drm/drm_plane.h return 1 << drm_plane_index(plane); plane 752 include/drm/drm_plane.h void drm_plane_force_disable(struct drm_plane *plane); plane 754 include/drm/drm_plane.h int drm_mode_plane_set_obj_prop(struct drm_plane *plane, plane 784 include/drm/drm_plane.h #define drm_for_each_plane_mask(plane, dev, plane_mask) \ plane 785 include/drm/drm_plane.h list_for_each_entry((plane), &(dev)->mode_config.plane_list, head) \ plane 786 include/drm/drm_plane.h for_each_if ((plane_mask) & drm_plane_mask(plane)) plane 797 include/drm/drm_plane.h #define drm_for_each_legacy_plane(plane, dev) \ plane 798 include/drm/drm_plane.h list_for_each_entry(plane, &(dev)->mode_config.plane_list, head) \ plane 799 include/drm/drm_plane.h for_each_if (plane->type == DRM_PLANE_TYPE_OVERLAY) plane 808 include/drm/drm_plane.h #define drm_for_each_plane(plane, dev) \ plane 809 include/drm/drm_plane.h list_for_each_entry(plane, &(dev)->mode_config.plane_list, head) plane 41 include/drm/drm_plane_helper.h void drm_primary_helper_destroy(struct drm_plane *plane); plane 164 include/drm/drm_simple_kms_helper.h struct drm_plane plane; plane 78 include/linux/mtd/nand.h unsigned int plane; plane 464 include/linux/mtd/nand.h pos->plane = pos->eraseblock % nand->memorg.planes_per_lun; plane 554 include/linux/mtd/nand.h pos->plane = 0; plane 576 include/linux/mtd/nand.h pos->plane = 0; plane 596 include/linux/mtd/nand.h pos->plane = pos->eraseblock % nand->memorg.planes_per_lun; plane 431 include/media/tpg/v4l2-tpg.h static inline unsigned tpg_g_twopixelsize(const struct tpg_data *tpg, unsigned plane) plane 433 include/media/tpg/v4l2-tpg.h return tpg->twopixelsize[plane]; plane 437 include/media/tpg/v4l2-tpg.h unsigned plane, unsigned x) plane 439 include/media/tpg/v4l2-tpg.h return ((x / tpg->hdownsampling[plane]) & tpg->hmask[plane]) * plane 440 include/media/tpg/v4l2-tpg.h tpg->twopixelsize[plane] / 2; plane 449 include/media/tpg/v4l2-tpg.h unsigned plane, unsigned x) plane 451 include/media/tpg/v4l2-tpg.h return tpg_hdiv(tpg, plane, tpg_hscale(tpg, x)); plane 454 include/media/tpg/v4l2-tpg.h static inline unsigned tpg_g_bytesperline(const struct tpg_data *tpg, unsigned plane) plane 456 include/media/tpg/v4l2-tpg.h return tpg->bytesperline[plane]; plane 459 include/media/tpg/v4l2-tpg.h static inline void tpg_s_bytesperline(struct tpg_data *tpg, unsigned plane, unsigned bpl) plane 464 include/media/tpg/v4l2-tpg.h tpg->bytesperline[plane] = bpl; plane 478 include/media/tpg/v4l2-tpg.h static inline unsigned tpg_g_line_width(const struct tpg_data *tpg, unsigned plane) plane 484 include/media/tpg/v4l2-tpg.h return tpg_g_bytesperline(tpg, plane); plane 494 include/media/tpg/v4l2-tpg.h unsigned plane, unsigned bpl) plane 510 include/media/tpg/v4l2-tpg.h static inline unsigned tpg_calc_plane_size(const struct tpg_data *tpg, unsigned plane) plane 512 include/media/tpg/v4l2-tpg.h if (plane >= tpg_g_planes(tpg)) plane 515 include/media/tpg/v4l2-tpg.h return tpg_g_bytesperline(tpg, plane) * tpg->buf_height / plane 516 include/media/tpg/v4l2-tpg.h tpg->vdownsampling[plane]; plane 892 include/media/videobuf2-core.h unsigned int index, unsigned int plane, unsigned int flags); plane 1084 include/uapi/linux/videodev2.h __u32 plane; plane 770 include/video/omapfb_dss.h enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane); plane 1093 samples/vfio-mdev/mbochs.c struct vfio_device_gfx_plane_info *plane) plane 1101 samples/vfio-mdev/mbochs.c if (plane->flags & VFIO_GFX_PLANE_TYPE_PROBE) { plane 1102 samples/vfio-mdev/mbochs.c if (plane->flags == (VFIO_GFX_PLANE_TYPE_PROBE | plane 1108 samples/vfio-mdev/mbochs.c if (plane->flags != VFIO_GFX_PLANE_TYPE_DMABUF) plane 1111 samples/vfio-mdev/mbochs.c plane->drm_format_mod = 0; plane 1112 samples/vfio-mdev/mbochs.c plane->x_pos = 0; plane 1113 samples/vfio-mdev/mbochs.c plane->y_pos = 0; plane 1114 samples/vfio-mdev/mbochs.c plane->x_hot = 0; plane 1115 samples/vfio-mdev/mbochs.c plane->y_hot = 0; plane 1120 samples/vfio-mdev/mbochs.c if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY) plane 1123 samples/vfio-mdev/mbochs.c plane->drm_format = 0; plane 1124 samples/vfio-mdev/mbochs.c plane->width = 0; plane 1125 samples/vfio-mdev/mbochs.c plane->height = 0; plane 1126 samples/vfio-mdev/mbochs.c plane->stride = 0; plane 1127 samples/vfio-mdev/mbochs.c plane->size = 0; plane 1128 samples/vfio-mdev/mbochs.c plane->dmabuf_id = 0; plane 1140 samples/vfio-mdev/mbochs.c plane->drm_format = dmabuf->mode.drm_format; plane 1141 samples/vfio-mdev/mbochs.c plane->width = dmabuf->mode.width; plane 1142 samples/vfio-mdev/mbochs.c plane->height = dmabuf->mode.height; plane 1143 samples/vfio-mdev/mbochs.c plane->stride = dmabuf->mode.stride; plane 1144 samples/vfio-mdev/mbochs.c plane->size = dmabuf->mode.size; plane 1145 samples/vfio-mdev/mbochs.c plane->dmabuf_id = dmabuf->id; plane 1148 samples/vfio-mdev/mbochs.c if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY && plane 1149 samples/vfio-mdev/mbochs.c mdev_state->active_id != plane->dmabuf_id) { plane 1151 samples/vfio-mdev/mbochs.c mdev_state->active_id, plane->dmabuf_id); plane 1152 samples/vfio-mdev/mbochs.c mdev_state->active_id = plane->dmabuf_id; plane 1261 samples/vfio-mdev/mbochs.c struct vfio_device_gfx_plane_info plane; plane 1266 samples/vfio-mdev/mbochs.c if (copy_from_user(&plane, (void __user *)arg, minsz)) plane 1269 samples/vfio-mdev/mbochs.c if (plane.argsz < minsz) plane 1272 samples/vfio-mdev/mbochs.c ret = mbochs_query_gfx_plane(mdev, &plane); plane 1276 samples/vfio-mdev/mbochs.c if (copy_to_user((void __user *)arg, &plane, minsz)) plane 480 samples/vfio-mdev/mdpy.c struct vfio_device_gfx_plane_info *plane) plane 484 samples/vfio-mdev/mdpy.c if (plane->flags & VFIO_GFX_PLANE_TYPE_PROBE) { plane 485 samples/vfio-mdev/mdpy.c if (plane->flags == (VFIO_GFX_PLANE_TYPE_PROBE | plane 491 samples/vfio-mdev/mdpy.c if (plane->flags != VFIO_GFX_PLANE_TYPE_REGION) plane 494 samples/vfio-mdev/mdpy.c plane->drm_format = mdev_state->type->format; plane 495 samples/vfio-mdev/mdpy.c plane->width = mdev_state->type->width; plane 496 samples/vfio-mdev/mdpy.c plane->height = mdev_state->type->height; plane 497 samples/vfio-mdev/mdpy.c plane->stride = (mdev_state->type->width * plane 499 samples/vfio-mdev/mdpy.c plane->size = mdev_state->memsize; plane 500 samples/vfio-mdev/mdpy.c plane->region_index = MDPY_DISPLAY_REGION; plane 503 samples/vfio-mdev/mdpy.c plane->drm_format_mod = 0; plane 504 samples/vfio-mdev/mdpy.c plane->x_pos = 0; plane 505 samples/vfio-mdev/mdpy.c plane->y_pos = 0; plane 506 samples/vfio-mdev/mdpy.c plane->x_hot = 0; plane 507 samples/vfio-mdev/mdpy.c plane->y_hot = 0; plane 595 samples/vfio-mdev/mdpy.c struct vfio_device_gfx_plane_info plane; plane 600 samples/vfio-mdev/mdpy.c if (copy_from_user(&plane, (void __user *)arg, minsz)) plane 603 samples/vfio-mdev/mdpy.c if (plane.argsz < minsz) plane 606 samples/vfio-mdev/mdpy.c ret = mdpy_query_gfx_plane(mdev, &plane); plane 610 samples/vfio-mdev/mdpy.c if (copy_to_user((void __user *)arg, &plane, minsz))