CREG_AXI_M_UPDT   229 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DMAC_0));
CREG_AXI_M_UPDT   235 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DMAC_1));
CREG_AXI_M_UPDT   253 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HS_CORE));
CREG_AXI_M_UPDT   259 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HS_RTT));
CREG_AXI_M_UPDT   265 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_AXI_TUN));
CREG_AXI_M_UPDT   271 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HDMI_VIDEO));
CREG_AXI_M_UPDT   277 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HDMI_AUDIO));
CREG_AXI_M_UPDT   283 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_USB_HOST));
CREG_AXI_M_UPDT   289 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_ETHERNET));
CREG_AXI_M_UPDT   295 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_SDIO));
CREG_AXI_M_UPDT   301 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_GPU));
CREG_AXI_M_UPDT   307 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DVFS));