CREG_AXI_M_SLV1   227 arch/arc/plat-hsdk/platform.c 	writel(axi_m_slv1, CREG_AXI_M_SLV1(M_DMAC_0));
CREG_AXI_M_SLV1   233 arch/arc/plat-hsdk/platform.c 	writel(axi_m_slv1, CREG_AXI_M_SLV1(M_DMAC_1));
CREG_AXI_M_SLV1   250 arch/arc/plat-hsdk/platform.c 	writel(0x63111111, CREG_AXI_M_SLV1(M_HS_CORE));
CREG_AXI_M_SLV1   256 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV1(M_HS_RTT));
CREG_AXI_M_SLV1   262 arch/arc/plat-hsdk/platform.c 	writel(0x88888888, CREG_AXI_M_SLV1(M_AXI_TUN));
CREG_AXI_M_SLV1   268 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV1(M_HDMI_VIDEO));
CREG_AXI_M_SLV1   274 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV1(M_HDMI_AUDIO));
CREG_AXI_M_SLV1   280 arch/arc/plat-hsdk/platform.c 	writel(0x77999999, CREG_AXI_M_SLV1(M_USB_HOST));
CREG_AXI_M_SLV1   286 arch/arc/plat-hsdk/platform.c 	writel(0x77999999, CREG_AXI_M_SLV1(M_ETHERNET));
CREG_AXI_M_SLV1   292 arch/arc/plat-hsdk/platform.c 	writel(0x77999999, CREG_AXI_M_SLV1(M_SDIO));
CREG_AXI_M_SLV1   298 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV1(M_GPU));
CREG_AXI_M_SLV1   304 arch/arc/plat-hsdk/platform.c 	writel(0x60000000, CREG_AXI_M_SLV1(M_DVFS));