CREG_AXI_M_SLV0 225 arch/arc/plat-hsdk/platform.c writel(0x77777777, CREG_AXI_M_SLV0(M_DMAC_0)); CREG_AXI_M_SLV0 231 arch/arc/plat-hsdk/platform.c writel(0x77777777, CREG_AXI_M_SLV0(M_DMAC_1)); CREG_AXI_M_SLV0 249 arch/arc/plat-hsdk/platform.c writel(0x11111111, CREG_AXI_M_SLV0(M_HS_CORE)); CREG_AXI_M_SLV0 255 arch/arc/plat-hsdk/platform.c writel(0x77777777, CREG_AXI_M_SLV0(M_HS_RTT)); CREG_AXI_M_SLV0 261 arch/arc/plat-hsdk/platform.c writel(0x88888888, CREG_AXI_M_SLV0(M_AXI_TUN)); CREG_AXI_M_SLV0 267 arch/arc/plat-hsdk/platform.c writel(0x77777777, CREG_AXI_M_SLV0(M_HDMI_VIDEO)); CREG_AXI_M_SLV0 273 arch/arc/plat-hsdk/platform.c writel(0x77777777, CREG_AXI_M_SLV0(M_HDMI_AUDIO)); CREG_AXI_M_SLV0 279 arch/arc/plat-hsdk/platform.c writel(0x77777777, CREG_AXI_M_SLV0(M_USB_HOST)); CREG_AXI_M_SLV0 285 arch/arc/plat-hsdk/platform.c writel(0x77777777, CREG_AXI_M_SLV0(M_ETHERNET)); CREG_AXI_M_SLV0 291 arch/arc/plat-hsdk/platform.c writel(0x77777777, CREG_AXI_M_SLV0(M_SDIO)); CREG_AXI_M_SLV0 297 arch/arc/plat-hsdk/platform.c writel(0x77777777, CREG_AXI_M_SLV0(M_GPU)); CREG_AXI_M_SLV0 303 arch/arc/plat-hsdk/platform.c writel(0x00000000, CREG_AXI_M_SLV0(M_DVFS));