CREG_AXI_M_OFT1   228 arch/arc/plat-hsdk/platform.c 	writel(axi_m_oft1, CREG_AXI_M_OFT1(M_DMAC_0));
CREG_AXI_M_OFT1   234 arch/arc/plat-hsdk/platform.c 	writel(axi_m_oft1, CREG_AXI_M_OFT1(M_DMAC_1));
CREG_AXI_M_OFT1   252 arch/arc/plat-hsdk/platform.c 	writel(0x0E543210, CREG_AXI_M_OFT1(M_HS_CORE));
CREG_AXI_M_OFT1   258 arch/arc/plat-hsdk/platform.c 	writel(0x76543210, CREG_AXI_M_OFT1(M_HS_RTT));
CREG_AXI_M_OFT1   264 arch/arc/plat-hsdk/platform.c 	writel(0x76543210, CREG_AXI_M_OFT1(M_AXI_TUN));
CREG_AXI_M_OFT1   270 arch/arc/plat-hsdk/platform.c 	writel(0x76543210, CREG_AXI_M_OFT1(M_HDMI_VIDEO));
CREG_AXI_M_OFT1   276 arch/arc/plat-hsdk/platform.c 	writel(0x76543210, CREG_AXI_M_OFT1(M_HDMI_AUDIO));
CREG_AXI_M_OFT1   282 arch/arc/plat-hsdk/platform.c 	writel(0x76DCBA98, CREG_AXI_M_OFT1(M_USB_HOST));
CREG_AXI_M_OFT1   288 arch/arc/plat-hsdk/platform.c 	writel(0x76DCBA98, CREG_AXI_M_OFT1(M_ETHERNET));
CREG_AXI_M_OFT1   294 arch/arc/plat-hsdk/platform.c 	writel(0x76DCBA98, CREG_AXI_M_OFT1(M_SDIO));
CREG_AXI_M_OFT1   300 arch/arc/plat-hsdk/platform.c 	writel(0x76543210, CREG_AXI_M_OFT1(M_GPU));
CREG_AXI_M_OFT1   306 arch/arc/plat-hsdk/platform.c 	writel(0x00000000, CREG_AXI_M_OFT1(M_DVFS));