pin_mode           34 arch/arm/mach-imx/iomux-imx31.c void mxc_iomux_mode(unsigned int pin_mode)
pin_mode           41 arch/arm/mach-imx/iomux-imx31.c 	reg = IOMUXSW_MUX_CTL + (pin_mode & IOMUX_REG_MASK);
pin_mode           42 arch/arm/mach-imx/iomux-imx31.c 	field = pin_mode & 0x3;
pin_mode           43 arch/arm/mach-imx/iomux-imx31.c 	mode = (pin_mode & IOMUX_MODE_MASK) >> IOMUX_MODE_SHIFT;
pin_mode          134 arch/arm/mach-imx/iomux-mx3.h void mxc_iomux_mode(unsigned int pin_mode);
pin_mode          218 drivers/gpu/drm/i915/selftests/i915_vma.c 		       const struct pin_mode *mode,
pin_mode          224 drivers/gpu/drm/i915/selftests/i915_vma.c 			     const struct pin_mode *mode,
pin_mode          238 drivers/gpu/drm/i915/selftests/i915_vma.c 			      const struct pin_mode *mode,
pin_mode          246 drivers/gpu/drm/i915/selftests/i915_vma.c 			      const struct pin_mode *mode,
pin_mode          255 drivers/gpu/drm/i915/selftests/i915_vma.c 	const struct pin_mode modes[] = {
pin_mode          231 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c 	u8 pin_mode = 0;
pin_mode          259 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c 		pin_mode = MLX5_PIN_MODE_IN;
pin_mode          270 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c 	MLX5_SET(mtpps_reg, in, pin_mode, pin_mode);
pin_mode          297 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c 	u8 pin_mode = 0;
pin_mode          319 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c 		pin_mode = MLX5_PIN_MODE_OUT;
pin_mode          349 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c 	MLX5_SET(mtpps_reg, in, pin_mode, pin_mode);
pin_mode         8864 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM32(reg, mtpps, pin_mode, 0x20, 8, 4);
pin_mode          156 drivers/spi/spi-armada-3700.c 				  unsigned int pin_mode, bool receiving)
pin_mode          164 drivers/spi/spi-armada-3700.c 	switch (pin_mode) {
pin_mode          177 drivers/spi/spi-armada-3700.c 		dev_err(&a3700_spi->master->dev, "wrong pin mode %u", pin_mode);
pin_mode         9282 include/linux/mlx5/mlx5_ifc.h 	u8         pin_mode[0x4];