phylink_set      1178 drivers/net/dsa/b53/b53_common.c 	phylink_set(mask, Autoneg);
phylink_set      1180 drivers/net/dsa/b53/b53_common.c 	phylink_set(mask, Pause);
phylink_set      1181 drivers/net/dsa/b53/b53_common.c 	phylink_set(mask, Asym_Pause);
phylink_set      1190 drivers/net/dsa/b53/b53_common.c 		phylink_set(mask, 1000baseT_Full);
phylink_set      1191 drivers/net/dsa/b53/b53_common.c 		phylink_set(mask, 1000baseT_Half);
phylink_set      1195 drivers/net/dsa/b53/b53_common.c 		phylink_set(mask, 10baseT_Half);
phylink_set      1196 drivers/net/dsa/b53/b53_common.c 		phylink_set(mask, 10baseT_Full);
phylink_set      1197 drivers/net/dsa/b53/b53_common.c 		phylink_set(mask, 100baseT_Half);
phylink_set      1198 drivers/net/dsa/b53/b53_common.c 		phylink_set(mask, 100baseT_Full);
phylink_set       172 drivers/net/dsa/b53/b53_serdes.c 		phylink_set(supported, 2500baseX_Full);
phylink_set       175 drivers/net/dsa/b53/b53_serdes.c 		phylink_set(supported, 1000baseX_Full);
phylink_set       509 drivers/net/dsa/bcm_sf2.c 	phylink_set(mask, Autoneg);
phylink_set       511 drivers/net/dsa/bcm_sf2.c 	phylink_set(mask, Pause);
phylink_set       512 drivers/net/dsa/bcm_sf2.c 	phylink_set(mask, Asym_Pause);
phylink_set       519 drivers/net/dsa/bcm_sf2.c 		phylink_set(mask, 1000baseT_Full);
phylink_set       520 drivers/net/dsa/bcm_sf2.c 		phylink_set(mask, 1000baseT_Half);
phylink_set       523 drivers/net/dsa/bcm_sf2.c 	phylink_set(mask, 10baseT_Half);
phylink_set       524 drivers/net/dsa/bcm_sf2.c 	phylink_set(mask, 10baseT_Full);
phylink_set       525 drivers/net/dsa/bcm_sf2.c 	phylink_set(mask, 100baseT_Half);
phylink_set       526 drivers/net/dsa/bcm_sf2.c 	phylink_set(mask, 100baseT_Full);
phylink_set      1427 drivers/net/dsa/lantiq_gswip.c 	phylink_set(mask, Autoneg);
phylink_set      1429 drivers/net/dsa/lantiq_gswip.c 	phylink_set(mask, Pause);
phylink_set      1430 drivers/net/dsa/lantiq_gswip.c 	phylink_set(mask, Asym_Pause);
phylink_set      1437 drivers/net/dsa/lantiq_gswip.c 		phylink_set(mask, 1000baseT_Full);
phylink_set      1438 drivers/net/dsa/lantiq_gswip.c 		phylink_set(mask, 1000baseT_Half);
phylink_set      1441 drivers/net/dsa/lantiq_gswip.c 	phylink_set(mask, 10baseT_Half);
phylink_set      1442 drivers/net/dsa/lantiq_gswip.c 	phylink_set(mask, 10baseT_Full);
phylink_set      1443 drivers/net/dsa/lantiq_gswip.c 	phylink_set(mask, 100baseT_Half);
phylink_set      1444 drivers/net/dsa/lantiq_gswip.c 	phylink_set(mask, 100baseT_Full);
phylink_set      1448 drivers/net/dsa/mt7530.c 	phylink_set(mask, Autoneg);
phylink_set      1451 drivers/net/dsa/mt7530.c 		phylink_set(mask, 1000baseT_Full);
phylink_set      1453 drivers/net/dsa/mt7530.c 		phylink_set(mask, 10baseT_Half);
phylink_set      1454 drivers/net/dsa/mt7530.c 		phylink_set(mask, 10baseT_Full);
phylink_set      1455 drivers/net/dsa/mt7530.c 		phylink_set(mask, 100baseT_Half);
phylink_set      1456 drivers/net/dsa/mt7530.c 		phylink_set(mask, 100baseT_Full);
phylink_set      1459 drivers/net/dsa/mt7530.c 			phylink_set(mask, 1000baseT_Half);
phylink_set      1460 drivers/net/dsa/mt7530.c 			phylink_set(mask, 1000baseT_Full);
phylink_set      1462 drivers/net/dsa/mt7530.c 				phylink_set(mask, 1000baseX_Full);
phylink_set      1466 drivers/net/dsa/mt7530.c 	phylink_set(mask, Pause);
phylink_set      1467 drivers/net/dsa/mt7530.c 	phylink_set(mask, Asym_Pause);
phylink_set       484 drivers/net/dsa/mv88e6xxx/chip.c 		phylink_set(mask, 10baseT_Half);
phylink_set       485 drivers/net/dsa/mv88e6xxx/chip.c 		phylink_set(mask, 10baseT_Full);
phylink_set       486 drivers/net/dsa/mv88e6xxx/chip.c 		phylink_set(mask, 100baseT_Half);
phylink_set       487 drivers/net/dsa/mv88e6xxx/chip.c 		phylink_set(mask, 100baseT_Full);
phylink_set       498 drivers/net/dsa/mv88e6xxx/chip.c 	phylink_set(mask, 1000baseT_Full);
phylink_set       499 drivers/net/dsa/mv88e6xxx/chip.c 	phylink_set(mask, 1000baseX_Full);
phylink_set       509 drivers/net/dsa/mv88e6xxx/chip.c 		phylink_set(mask, 2500baseX_Full);
phylink_set       512 drivers/net/dsa/mv88e6xxx/chip.c 	phylink_set(mask, 1000baseT_Full);
phylink_set       513 drivers/net/dsa/mv88e6xxx/chip.c 	phylink_set(mask, 1000baseX_Full);
phylink_set       523 drivers/net/dsa/mv88e6xxx/chip.c 	phylink_set(mask, 1000baseT_Full);
phylink_set       524 drivers/net/dsa/mv88e6xxx/chip.c 	phylink_set(mask, 1000baseX_Full);
phylink_set       534 drivers/net/dsa/mv88e6xxx/chip.c 		phylink_set(mask, 2500baseX_Full);
phylink_set       535 drivers/net/dsa/mv88e6xxx/chip.c 		phylink_set(mask, 2500baseT_Full);
phylink_set       539 drivers/net/dsa/mv88e6xxx/chip.c 	phylink_set(mask, 1000baseT_Full);
phylink_set       540 drivers/net/dsa/mv88e6xxx/chip.c 	phylink_set(mask, 1000baseX_Full);
phylink_set       550 drivers/net/dsa/mv88e6xxx/chip.c 		phylink_set(mask, 10000baseT_Full);
phylink_set       551 drivers/net/dsa/mv88e6xxx/chip.c 		phylink_set(mask, 10000baseKR_Full);
phylink_set       565 drivers/net/dsa/mv88e6xxx/chip.c 	phylink_set(mask, Autoneg);
phylink_set       566 drivers/net/dsa/mv88e6xxx/chip.c 	phylink_set(mask, Pause);
phylink_set       865 drivers/net/dsa/sja1105/sja1105_main.c 	phylink_set(mask, Autoneg);
phylink_set       866 drivers/net/dsa/sja1105/sja1105_main.c 	phylink_set(mask, MII);
phylink_set       867 drivers/net/dsa/sja1105/sja1105_main.c 	phylink_set(mask, 10baseT_Full);
phylink_set       868 drivers/net/dsa/sja1105/sja1105_main.c 	phylink_set(mask, 100baseT_Full);
phylink_set       870 drivers/net/dsa/sja1105/sja1105_main.c 		phylink_set(mask, 1000baseT_Full);
phylink_set      3393 drivers/net/ethernet/marvell/mvneta.c 	phylink_set(mask, Autoneg);
phylink_set      3397 drivers/net/ethernet/marvell/mvneta.c 	phylink_set(mask, Pause);
phylink_set      3401 drivers/net/ethernet/marvell/mvneta.c 		phylink_set(mask, 1000baseT_Full);
phylink_set      3402 drivers/net/ethernet/marvell/mvneta.c 		phylink_set(mask, 1000baseX_Full);
phylink_set      3405 drivers/net/ethernet/marvell/mvneta.c 		phylink_set(mask, 2500baseT_Full);
phylink_set      3406 drivers/net/ethernet/marvell/mvneta.c 		phylink_set(mask, 2500baseX_Full);
phylink_set      3411 drivers/net/ethernet/marvell/mvneta.c 		phylink_set(mask, 10baseT_Half);
phylink_set      3412 drivers/net/ethernet/marvell/mvneta.c 		phylink_set(mask, 10baseT_Full);
phylink_set      3413 drivers/net/ethernet/marvell/mvneta.c 		phylink_set(mask, 100baseT_Half);
phylink_set      3414 drivers/net/ethernet/marvell/mvneta.c 		phylink_set(mask, 100baseT_Full);
phylink_set      4773 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	phylink_set(mask, Autoneg);
phylink_set      4775 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	phylink_set(mask, Pause);
phylink_set      4776 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	phylink_set(mask, Asym_Pause);
phylink_set      4783 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			phylink_set(mask, 10000baseT_Full);
phylink_set      4784 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			phylink_set(mask, 10000baseCR_Full);
phylink_set      4785 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			phylink_set(mask, 10000baseSR_Full);
phylink_set      4786 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			phylink_set(mask, 10000baseLR_Full);
phylink_set      4787 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			phylink_set(mask, 10000baseLRM_Full);
phylink_set      4788 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			phylink_set(mask, 10000baseER_Full);
phylink_set      4789 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			phylink_set(mask, 10000baseKR_Full);
phylink_set      4797 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		phylink_set(mask, 10baseT_Half);
phylink_set      4798 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		phylink_set(mask, 10baseT_Full);
phylink_set      4799 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		phylink_set(mask, 100baseT_Half);
phylink_set      4800 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		phylink_set(mask, 100baseT_Full);
phylink_set      4804 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		phylink_set(mask, 1000baseT_Full);
phylink_set      4805 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		phylink_set(mask, 1000baseX_Full);
phylink_set      4806 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		phylink_set(mask, 2500baseT_Full);
phylink_set      4807 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		phylink_set(mask, 2500baseX_Full);
phylink_set       474 drivers/net/ethernet/mediatek/mtk_eth_soc.c 	phylink_set(mask, Autoneg);
phylink_set       478 drivers/net/ethernet/mediatek/mtk_eth_soc.c 		phylink_set(mask, 1000baseT_Full);
phylink_set       482 drivers/net/ethernet/mediatek/mtk_eth_soc.c 		phylink_set(mask, 1000baseX_Full);
phylink_set       483 drivers/net/ethernet/mediatek/mtk_eth_soc.c 		phylink_set(mask, 2500baseX_Full);
phylink_set       490 drivers/net/ethernet/mediatek/mtk_eth_soc.c 		phylink_set(mask, 1000baseT_Half);
phylink_set       493 drivers/net/ethernet/mediatek/mtk_eth_soc.c 		phylink_set(mask, 1000baseT_Full);
phylink_set       494 drivers/net/ethernet/mediatek/mtk_eth_soc.c 		phylink_set(mask, 1000baseX_Full);
phylink_set       501 drivers/net/ethernet/mediatek/mtk_eth_soc.c 		phylink_set(mask, 10baseT_Half);
phylink_set       502 drivers/net/ethernet/mediatek/mtk_eth_soc.c 		phylink_set(mask, 10baseT_Full);
phylink_set       503 drivers/net/ethernet/mediatek/mtk_eth_soc.c 		phylink_set(mask, 100baseT_Half);
phylink_set       504 drivers/net/ethernet/mediatek/mtk_eth_soc.c 		phylink_set(mask, 100baseT_Full);
phylink_set       510 drivers/net/ethernet/mediatek/mtk_eth_soc.c 			phylink_set(mask, 1000baseT_Full);
phylink_set       511 drivers/net/ethernet/mediatek/mtk_eth_soc.c 			phylink_set(mask, 1000baseX_Full);
phylink_set       512 drivers/net/ethernet/mediatek/mtk_eth_soc.c 			phylink_set(mask, 2500baseX_Full);
phylink_set       515 drivers/net/ethernet/mediatek/mtk_eth_soc.c 			phylink_set(mask, 1000baseT_Full);
phylink_set       516 drivers/net/ethernet/mediatek/mtk_eth_soc.c 			phylink_set(mask, 1000baseT_Half);
phylink_set       517 drivers/net/ethernet/mediatek/mtk_eth_soc.c 			phylink_set(mask, 1000baseX_Full);
phylink_set       520 drivers/net/ethernet/mediatek/mtk_eth_soc.c 			phylink_set(mask, 1000baseT_Full);
phylink_set       521 drivers/net/ethernet/mediatek/mtk_eth_soc.c 			phylink_set(mask, 1000baseT_Half);
phylink_set       525 drivers/net/ethernet/mediatek/mtk_eth_soc.c 	phylink_set(mask, Pause);
phylink_set       526 drivers/net/ethernet/mediatek/mtk_eth_soc.c 	phylink_set(mask, Asym_Pause);
phylink_set       819 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 	phylink_set(mac_supported, 10baseT_Half);
phylink_set       820 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 	phylink_set(mac_supported, 10baseT_Full);
phylink_set       821 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 	phylink_set(mac_supported, 100baseT_Half);
phylink_set       822 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 	phylink_set(mac_supported, 100baseT_Full);
phylink_set       823 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 	phylink_set(mac_supported, 1000baseT_Half);
phylink_set       824 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 	phylink_set(mac_supported, 1000baseT_Full);
phylink_set       825 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 	phylink_set(mac_supported, 1000baseKX_Full);
phylink_set       827 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 	phylink_set(mac_supported, Autoneg);
phylink_set       828 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 	phylink_set(mac_supported, Pause);
phylink_set       829 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 	phylink_set(mac_supported, Asym_Pause);
phylink_set       834 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 		phylink_set(mask, 1000baseT_Full);
phylink_set       835 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 		phylink_set(mask, 1000baseX_Full);
phylink_set       838 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 			phylink_set(mac_supported, 2500baseT_Full);
phylink_set       839 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 			phylink_set(mac_supported, 2500baseX_Full);
phylink_set       842 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 			phylink_set(mac_supported, 5000baseT_Full);
phylink_set       845 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 			phylink_set(mac_supported, 10000baseSR_Full);
phylink_set       846 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 			phylink_set(mac_supported, 10000baseLR_Full);
phylink_set       847 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 			phylink_set(mac_supported, 10000baseER_Full);
phylink_set       848 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 			phylink_set(mac_supported, 10000baseLRM_Full);
phylink_set       849 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 			phylink_set(mac_supported, 10000baseT_Full);
phylink_set       850 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 			phylink_set(mac_supported, 10000baseKX4_Full);
phylink_set       851 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 			phylink_set(mac_supported, 10000baseKR_Full);
phylink_set       857 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 		phylink_set(mask, 10baseT_Half);
phylink_set       858 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 		phylink_set(mask, 100baseT_Half);
phylink_set       859 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 		phylink_set(mask, 1000baseT_Half);
phylink_set      1392 drivers/net/ethernet/xilinx/xilinx_axienet_main.c 	phylink_set(mask, Autoneg);
phylink_set      1395 drivers/net/ethernet/xilinx/xilinx_axienet_main.c 	phylink_set(mask, Asym_Pause);
phylink_set      1396 drivers/net/ethernet/xilinx/xilinx_axienet_main.c 	phylink_set(mask, Pause);
phylink_set      1397 drivers/net/ethernet/xilinx/xilinx_axienet_main.c 	phylink_set(mask, 1000baseX_Full);
phylink_set      1398 drivers/net/ethernet/xilinx/xilinx_axienet_main.c 	phylink_set(mask, 10baseT_Full);
phylink_set      1399 drivers/net/ethernet/xilinx/xilinx_axienet_main.c 	phylink_set(mask, 100baseT_Full);
phylink_set      1400 drivers/net/ethernet/xilinx/xilinx_axienet_main.c 	phylink_set(mask, 1000baseT_Full);
phylink_set       118 drivers/net/phy/phylink.c 	phylink_set(mask, TP);
phylink_set       119 drivers/net/phy/phylink.c 	phylink_set(mask, AUI);
phylink_set       120 drivers/net/phy/phylink.c 	phylink_set(mask, MII);
phylink_set       121 drivers/net/phy/phylink.c 	phylink_set(mask, FIBRE);
phylink_set       122 drivers/net/phy/phylink.c 	phylink_set(mask, BNC);
phylink_set       123 drivers/net/phy/phylink.c 	phylink_set(mask, Backplane);
phylink_set       132 drivers/net/phy/phylink.c 	phylink_set(tmp, Autoneg);
phylink_set       133 drivers/net/phy/phylink.c 	phylink_set(tmp, Pause);
phylink_set       134 drivers/net/phy/phylink.c 	phylink_set(tmp, Asym_Pause);
phylink_set       234 drivers/net/phy/phylink.c 	phylink_set(pl->supported, MII);
phylink_set       235 drivers/net/phy/phylink.c 	phylink_set(pl->supported, Pause);
phylink_set       236 drivers/net/phy/phylink.c 	phylink_set(pl->supported, Asym_Pause);
phylink_set       273 drivers/net/phy/phylink.c 		phylink_set(pl->supported, MII);
phylink_set       274 drivers/net/phy/phylink.c 		phylink_set(pl->supported, Autoneg);
phylink_set       275 drivers/net/phy/phylink.c 		phylink_set(pl->supported, Asym_Pause);
phylink_set       276 drivers/net/phy/phylink.c 		phylink_set(pl->supported, Pause);
phylink_set       282 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 10baseT_Half);
phylink_set       283 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 10baseT_Full);
phylink_set       284 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 100baseT_Half);
phylink_set       285 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 100baseT_Full);
phylink_set       286 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 1000baseT_Half);
phylink_set       287 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 1000baseT_Full);
phylink_set       291 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 1000baseX_Full);
phylink_set       295 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 2500baseX_Full);
phylink_set       299 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 10baseT_Half);
phylink_set       300 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 10baseT_Full);
phylink_set       301 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 100baseT_Half);
phylink_set       302 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 100baseT_Full);
phylink_set       303 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 1000baseT_Half);
phylink_set       304 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 1000baseT_Full);
phylink_set       305 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 1000baseX_Full);
phylink_set       306 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 10000baseKR_Full);
phylink_set       307 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 10000baseCR_Full);
phylink_set       308 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 10000baseSR_Full);
phylink_set       309 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 10000baseLR_Full);
phylink_set       310 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 10000baseLRM_Full);
phylink_set       311 drivers/net/phy/phylink.c 			phylink_set(pl->supported, 10000baseER_Full);
phylink_set       741 drivers/net/phy/phylink.c 		phylink_set(config.advertising, Pause);
phylink_set       743 drivers/net/phy/phylink.c 		phylink_set(config.advertising, Asym_Pause);
phylink_set        95 drivers/net/phy/sfp-bus.c 			phylink_set(support, FIBRE);
phylink_set        99 drivers/net/phy/sfp-bus.c 			phylink_set(support, TP);
phylink_set       146 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 10000baseSR_Full);
phylink_set       148 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 10000baseLR_Full);
phylink_set       150 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 10000baseLRM_Full);
phylink_set       152 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 10000baseER_Full);
phylink_set       156 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 1000baseX_Full);
phylink_set       158 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 1000baseT_Half);
phylink_set       159 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 1000baseT_Full);
phylink_set       165 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 1000baseX_Full);
phylink_set       173 drivers/net/phy/sfp-bus.c 			phylink_set(modes, 10000baseCR_Full);
phylink_set       175 drivers/net/phy/sfp-bus.c 			phylink_set(modes, 2500baseX_Full);
phylink_set       177 drivers/net/phy/sfp-bus.c 			phylink_set(modes, 1000baseX_Full);
phylink_set       181 drivers/net/phy/sfp-bus.c 			phylink_set(modes, 10000baseCR_Full);
phylink_set       186 drivers/net/phy/sfp-bus.c 			phylink_set(modes, 10000baseCR_Full);
phylink_set       194 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 100000baseSR4_Full);
phylink_set       195 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 25000baseSR_Full);
phylink_set       199 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 100000baseLR4_ER4_Full);
phylink_set       204 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 100000baseCR4_Full);
phylink_set       205 drivers/net/phy/sfp-bus.c 		phylink_set(modes, 25000baseCR_Full);
phylink_set       219 drivers/net/phy/sfp-bus.c 			phylink_set(modes, 2500baseX_Full);
phylink_set       221 drivers/net/phy/sfp-bus.c 			phylink_set(modes, 1000baseX_Full);
phylink_set       233 drivers/net/phy/sfp-bus.c 			phylink_set(modes, 1000baseX_Full);
phylink_set       238 drivers/net/phy/sfp-bus.c 	phylink_set(support, Autoneg);
phylink_set       239 drivers/net/phy/sfp-bus.c 	phylink_set(support, Pause);
phylink_set       240 drivers/net/phy/sfp-bus.c 	phylink_set(support, Asym_Pause);