phy_query_bb_reg 220 drivers/staging/rtl8188eu/hal/odm.c pDM_Odm->bCckHighPower = (bool)phy_query_bb_reg(adapter, 0x824, BIT(9)); phy_query_bb_reg 221 drivers/staging/rtl8188eu/hal/odm.c pDM_Odm->RFPathRxEnable = (u8)phy_query_bb_reg(adapter, 0xc04, 0x0F); phy_query_bb_reg 310 drivers/staging/rtl8188eu/hal/odm.c pDM_DigTable->CurIGValue = (u8)phy_query_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N); phy_query_bb_reg 520 drivers/staging/rtl8188eu/hal/odm.c ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); phy_query_bb_reg 523 drivers/staging/rtl8188eu/hal/odm.c ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); phy_query_bb_reg 526 drivers/staging/rtl8188eu/hal/odm.c ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); phy_query_bb_reg 529 drivers/staging/rtl8188eu/hal/odm.c ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); phy_query_bb_reg 536 drivers/staging/rtl8188eu/hal/odm.c ret_value = phy_query_bb_reg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord); phy_query_bb_reg 544 drivers/staging/rtl8188eu/hal/odm.c ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); phy_query_bb_reg 546 drivers/staging/rtl8188eu/hal/odm.c ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); phy_query_bb_reg 549 drivers/staging/rtl8188eu/hal/odm.c ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); phy_query_bb_reg 633 drivers/staging/rtl8188eu/hal/odm.c pDM_PSTable->Reg874 = (phy_query_bb_reg(adapter, 0x874, bMaskDWord)&0x1CC000)>>14; phy_query_bb_reg 634 drivers/staging/rtl8188eu/hal/odm.c pDM_PSTable->RegC70 = (phy_query_bb_reg(adapter, 0xc70, bMaskDWord) & BIT(3))>>3; phy_query_bb_reg 635 drivers/staging/rtl8188eu/hal/odm.c pDM_PSTable->Reg85C = (phy_query_bb_reg(adapter, 0x85c, bMaskDWord)&0xFF000000)>>24; phy_query_bb_reg 636 drivers/staging/rtl8188eu/hal/odm.c pDM_PSTable->RegA74 = (phy_query_bb_reg(adapter, 0xa74, bMaskDWord)&0xF000)>>12; phy_query_bb_reg 24 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); phy_query_bb_reg 56 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); phy_query_bb_reg 105 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c value32 = phy_query_bb_reg(adapter, 0x4c, bMaskDWord); phy_query_bb_reg 108 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c value32 = phy_query_bb_reg(adapter, 0x7B4, bMaskDWord); phy_query_bb_reg 64 drivers/staging/rtl8188eu/hal/phy.c tmplong = phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord); phy_query_bb_reg 68 drivers/staging/rtl8188eu/hal/phy.c tmplong2 = phy_query_bb_reg(adapt, phyreg->rfHSSIPara2, phy_query_bb_reg 84 drivers/staging/rtl8188eu/hal/phy.c rfpi_enable = (u8)phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter1, BIT(8)); phy_query_bb_reg 86 drivers/staging/rtl8188eu/hal/phy.c rfpi_enable = (u8)phy_query_bb_reg(adapt, rFPGA0_XB_HSSIParameter1, BIT(8)); phy_query_bb_reg 89 drivers/staging/rtl8188eu/hal/phy.c ret = phy_query_bb_reg(adapt, phyreg->rfLSSIReadBackPi, phy_query_bb_reg 92 drivers/staging/rtl8188eu/hal/phy.c ret = phy_query_bb_reg(adapt, phyreg->rfLSSIReadBack, phy_query_bb_reg 392 drivers/staging/rtl8188eu/hal/phy.c ele_d = phy_query_bb_reg(adapt, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D; phy_query_bb_reg 546 drivers/staging/rtl8188eu/hal/phy.c reg_eac = phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord); phy_query_bb_reg 547 drivers/staging/rtl8188eu/hal/phy.c reg_e94 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, bMaskDWord); phy_query_bb_reg 548 drivers/staging/rtl8188eu/hal/phy.c reg_e9c = phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, bMaskDWord); phy_query_bb_reg 598 drivers/staging/rtl8188eu/hal/phy.c reg_eac = phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord); phy_query_bb_reg 599 drivers/staging/rtl8188eu/hal/phy.c reg_e94 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, bMaskDWord); phy_query_bb_reg 600 drivers/staging/rtl8188eu/hal/phy.c reg_e9c = phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, bMaskDWord); phy_query_bb_reg 641 drivers/staging/rtl8188eu/hal/phy.c reg_eac = phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord); phy_query_bb_reg 642 drivers/staging/rtl8188eu/hal/phy.c reg_e94 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, bMaskDWord); phy_query_bb_reg 643 drivers/staging/rtl8188eu/hal/phy.c reg_e9c = phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, bMaskDWord); phy_query_bb_reg 644 drivers/staging/rtl8188eu/hal/phy.c reg_ea4 = phy_query_bb_reg(adapt, rRx_Power_Before_IQK_A_2, bMaskDWord); phy_query_bb_reg 673 drivers/staging/rtl8188eu/hal/phy.c regeac = phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, bMaskDWord); phy_query_bb_reg 674 drivers/staging/rtl8188eu/hal/phy.c regeb4 = phy_query_bb_reg(adapt, rTx_Power_Before_IQK_B, bMaskDWord); phy_query_bb_reg 675 drivers/staging/rtl8188eu/hal/phy.c regebc = phy_query_bb_reg(adapt, rTx_Power_After_IQK_B, bMaskDWord); phy_query_bb_reg 676 drivers/staging/rtl8188eu/hal/phy.c regec4 = phy_query_bb_reg(adapt, rRx_Power_Before_IQK_B_2, bMaskDWord); phy_query_bb_reg 677 drivers/staging/rtl8188eu/hal/phy.c regecc = phy_query_bb_reg(adapt, rRx_Power_After_IQK_B_2, bMaskDWord); phy_query_bb_reg 705 drivers/staging/rtl8188eu/hal/phy.c oldval_0 = (phy_query_bb_reg(adapt, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; phy_query_bb_reg 751 drivers/staging/rtl8188eu/hal/phy.c oldval_1 = (phy_query_bb_reg(adapt, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; phy_query_bb_reg 795 drivers/staging/rtl8188eu/hal/phy.c backup[i] = phy_query_bb_reg(adapt, addareg[i], bMaskDWord); phy_query_bb_reg 995 drivers/staging/rtl8188eu/hal/phy.c dm_odm->RFCalibrateInfo.bRfPiEnable = (u8)phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter1, phy_query_bb_reg 1040 drivers/staging/rtl8188eu/hal/phy.c result[t][0] = (phy_query_bb_reg(adapt, rTx_Power_Before_IQK_A, phy_query_bb_reg 1042 drivers/staging/rtl8188eu/hal/phy.c result[t][1] = (phy_query_bb_reg(adapt, rTx_Power_After_IQK_A, phy_query_bb_reg 1051 drivers/staging/rtl8188eu/hal/phy.c result[t][2] = (phy_query_bb_reg(adapt, rRx_Power_Before_IQK_A_2, phy_query_bb_reg 1053 drivers/staging/rtl8188eu/hal/phy.c result[t][3] = (phy_query_bb_reg(adapt, rRx_Power_After_IQK_A_2, phy_query_bb_reg 1076 drivers/staging/rtl8188eu/hal/phy.c result[t][4] = (phy_query_bb_reg(adapt, rTx_Power_Before_IQK_B, phy_query_bb_reg 1078 drivers/staging/rtl8188eu/hal/phy.c result[t][5] = (phy_query_bb_reg(adapt, rTx_Power_After_IQK_B, phy_query_bb_reg 1080 drivers/staging/rtl8188eu/hal/phy.c result[t][6] = (phy_query_bb_reg(adapt, rRx_Power_Before_IQK_B_2, phy_query_bb_reg 1082 drivers/staging/rtl8188eu/hal/phy.c result[t][7] = (phy_query_bb_reg(adapt, rRx_Power_After_IQK_B_2, phy_query_bb_reg 1086 drivers/staging/rtl8188eu/hal/phy.c result[t][4] = (phy_query_bb_reg(adapt, rTx_Power_Before_IQK_B, phy_query_bb_reg 1088 drivers/staging/rtl8188eu/hal/phy.c result[t][5] = (phy_query_bb_reg(adapt, rTx_Power_After_IQK_B, phy_query_bb_reg 229 drivers/staging/rtl8188eu/hal/rf_cfg.c u4val = phy_query_bb_reg(adapt, pphyreg->rfintfs, BRFSI_RFENV); phy_query_bb_reg 603 drivers/staging/rtl8188eu/hal/usb_halinit.c if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) phy_query_bb_reg 12 drivers/staging/rtl8188eu/include/phy.h u32 phy_query_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask);