phase              63 arch/mips/include/asm/octeon/cvmx-led-defs.h 		uint64_t phase:7;
phase              65 arch/mips/include/asm/octeon/cvmx-led-defs.h 		uint64_t phase:7;
phase              85 arch/powerpc/include/asm/kvm_book3s_asm.h 		u8	phase[4];
phase             690 arch/powerpc/kvm/book3s_hv_builtin.c static void wait_for_sync(struct kvm_split_mode *sip, int phase)
phase             694 arch/powerpc/kvm/book3s_hv_builtin.c 	sip->lpcr_sync.phase[thr] |= phase;
phase             695 arch/powerpc/kvm/book3s_hv_builtin.c 	phase = ALL(phase);
phase             696 arch/powerpc/kvm/book3s_hv_builtin.c 	while ((sip->lpcr_sync.allphases & phase) != phase) {
phase             363 drivers/block/paride/pd.c static enum action (*phase)(void);
phase             432 drivers/block/paride/pd.c 		if (!phase) {
phase             435 drivers/block/paride/pd.c 			phase = do_pd_io_start;
phase             449 drivers/block/paride/pd.c 		switch(res = phase()) {
phase             456 drivers/block/paride/pd.c 				phase = NULL;
phase             489 drivers/block/paride/pd.c 		phase = pd_special;
phase             553 drivers/block/paride/pd.c 	phase = do_pd_read_drq;
phase             580 drivers/block/paride/pd.c 	phase = do_pd_write_done;
phase             599 drivers/block/paride/pd.c 				phase = do_pd_read_start;
phase             619 drivers/block/paride/pd.c 			phase = do_pd_write_start;
phase             252 drivers/block/swim.c 	swim_write(base, phase, 0xf5);
phase             253 drivers/block/swim.c 	if (swim_read(base, phase) != 0xf5)
phase             255 drivers/block/swim.c 	swim_write(base, phase, 0xf6);
phase             256 drivers/block/swim.c 	if (swim_read(base, phase) != 0xf6)
phase             258 drivers/block/swim.c 	swim_write(base, phase, 0xf7);
phase             259 drivers/block/swim.c 	if (swim_read(base, phase) != 0xf7)
phase             270 drivers/block/swim.c 	swim_write(base, phase, RELAX);
phase             274 drivers/block/swim.c 	swim_write(base, phase, sel & CA_MASK);
phase             285 drivers/block/swim.c 	swim_write(base, phase, (LSTRB<<4) | LSTRB);
phase             287 drivers/block/swim.c 	swim_write(base, phase, (LSTRB<<4) | ((~LSTRB) & 0x0F));
phase              90 drivers/char/ipmi/kcs_bmc.c 	kcs_bmc->phase = KCS_PHASE_ERROR;
phase              99 drivers/char/ipmi/kcs_bmc.c 	switch (kcs_bmc->phase) {
phase             101 drivers/char/ipmi/kcs_bmc.c 		kcs_bmc->phase = KCS_PHASE_WRITE_DATA;
phase             121 drivers/char/ipmi/kcs_bmc.c 			kcs_bmc->phase = KCS_PHASE_WRITE_DONE;
phase             143 drivers/char/ipmi/kcs_bmc.c 			kcs_bmc->phase = KCS_PHASE_IDLE;
phase             155 drivers/char/ipmi/kcs_bmc.c 		kcs_bmc->phase = KCS_PHASE_ABORT_ERROR2;
phase             162 drivers/char/ipmi/kcs_bmc.c 		kcs_bmc->phase = KCS_PHASE_IDLE;
phase             181 drivers/char/ipmi/kcs_bmc.c 		kcs_bmc->phase = KCS_PHASE_WRITE_START;
phase             188 drivers/char/ipmi/kcs_bmc.c 		if (kcs_bmc->phase != KCS_PHASE_WRITE_DATA) {
phase             193 drivers/char/ipmi/kcs_bmc.c 		kcs_bmc->phase = KCS_PHASE_WRITE_END_CMD;
phase             200 drivers/char/ipmi/kcs_bmc.c 		kcs_bmc->phase = KCS_PHASE_ABORT_ERROR1;
phase             320 drivers/char/ipmi/kcs_bmc.c 	if (kcs_bmc->phase == KCS_PHASE_WRITE_DONE) {
phase             321 drivers/char/ipmi/kcs_bmc.c 		kcs_bmc->phase = KCS_PHASE_WAIT_READ;
phase             353 drivers/char/ipmi/kcs_bmc.c 	if (kcs_bmc->phase == KCS_PHASE_WAIT_READ) {
phase             354 drivers/char/ipmi/kcs_bmc.c 		kcs_bmc->phase = KCS_PHASE_READ;
phase              80 drivers/char/ipmi/kcs_bmc.h 	enum kcs_phases phase;
phase             392 drivers/char/ppdev.c 		pp->saved_state.phase = info->phase;
phase             394 drivers/char/ppdev.c 		info->phase = pp->state.phase;
phase             423 drivers/char/ppdev.c 		pp->state.phase = init_phase(mode);
phase             427 drivers/char/ppdev.c 			pp->pdev->port->ieee1284.phase = pp->state.phase;
phase             447 drivers/char/ppdev.c 		int phase;
phase             449 drivers/char/ppdev.c 		if (copy_from_user(&phase, argp, sizeof(phase)))
phase             453 drivers/char/ppdev.c 		pp->state.phase = phase;
phase             456 drivers/char/ppdev.c 			pp->pdev->port->ieee1284.phase = phase;
phase             462 drivers/char/ppdev.c 		int phase;
phase             465 drivers/char/ppdev.c 			phase = pp->pdev->port->ieee1284.phase;
phase             467 drivers/char/ppdev.c 			phase = pp->state.phase;
phase             468 drivers/char/ppdev.c 		if (copy_to_user(argp, &phase, sizeof(phase)))
phase             548 drivers/char/ppdev.c 		pp->state.phase = info->phase;
phase             550 drivers/char/ppdev.c 		info->phase = pp->saved_state.phase;
phase             702 drivers/char/ppdev.c 	pp->state.phase = init_phase(pp->state.mode);
phase             734 drivers/char/ppdev.c 		pp->saved_state.phase = info->phase;
phase             736 drivers/char/ppdev.c 		info->phase = pp->state.phase;
phase             753 drivers/char/ppdev.c 		pp->state.phase = info->phase;
phase             755 drivers/char/ppdev.c 		info->phase = pp->saved_state.phase;
phase              81 drivers/clk/clk.c 	int			phase;
phase            2589 drivers/clk/clk.c 			core->phase = degrees;
phase            2656 drivers/clk/clk.c 		core->phase = ret;
phase            2893 drivers/clk/clk.c 	int phase;
phase            2901 drivers/clk/clk.c 	phase = clk_core_get_phase(c);
phase            2902 drivers/clk/clk.c 	if (phase >= 0)
phase            2903 drivers/clk/clk.c 		seq_printf(s, "%5d", phase);
phase            2944 drivers/clk/clk.c 	int phase;
phase            2958 drivers/clk/clk.c 	phase = clk_core_get_phase(c);
phase            2959 drivers/clk/clk.c 	if (phase >= 0)
phase            2960 drivers/clk/clk.c 		seq_printf(s, "\"phase\": %d,", phase);
phase            3157 drivers/clk/clk.c 	debugfs_create_u32("clk_phase", 0444, root, &core->phase);
phase              30 drivers/clk/hisilicon/clk-hisi-phase.c static int hisi_phase_regval_to_degrees(struct clk_hisi_phase *phase,
phase              35 drivers/clk/hisilicon/clk-hisi-phase.c 	for (i = 0; i < phase->phase_num; i++)
phase              36 drivers/clk/hisilicon/clk-hisi-phase.c 		if (phase->phase_regvals[i] == regval)
phase              37 drivers/clk/hisilicon/clk-hisi-phase.c 			return phase->phase_degrees[i];
phase              44 drivers/clk/hisilicon/clk-hisi-phase.c 	struct clk_hisi_phase *phase = to_clk_hisi_phase(hw);
phase              47 drivers/clk/hisilicon/clk-hisi-phase.c 	regval = readl(phase->reg);
phase              48 drivers/clk/hisilicon/clk-hisi-phase.c 	regval = (regval & phase->mask) >> phase->shift;
phase              50 drivers/clk/hisilicon/clk-hisi-phase.c 	return hisi_phase_regval_to_degrees(phase, regval);
phase              53 drivers/clk/hisilicon/clk-hisi-phase.c static int hisi_phase_degrees_to_regval(struct clk_hisi_phase *phase,
phase              58 drivers/clk/hisilicon/clk-hisi-phase.c 	for (i = 0; i < phase->phase_num; i++)
phase              59 drivers/clk/hisilicon/clk-hisi-phase.c 		if (phase->phase_degrees[i] == degrees)
phase              60 drivers/clk/hisilicon/clk-hisi-phase.c 			return phase->phase_regvals[i];
phase              67 drivers/clk/hisilicon/clk-hisi-phase.c 	struct clk_hisi_phase *phase = to_clk_hisi_phase(hw);
phase              72 drivers/clk/hisilicon/clk-hisi-phase.c 	regval = hisi_phase_degrees_to_regval(phase, degrees);
phase              76 drivers/clk/hisilicon/clk-hisi-phase.c 	spin_lock_irqsave(phase->lock, flags);
phase              78 drivers/clk/hisilicon/clk-hisi-phase.c 	val = readl(phase->reg);
phase              79 drivers/clk/hisilicon/clk-hisi-phase.c 	val &= ~phase->mask;
phase              80 drivers/clk/hisilicon/clk-hisi-phase.c 	val |= regval << phase->shift;
phase              81 drivers/clk/hisilicon/clk-hisi-phase.c 	writel(val, phase->reg);
phase              83 drivers/clk/hisilicon/clk-hisi-phase.c 	spin_unlock_irqrestore(phase->lock, flags);
phase              97 drivers/clk/hisilicon/clk-hisi-phase.c 	struct clk_hisi_phase *phase;
phase             100 drivers/clk/hisilicon/clk-hisi-phase.c 	phase = devm_kzalloc(dev, sizeof(struct clk_hisi_phase), GFP_KERNEL);
phase             101 drivers/clk/hisilicon/clk-hisi-phase.c 	if (!phase)
phase             110 drivers/clk/hisilicon/clk-hisi-phase.c 	phase->reg = base + clks->offset;
phase             111 drivers/clk/hisilicon/clk-hisi-phase.c 	phase->shift = clks->shift;
phase             112 drivers/clk/hisilicon/clk-hisi-phase.c 	phase->mask = (BIT(clks->width) - 1) << clks->shift;
phase             113 drivers/clk/hisilicon/clk-hisi-phase.c 	phase->lock = lock;
phase             114 drivers/clk/hisilicon/clk-hisi-phase.c 	phase->phase_degrees = clks->phase_degrees;
phase             115 drivers/clk/hisilicon/clk-hisi-phase.c 	phase->phase_regvals = clks->phase_regvals;
phase             116 drivers/clk/hisilicon/clk-hisi-phase.c 	phase->phase_num = clks->phase_num;
phase             117 drivers/clk/hisilicon/clk-hisi-phase.c 	phase->hw.init = &init;
phase             119 drivers/clk/hisilicon/clk-hisi-phase.c 	return devm_clk_register(dev, &phase->hw);
phase              40 drivers/clk/meson/clk-phase.c 	struct meson_clk_phase_data *phase = meson_clk_phase_data(clk);
phase              43 drivers/clk/meson/clk-phase.c 	val = meson_parm_read(clk->map, &phase->ph);
phase              45 drivers/clk/meson/clk-phase.c 	return meson_clk_degrees_from_val(val, phase->ph.width);
phase              51 drivers/clk/meson/clk-phase.c 	struct meson_clk_phase_data *phase = meson_clk_phase_data(clk);
phase              54 drivers/clk/meson/clk-phase.c 	val = meson_clk_degrees_to_val(degrees, phase->ph.width);
phase              55 drivers/clk/meson/clk-phase.c 	meson_parm_write(clk->map, &phase->ph, val);
phase              15 drivers/clk/sunxi-ng/ccu_phase.c 	struct ccu_phase *phase = hw_to_ccu_phase(hw);
phase              22 drivers/clk/sunxi-ng/ccu_phase.c 	reg = readl(phase->common.base + phase->common.reg);
phase              23 drivers/clk/sunxi-ng/ccu_phase.c 	delay = (reg >> phase->shift);
phase              24 drivers/clk/sunxi-ng/ccu_phase.c 	delay &= (1 << phase->width) - 1;
phase              58 drivers/clk/sunxi-ng/ccu_phase.c 	struct ccu_phase *phase = hw_to_ccu_phase(hw);
phase             110 drivers/clk/sunxi-ng/ccu_phase.c 	spin_lock_irqsave(phase->common.lock, flags);
phase             111 drivers/clk/sunxi-ng/ccu_phase.c 	reg = readl(phase->common.base + phase->common.reg);
phase             112 drivers/clk/sunxi-ng/ccu_phase.c 	reg &= ~GENMASK(phase->width + phase->shift - 1, phase->shift);
phase             113 drivers/clk/sunxi-ng/ccu_phase.c 	writel(reg | (delay << phase->shift),
phase             114 drivers/clk/sunxi-ng/ccu_phase.c 	       phase->common.base + phase->common.reg);
phase             115 drivers/clk/sunxi-ng/ccu_phase.c 	spin_unlock_irqrestore(phase->common.lock, flags);
phase             175 drivers/clk/sunxi/clk-mod0.c 	struct mmc_phase *phase = to_mmc_phase(hw);
phase             181 drivers/clk/sunxi/clk-mod0.c 	value = readl(phase->reg);
phase             182 drivers/clk/sunxi/clk-mod0.c 	delay = (value >> phase->offset) & 0x3;
phase             217 drivers/clk/sunxi/clk-mod0.c 	struct mmc_phase *phase = to_mmc_phase(hw);
phase             268 drivers/clk/sunxi/clk-mod0.c 	spin_lock_irqsave(phase->lock, flags);
phase             269 drivers/clk/sunxi/clk-mod0.c 	value = readl(phase->reg);
phase             270 drivers/clk/sunxi/clk-mod0.c 	value &= ~GENMASK(phase->offset + 3, phase->offset);
phase             271 drivers/clk/sunxi/clk-mod0.c 	value |= delay << phase->offset;
phase             272 drivers/clk/sunxi/clk-mod0.c 	writel(value, phase->reg);
phase             273 drivers/clk/sunxi/clk-mod0.c 	spin_unlock_irqrestore(phase->lock, flags);
phase             326 drivers/clk/sunxi/clk-mod0.c 		struct mmc_phase *phase;
phase             328 drivers/clk/sunxi/clk-mod0.c 		phase = kmalloc(sizeof(*phase), GFP_KERNEL);
phase             329 drivers/clk/sunxi/clk-mod0.c 		if (!phase)
phase             332 drivers/clk/sunxi/clk-mod0.c 		phase->hw.init = &init;
phase             333 drivers/clk/sunxi/clk-mod0.c 		phase->reg = reg;
phase             334 drivers/clk/sunxi/clk-mod0.c 		phase->lock = lock;
phase             337 drivers/clk/sunxi/clk-mod0.c 			phase->offset = 8;
phase             339 drivers/clk/sunxi/clk-mod0.c 			phase->offset = 20;
phase             345 drivers/clk/sunxi/clk-mod0.c 		clk_data->clks[i] = clk_register(NULL, &phase->hw);
phase             347 drivers/clk/sunxi/clk-mod0.c 			kfree(phase);
phase             186 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 	int phase, pair;
phase             203 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 	for (phase = 0; phase < phases_to_program; phase++) {
phase             212 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 					SCL_C_RAM_PHASE, phase,
phase             292 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c 	int i, phase, pair;
phase             322 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c 	for (phase = 0; phase < phases_to_program; phase++) {
phase             325 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c 		set_reg_field_value(select, phase, SCLV_COEF_RAM_SELECT, SCL_C_RAM_PHASE);
phase             267 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c 	int phase;
phase             276 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c 	for (phase = 0; phase < (NUM_PHASES / 2 + 1); phase++) {
phase             278 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c 			even_coef = filter[phase * taps + 2 * pair];
phase             280 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c 				odd_coef = filter[phase * taps + 2 * pair + 1];
phase             689 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c 	int phase;
phase             693 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c 	for (phase = 0; phase < (NUM_PHASES / 2 + 1); phase++) {
phase             695 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c 			even_coef = filter[phase * taps + 2 * pair];
phase             697 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c 				odd_coef = filter[phase * taps + 2 * pair + 1];
phase             703 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c 				WBSCL_COEF_RAM_PHASE, phase,
phase             273 drivers/gpu/drm/arm/malidp_crtc.c 		u32 phase;
phase             304 drivers/gpu/drm/arm/malidp_crtc.c 		phase = s->input_w;
phase             306 drivers/gpu/drm/arm/malidp_crtc.c 				((phase << SE_N_PHASE) / s->output_w + 1) / 2;
phase             308 drivers/gpu/drm/arm/malidp_crtc.c 		phase = s->input_w;
phase             309 drivers/gpu/drm/arm/malidp_crtc.c 		phase <<= (SE_SHIFT_N_PHASE + SE_N_PHASE);
phase             310 drivers/gpu/drm/arm/malidp_crtc.c 		s->h_delta_phase = phase / s->output_w;
phase             313 drivers/gpu/drm/arm/malidp_crtc.c 		phase = s->input_h;
phase             315 drivers/gpu/drm/arm/malidp_crtc.c 				((phase << SE_N_PHASE) / s->output_h + 1) / 2;
phase             317 drivers/gpu/drm/arm/malidp_crtc.c 		phase = s->input_h;
phase             318 drivers/gpu/drm/arm/malidp_crtc.c 		phase <<= (SE_SHIFT_N_PHASE + SE_N_PHASE);
phase             319 drivers/gpu/drm/arm/malidp_crtc.c 		s->v_delta_phase = phase / s->output_h;
phase            5369 drivers/gpu/drm/i915/display/intel_display.c 	int phase = -0x8000;
phase            5373 drivers/gpu/drm/i915/display/intel_display.c 		phase += (sub - 1) * 0x8000 / sub;
phase            5375 drivers/gpu/drm/i915/display/intel_display.c 	phase += scale / (2 * sub);
phase            5382 drivers/gpu/drm/i915/display/intel_display.c 	WARN_ON(phase < -0x8000 || phase > 0x18000);
phase            5384 drivers/gpu/drm/i915/display/intel_display.c 	if (phase < 0)
phase            5385 drivers/gpu/drm/i915/display/intel_display.c 		phase = 0x10000 + phase;
phase            5389 drivers/gpu/drm/i915/display/intel_display.c 	return ((phase >> 2) & PS_PHASE_MASK) | trip;
phase             186 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	}, **phase;
phase             210 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	for (phase = phases; *phase; phase++) {
phase             213 drivers/gpu/drm/i915/gem/i915_gem_pm.c 		while ((obj = first_mm_object(*phase))) {
phase             230 drivers/gpu/drm/i915/gem/i915_gem_pm.c 		list_splice_tail(&keep, *phase);
phase             161 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 	}, *phase;
phase             211 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 	for (phase = phases; phase->list; phase++) {
phase             216 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 		if ((shrink & phase->bit) == 0)
phase             230 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 		       (obj = list_first_entry_or_null(phase->list,
phase             271 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 		list_splice_tail(&still_in_list, phase->list);
phase            1022 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	} *phase, phases[] = {
phase            1033 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	for (i = 0, phase = phases; ret == 0 && i < ARRAY_SIZE(phases);
phase            1034 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	     i++, phase++)
phase            1035 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		ret = __igt_ctx_sseu(arg, phase->name, phase->flags);
phase            1594 drivers/gpu/drm/i915/gt/selftest_lrc.c 	const unsigned int phase[] = { 0, BATCH };
phase            1641 drivers/gpu/drm/i915/gt/selftest_lrc.c 	for (n = 0; n < ARRAY_SIZE(phase); n++) {
phase            1642 drivers/gpu/drm/i915/gt/selftest_lrc.c 		err = smoke_crescendo(&smoke, phase[n]);
phase            1646 drivers/gpu/drm/i915/gt/selftest_lrc.c 		err = smoke_random(&smoke, phase[n]);
phase            2136 drivers/gpu/drm/i915/gt/selftest_lrc.c 		const struct phase *p;
phase             131 drivers/gpu/drm/i915/gvt/edid.c 	vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;
phase             160 drivers/gpu/drm/i915/gvt/edid.c 	vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;
phase             246 drivers/gpu/drm/i915/gvt/edid.c 				i2c_edid->gmbus.phase = GMBUS_IDLE_PHASE;
phase             258 drivers/gpu/drm/i915/gvt/edid.c 			i2c_edid->gmbus.phase = GMBUS_DATA_PHASE;
phase             315 drivers/gpu/drm/i915/gvt/edid.c 				i2c_edid->gmbus.phase = GMBUS_IDLE_PHASE;
phase             320 drivers/gpu/drm/i915/gvt/edid.c 				i2c_edid->gmbus.phase = GMBUS_WAIT_PHASE;
phase             108 drivers/gpu/drm/i915/gvt/edid.h 	enum gvt_gmbus_phase phase;
phase             505 drivers/gpu/drm/i915/i915_gem_gtt.c 	}, **phase;
phase             508 drivers/gpu/drm/i915/i915_gem_gtt.c 	for (phase = phases; *phase; phase++) {
phase             511 drivers/gpu/drm/i915/i915_gem_gtt.c 		list_for_each_entry_safe(vma, vn, *phase, vm_link)
phase             547 drivers/gpu/drm/i915/selftests/i915_syncmap.c 	unsigned long count, phase, i;
phase             560 drivers/gpu/drm/i915/selftests/i915_syncmap.c 	phase = jiffies + HZ/100 + 1;
phase             569 drivers/gpu/drm/i915/selftests/i915_syncmap.c 	} while (!time_after(jiffies, phase));
phase             572 drivers/gpu/drm/i915/selftests/i915_syncmap.c 	phase = 0;
phase             596 drivers/gpu/drm/i915/selftests/i915_syncmap.c 		phase++;
phase             598 drivers/gpu/drm/i915/selftests/i915_syncmap.c 	pr_debug("Completed %lu passes, each of %lu contexts\n", phase, count);
phase             115 drivers/gpu/drm/meson/meson_overlay.c static void meson_overlay_get_vertical_phase(unsigned int ratio_y, int *phase,
phase             130 drivers/gpu/drm/meson/meson_overlay.c 	*phase = (offset_out - offset_in) >> 2;
phase             132 drivers/gpu/drm/meson/meson_overlay.c 	if (*phase > 0x100)
phase             135 drivers/gpu/drm/meson/meson_overlay.c 	*phase = *phase & 0xff;
phase             114 drivers/gpu/drm/sun4i/sun4i_tcon.h #define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase)		((phase & 3) << 28)
phase              60 drivers/greybus/arpc.h 	__u8 phase;
phase             534 drivers/greybus/connection.c 					    u8 phase)
phase             548 drivers/greybus/connection.c 	req->phase = phase;
phase             558 drivers/greybus/connection.c 					u8 phase)
phase             571 drivers/greybus/connection.c 		ret = drv->cport_shutdown(hd, connection->hd_cport_id, phase,
phase             574 drivers/greybus/connection.c 		ret = gb_connection_shutdown_operation(connection, phase);
phase             579 drivers/greybus/connection.c 			connection->name, phase, ret);
phase             624 drivers/greybus/es2.c 			      u8 phase, unsigned int timeout)
phase             637 drivers/greybus/es2.c 	req.phase = phase;
phase            1909 drivers/hid/hid-logitech-hidpp.c 		params[12] = effect->u.periodic.phase >> 8;
phase            1910 drivers/hid/hid-logitech-hidpp.c 		params[13] = effect->u.periodic.phase & 255;
phase            1922 drivers/hid/hid-logitech-hidpp.c 				effect->u.periodic.phase);
phase             345 drivers/hid/usbhid/hid-pidff.c 	pidff_set(&pidff->set_periodic[PID_PHASE], effect->u.periodic.phase);
phase             361 drivers/hid/usbhid/hid-pidff.c 	       effect->u.periodic.phase != old->u.periodic.phase ||
phase            2616 drivers/infiniband/hw/bnxt_re/ib_verbs.c 		resp.phase = cq->qplib_cq.period;
phase             153 drivers/infiniband/hw/efa/efa_com.c 	sq->phase = 1;
phase             190 drivers/infiniband/hw/efa/efa_com.c 	cq->phase = 1;
phase             232 drivers/infiniband/hw/efa/efa_com.c 	aenq->phase = 1;
phase             338 drivers/infiniband/hw/efa/efa_com.c 	cmd->aq_common_descriptor.flags |= aq->sq.phase &
phase             362 drivers/infiniband/hw/efa/efa_com.c 		aq->sq.phase = !aq->sq.phase;
phase             455 drivers/infiniband/hw/efa/efa_com.c 	u8 phase;
phase             461 drivers/infiniband/hw/efa/efa_com.c 	phase = aq->cq.phase;
phase             467 drivers/infiniband/hw/efa/efa_com.c 		EFA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK) == phase) {
phase             479 drivers/infiniband/hw/efa/efa_com.c 			phase = !phase;
phase             486 drivers/infiniband/hw/efa/efa_com.c 	aq->cq.phase = phase;
phase             854 drivers/infiniband/hw/efa/efa_com.c 	u8 phase;
phase             858 drivers/infiniband/hw/efa/efa_com.c 	phase = aenq->phase;
phase             864 drivers/infiniband/hw/efa/efa_com.c 		EFA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK) == phase) {
phase             882 drivers/infiniband/hw/efa/efa_com.c 			phase = !phase;
phase             889 drivers/infiniband/hw/efa/efa_com.c 	aenq->phase = phase;
phase              30 drivers/infiniband/hw/efa/efa_com.h 	u8 phase;
phase              42 drivers/infiniband/hw/efa/efa_com.h 	u8 phase;
phase              90 drivers/infiniband/hw/efa/efa_com.h 	u8 phase;
phase             320 drivers/infiniband/hw/ocrdma/ocrdma.h 	u32 phase;
phase             502 drivers/infiniband/hw/ocrdma/ocrdma.h 	return (cqe_valid == cq->phase);
phase            3133 drivers/infiniband/hw/ocrdma/ocrdma_hw.c 		cmd->cmd.set_eqd[i].phase = 0;
phase             343 drivers/infiniband/hw/ocrdma/ocrdma_sli.h 	u32 phase;
phase            1018 drivers/infiniband/hw/ocrdma/ocrdma_verbs.c 	cq->phase = OCRDMA_CQE_VALID;
phase            2760 drivers/infiniband/hw/ocrdma/ocrdma_verbs.c 			cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
phase              72 drivers/input/ff-core.c 		effect->u.periodic.phase = 0;
phase              30 drivers/input/input-compat.h 	__u16 phase;
phase              50 drivers/input/joystick/iforce/iforce-ff.c 	__s16 magnitude, __s16 offset, u16 period, u16 phase)
phase              72 drivers/input/joystick/iforce/iforce-ff.c 	data[4] = HI(phase);
phase             269 drivers/input/joystick/iforce/iforce-ff.c 		|| old->u.periodic.phase != new->u.periodic.phase);
phase             353 drivers/input/joystick/iforce/iforce-ff.c 			effect->u.periodic.period, effect->u.periodic.phase);
phase              26 drivers/leds/trigger/ledtrig-heartbeat.c 	unsigned int phase;
phase              51 drivers/leds/trigger/ledtrig-heartbeat.c 	switch (heartbeat_data->phase) {
phase              64 drivers/leds/trigger/ledtrig-heartbeat.c 		heartbeat_data->phase++;
phase              70 drivers/leds/trigger/ledtrig-heartbeat.c 		heartbeat_data->phase++;
phase              76 drivers/leds/trigger/ledtrig-heartbeat.c 		heartbeat_data->phase++;
phase              83 drivers/leds/trigger/ledtrig-heartbeat.c 		heartbeat_data->phase = 0;
phase             139 drivers/leds/trigger/ledtrig-heartbeat.c 	heartbeat_data->phase = 0;
phase             407 drivers/media/pci/pt1/pt1.c 	int phase;
phase             409 drivers/media/pci/pt1/pt1.c 	phase = pt1->pdev->device == 0x211a ? 128 : 166;
phase             410 drivers/media/pci/pt1/pt1.c 	for (i = 0; i < phase; i++) {
phase              94 drivers/mmc/host/dw_mmc-rockchip.c 		int phase;
phase             102 drivers/mmc/host/dw_mmc-rockchip.c 		phase = 90;
phase             112 drivers/mmc/host/dw_mmc-rockchip.c 				phase = 180;
phase             124 drivers/mmc/host/dw_mmc-rockchip.c 			phase = 180;
phase             128 drivers/mmc/host/dw_mmc-rockchip.c 		clk_set_phase(priv->drv_clk, phase);
phase             371 drivers/mmc/host/sdhci-msm.c static int msm_config_cm_dll_phase(struct sdhci_host *host, u8 phase)
phase             384 drivers/mmc/host/sdhci-msm.c 	if (phase > 0xf)
phase             405 drivers/mmc/host/sdhci-msm.c 	config |= grey_coded_phase_table[phase] << CDR_SELEXT_SHIFT;
phase             425 drivers/mmc/host/sdhci-msm.c 	       mmc_hostname(mmc), phase);
phase            1100 drivers/mmc/host/sdhci-msm.c 	u8 phase, tuned_phases[16], tuned_phase_cnt = 0;
phase            1138 drivers/mmc/host/sdhci-msm.c 	phase = 0;
phase            1141 drivers/mmc/host/sdhci-msm.c 		rc = msm_config_cm_dll_phase(host, phase);
phase            1148 drivers/mmc/host/sdhci-msm.c 			tuned_phases[tuned_phase_cnt++] = phase;
phase            1150 drivers/mmc/host/sdhci-msm.c 				 mmc_hostname(mmc), phase);
phase            1152 drivers/mmc/host/sdhci-msm.c 	} while (++phase < ARRAY_SIZE(tuned_phases));
phase            1160 drivers/mmc/host/sdhci-msm.c 			phase = rc;
phase            1166 drivers/mmc/host/sdhci-msm.c 		rc = msm_config_cm_dll_phase(host, phase);
phase            1169 drivers/mmc/host/sdhci-msm.c 		msm_host->saved_tuning_phase = phase;
phase            1171 drivers/mmc/host/sdhci-msm.c 			 mmc_hostname(mmc), phase);
phase            1498 drivers/mmc/host/sdhci-pci-core.c static void amd_config_tuning_phase(struct pci_dev *pdev, u8 phase)
phase            1504 drivers/mmc/host/sdhci-pci-core.c 	val |= (AMD_AUTO_TUNE_SEL | (phase << 1));
phase              77 drivers/mmc/host/sdhci-sirf.c 	int phase;
phase              88 drivers/mmc/host/sdhci-sirf.c 	phase = 0;
phase              92 drivers/mmc/host/sdhci-sirf.c 			clock_setting | phase,
phase              99 drivers/mmc/host/sdhci-sirf.c 				 mmc_hostname(mmc), phase);
phase             101 drivers/mmc/host/sdhci-sirf.c 				start = phase;
phase             102 drivers/mmc/host/sdhci-sirf.c 			end = phase;
phase             104 drivers/mmc/host/sdhci-sirf.c 			if (phase == (SIRF_TUNING_COUNT - 1)
phase             109 drivers/mmc/host/sdhci-sirf.c 				 mmc_hostname(mmc), phase);
phase             117 drivers/mmc/host/sdhci-sirf.c 	} while (++phase < SIRF_TUNING_COUNT);
phase             124 drivers/mmc/host/sdhci-sirf.c 		phase = tuning_value;
phase             126 drivers/mmc/host/sdhci-sirf.c 			clock_setting | phase,
phase             130 drivers/mmc/host/sdhci-sirf.c 			 mmc_hostname(mmc), phase);
phase             408 drivers/net/dsa/sja1105/sja1105_clocking.c static inline u64 sja1105_rgmii_delay(u64 phase)
phase             414 drivers/net/dsa/sja1105/sja1105_clocking.c 	phase *= 10;
phase             415 drivers/net/dsa/sja1105/sja1105_clocking.c 	return (phase - 738) / 9;
phase             124 drivers/net/ethernet/amazon/ena/ena_com.c 	sq->phase = 1;
phase             145 drivers/net/ethernet/amazon/ena/ena_com.c 	cq->phase = 1;
phase             168 drivers/net/ethernet/amazon/ena/ena_com.c 	aenq->phase = 1;
phase             252 drivers/net/ethernet/amazon/ena/ena_com.c 	cmd->aq_common_descriptor.flags |= admin_queue->sq.phase &
phase             278 drivers/net/ethernet/amazon/ena/ena_com.c 		admin_queue->sq.phase = !admin_queue->sq.phase;
phase             412 drivers/net/ethernet/amazon/ena/ena_com.c 	io_sq->phase = 1;
phase             452 drivers/net/ethernet/amazon/ena/ena_com.c 	io_cq->phase = 1;
phase             489 drivers/net/ethernet/amazon/ena/ena_com.c 	u8 phase;
phase             492 drivers/net/ethernet/amazon/ena/ena_com.c 	phase = admin_queue->cq.phase;
phase             498 drivers/net/ethernet/amazon/ena/ena_com.c 		ENA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK) == phase) {
phase             509 drivers/net/ethernet/amazon/ena/ena_com.c 			phase = !phase;
phase             516 drivers/net/ethernet/amazon/ena/ena_com.c 	admin_queue->cq.phase = phase;
phase            2019 drivers/net/ethernet/amazon/ena/ena_com.c 	u8 phase;
phase            2022 drivers/net/ethernet/amazon/ena/ena_com.c 	phase = aenq->phase;
phase            2028 drivers/net/ethernet/amazon/ena/ena_com.c 		ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK) == phase) {
phase            2051 drivers/net/ethernet/amazon/ena/ena_com.c 			phase = !phase;
phase            2058 drivers/net/ethernet/amazon/ena/ena_com.c 	aenq->phase = phase;
phase             162 drivers/net/ethernet/amazon/ena/ena_com.h 	u8 phase;
phase             204 drivers/net/ethernet/amazon/ena/ena_com.h 	u8 phase;
phase             215 drivers/net/ethernet/amazon/ena/ena_com.h 	u8 phase;
phase             226 drivers/net/ethernet/amazon/ena/ena_com.h 	u8 phase;
phase             271 drivers/net/ethernet/amazon/ena/ena_com.h 	u8 phase;
phase              43 drivers/net/ethernet/amazon/ena/ena_eth_com.c 	expected_phase = io_cq->phase;
phase             109 drivers/net/ethernet/amazon/ena/ena_eth_com.c 		io_sq->phase ^= 1;
phase             237 drivers/net/ethernet/amazon/ena/ena_eth_com.c 		io_sq->phase ^= 1;
phase             313 drivers/net/ethernet/amazon/ena/ena_eth_com.c 	meta_desc->len_ctrl |= (io_sq->phase <<
phase             432 drivers/net/ethernet/amazon/ena/ena_eth_com.c 	desc->len_ctrl |= (io_sq->phase << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) &
phase             484 drivers/net/ethernet/amazon/ena/ena_eth_com.c 			desc->len_ctrl |= (io_sq->phase <<
phase             583 drivers/net/ethernet/amazon/ena/ena_eth_com.c 	desc->ctrl |= io_sq->phase & ENA_ETH_IO_RX_DESC_PHASE_MASK;
phase             239 drivers/net/ethernet/amazon/ena/ena_eth_com.h 		io_cq->phase ^= 1;
phase             250 drivers/net/ethernet/amazon/ena/ena_eth_com.h 	expected_phase = io_cq->phase;
phase            1331 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	    drv_fwhdr->fwver.phase == fwhdr_to_cmp->fwver.phase &&
phase            1350 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	if (fwhdr->fwver.phase == 0 &&
phase            1382 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	if (fwhdr_to_cmp->fwver.phase > base_fwhdr->fwver.phase)
phase            1384 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	else if (fwhdr_to_cmp->fwver.phase < base_fwhdr->fwver.phase)
phase             239 drivers/net/ethernet/brocade/bna/bfi.h 	u8 phase;
phase             245 drivers/net/ethernet/brocade/bna/bfi.h 	u8 phase;
phase            1915 drivers/net/ethernet/emulex/benet/be_cmds.c 		req->set_eqd[i].phase = 0;
phase             382 drivers/net/ethernet/emulex/benet/be_cmds.h 	u8 phase[2];		/* dword 2*/
phase            1159 drivers/net/ethernet/emulex/benet/be_cmds.h 	u32 phase;
phase             848 drivers/net/ethernet/qlogic/qed/qed_hw.c 		    struct qed_ptt *p_ptt, const char *phase)
phase             861 drivers/net/ethernet/qlogic/qed/qed_hw.c 			  phase);
phase             879 drivers/net/ethernet/qlogic/qed/qed_hw.c 		   phase,
phase             888 drivers/net/ethernet/qlogic/qed/qed_hw.c 			  phase, rc);
phase             901 drivers/net/ethernet/qlogic/qed/qed_hw.c 				  phase,
phase             316 drivers/net/ethernet/qlogic/qed/qed_hw.h 		    struct qed_ptt *p_ptt, const char *phase);
phase             477 drivers/net/ethernet/qlogic/qed/qed_init_ops.c 			      u32 phase, u32 phase_id)
phase             482 drivers/net/ethernet/qlogic/qed/qed_init_ops.c 	if (!(GET_FIELD(data, INIT_IF_PHASE_OP_PHASE) == phase &&
phase             491 drivers/net/ethernet/qlogic/qed/qed_init_ops.c 		 struct qed_ptt *p_ptt, int phase, int phase_id, int modes)
phase             524 drivers/net/ethernet/qlogic/qed/qed_init_ops.c 						      phase, phase_id);
phase              61 drivers/net/ethernet/qlogic/qed/qed_init_ops.h 		 int phase,
phase              42 drivers/net/phy/mdio-cavium.h 	  OCT_MDIO_BITFIELD_FIELD(u64 phase:8,
phase             893 drivers/net/wireless/ath/ath9k/ar9003_calib.c 	int magnitude, phase;
phase             943 drivers/net/wireless/ath/ath9k/ar9003_calib.c 			phase = coeff->phs_coeff[i][im][0];
phase             946 drivers/net/wireless/ath/ath9k/ar9003_calib.c 				(phase & 0x7f) | ((magnitude & 0x7f) << 7);
phase             941 drivers/net/wireless/realtek/rtw88/coex.c static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase)
phase             949 drivers/net/wireless/realtek/rtw88/coex.c 	if (!force && coex_dm->cur_ant_pos_type == phase)
phase             952 drivers/net/wireless/realtek/rtw88/coex.c 	coex_dm->cur_ant_pos_type = phase;
phase             957 drivers/net/wireless/realtek/rtw88/coex.c 	switch (phase) {
phase             248 drivers/parport/ieee1284.c 		if (port->ieee1284.phase != IEEE1284_PH_FWD_IDLE) {
phase             267 drivers/parport/ieee1284.c 			port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase             305 drivers/parport/ieee1284.c 	port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase             374 drivers/parport/ieee1284.c 	port->ieee1284.phase = IEEE1284_PH_NEGOTIATION;
phase             412 drivers/parport/ieee1284.c 		port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase             513 drivers/parport/ieee1284.c 		port->ieee1284.phase = IEEE1284_PH_ECP_SETUP;
phase             529 drivers/parport/ieee1284.c 		port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase             535 drivers/parport/ieee1284.c 		port->ieee1284.phase = IEEE1284_PH_REV_IDLE;
phase             538 drivers/parport/ieee1284.c 		port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase             561 drivers/parport/ieee1284.c 	port->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL;
phase             573 drivers/parport/ieee1284.c 	if (port->ieee1284.phase == IEEE1284_PH_REV_IDLE) {
phase              58 drivers/parport/ieee1284_ops.c 	port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA;
phase             144 drivers/parport/ieee1284_ops.c 	port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase             177 drivers/parport/ieee1284_ops.c 		port->ieee1284.phase = IEEE1284_PH_REV_DATA;
phase             230 drivers/parport/ieee1284_ops.c 			port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE;
phase             233 drivers/parport/ieee1284_ops.c 			port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL;
phase             268 drivers/parport/ieee1284_ops.c 		port->physport->ieee1284.phase = IEEE1284_PH_REV_DATA;
phase             318 drivers/parport/ieee1284_ops.c 			port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE;
phase             321 drivers/parport/ieee1284_ops.c 			port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL;
phase             358 drivers/parport/ieee1284_ops.c 		port->ieee1284.phase = IEEE1284_PH_REV_IDLE;
phase             362 drivers/parport/ieee1284_ops.c 		port->ieee1284.phase = IEEE1284_PH_ECP_DIR_UNKNOWN;
phase             389 drivers/parport/ieee1284_ops.c 		port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase             394 drivers/parport/ieee1284_ops.c 		port->ieee1284.phase = IEEE1284_PH_ECP_DIR_UNKNOWN;
phase             417 drivers/parport/ieee1284_ops.c 	if (port->ieee1284.phase != IEEE1284_PH_FWD_IDLE)
phase             421 drivers/parport/ieee1284_ops.c 	port->ieee1284.phase = IEEE1284_PH_FWD_DATA;
phase             484 drivers/parport/ieee1284_ops.c 	port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase             506 drivers/parport/ieee1284_ops.c 	if (port->ieee1284.phase != IEEE1284_PH_REV_IDLE)
phase             510 drivers/parport/ieee1284_ops.c 	port->ieee1284.phase = IEEE1284_PH_REV_DATA;
phase             633 drivers/parport/ieee1284_ops.c 	port->ieee1284.phase = IEEE1284_PH_REV_IDLE;
phase             652 drivers/parport/ieee1284_ops.c 	if (port->ieee1284.phase != IEEE1284_PH_FWD_IDLE)
phase             656 drivers/parport/ieee1284_ops.c 	port->ieee1284.phase = IEEE1284_PH_FWD_DATA;
phase             720 drivers/parport/ieee1284_ops.c 	port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase            1639 drivers/parport/parport_ip32.c 	physport->ieee1284.phase = IEEE1284_PH_FWD_DATA;
phase            1669 drivers/parport/parport_ip32.c 	physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase            1700 drivers/parport/parport_ip32.c 	if (physport->ieee1284.phase != IEEE1284_PH_FWD_IDLE) {
phase            1709 drivers/parport/parport_ip32.c 			physport->ieee1284.phase = IEEE1284_PH_ECP_DIR_UNKNOWN;
phase            1720 drivers/parport/parport_ip32.c 	physport->ieee1284.phase = IEEE1284_PH_FWD_DATA;
phase            1750 drivers/parport/parport_ip32.c 	physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase             732 drivers/parport/parport_pc.c 	port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA;
phase             777 drivers/parport/parport_pc.c 	port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase             800 drivers/parport/parport_pc.c 	if (port->physport->ieee1284.phase != IEEE1284_PH_FWD_IDLE) {
phase             828 drivers/parport/parport_pc.c 	port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA;
phase             892 drivers/parport/parport_pc.c 	port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase             202 drivers/parport/probe.c 		if (port->physport->ieee1284.phase != IEEE1284_PH_HBUSY_DAVAIL) {
phase             487 drivers/parport/share.c 	tmp->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
phase            3981 drivers/scsi/FlashPoint.c 	void (*phase) (u32, unsigned char);
phase            3988 drivers/scsi/FlashPoint.c 	phase = FPT_s_PhaseTbl[phase_ref];
phase            3990 drivers/scsi/FlashPoint.c 	(*phase) (p_port, p_card);	/* Call the correct phase func */
phase             750 drivers/scsi/NCR5380.c 		p = hostdata->connected->SCp.phase;
phase             954 drivers/scsi/NCR5380.c 	unsigned char tmp[3], phase;
phase            1185 drivers/scsi/NCR5380.c 	phase = PHASE_MSGOUT;
phase            1186 drivers/scsi/NCR5380.c 	NCR5380_transfer_pio(instance, &phase, &len, &data);
phase            1242 drivers/scsi/NCR5380.c 				unsigned char *phase, int *count,
phase            1246 drivers/scsi/NCR5380.c 	unsigned char p = *phase, tmp;
phase            1344 drivers/scsi/NCR5380.c 		*phase = tmp & PHASE_MASK;
phase            1346 drivers/scsi/NCR5380.c 		*phase = PHASE_UNKNOWN;
phase            1348 drivers/scsi/NCR5380.c 	if (!c || (*phase == p))
phase            1392 drivers/scsi/NCR5380.c 	unsigned char *msgptr, phase, tmp;
phase            1429 drivers/scsi/NCR5380.c 	phase = PHASE_MSGOUT;
phase            1430 drivers/scsi/NCR5380.c 	NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
phase            1464 drivers/scsi/NCR5380.c 				unsigned char *phase, int *count,
phase            1469 drivers/scsi/NCR5380.c 	unsigned char p = *phase;
phase            1475 drivers/scsi/NCR5380.c 		*phase = tmp;
phase            1479 drivers/scsi/NCR5380.c 	hostdata->connected->SCp.phase = p;
phase            1663 drivers/scsi/NCR5380.c 	unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
phase            1676 drivers/scsi/NCR5380.c 			phase = (tmp & PHASE_MASK);
phase            1677 drivers/scsi/NCR5380.c 			if (phase != old_phase) {
phase            1678 drivers/scsi/NCR5380.c 				old_phase = phase;
phase            1682 drivers/scsi/NCR5380.c 			if (phase == PHASE_CMDOUT &&
phase            1705 drivers/scsi/NCR5380.c 			if (sink && (phase != PHASE_MSGOUT)) {
phase            1718 drivers/scsi/NCR5380.c 			switch (phase) {
phase            1758 drivers/scsi/NCR5380.c 					if (NCR5380_transfer_dma(instance, &phase,
phase            1778 drivers/scsi/NCR5380.c 					NCR5380_transfer_pio(instance, &phase, &len,
phase            1790 drivers/scsi/NCR5380.c 				NCR5380_transfer_pio(instance, &phase, &len, &data);
phase            1894 drivers/scsi/NCR5380.c 					phase = PHASE_MSGIN;
phase            1895 drivers/scsi/NCR5380.c 					NCR5380_transfer_pio(instance, &phase, &len, &data);
phase            1906 drivers/scsi/NCR5380.c 						phase = PHASE_MSGIN;
phase            1908 drivers/scsi/NCR5380.c 						NCR5380_transfer_pio(instance, &phase, &len, &data);
phase            1955 drivers/scsi/NCR5380.c 				NCR5380_transfer_pio(instance, &phase, &len, &data);
phase            1974 drivers/scsi/NCR5380.c 				NCR5380_transfer_pio(instance, &phase, &len, &data);
phase            1979 drivers/scsi/NCR5380.c 				NCR5380_transfer_pio(instance, &phase, &len, &data);
phase            2069 drivers/scsi/NCR5380.c 		unsigned char phase = PHASE_MSGIN;
phase            2071 drivers/scsi/NCR5380.c 		NCR5380_transfer_pio(instance, &phase, &len, &data);
phase             189 drivers/scsi/NCR5380.h #define PHASE_SR_TO_TCR(phase) ((phase) >> 2)
phase             279 drivers/scsi/NCR5380.h static int NCR5380_transfer_dma(struct Scsi_Host *instance, unsigned char *phase, int *count, unsigned char **data);
phase             280 drivers/scsi/NCR5380.h static int NCR5380_transfer_pio(struct Scsi_Host *instance, unsigned char *phase, int *count, unsigned char **data);
phase             341 drivers/scsi/aacraid/aachba.c 	scsicmd->SCp.phase = AAC_OWNER_MIDLEVEL;
phase             583 drivers/scsi/aacraid/aachba.c 	scsicmd->SCp.phase = AAC_OWNER_FIRMWARE;
phase             713 drivers/scsi/aacraid/aachba.c 	scsicmd->SCp.phase = AAC_OWNER_FIRMWARE;
phase             753 drivers/scsi/aacraid/aachba.c 		scsicmd->SCp.phase = AAC_OWNER_FIRMWARE;
phase            1117 drivers/scsi/aacraid/aachba.c 	scsicmd->SCp.phase = AAC_OWNER_FIRMWARE;
phase            2487 drivers/scsi/aacraid/aachba.c 	scsicmd->SCp.phase = AAC_OWNER_FIRMWARE;
phase            2579 drivers/scsi/aacraid/aachba.c 	scsicmd->SCp.phase = AAC_OWNER_FIRMWARE;
phase            2661 drivers/scsi/aacraid/aachba.c 		if (cmd->SCp.phase == AAC_OWNER_FIRMWARE) {
phase            2736 drivers/scsi/aacraid/aachba.c 	scsicmd->SCp.phase = AAC_OWNER_FIRMWARE;
phase            2813 drivers/scsi/aacraid/aachba.c 	scsicmd->SCp.phase = AAC_OWNER_FIRMWARE;
phase            3845 drivers/scsi/aacraid/aachba.c 	scsicmd->SCp.phase = AAC_OWNER_FIRMWARE;
phase            3890 drivers/scsi/aacraid/aachba.c 	scsicmd->SCp.phase = AAC_OWNER_FIRMWARE;
phase             288 drivers/scsi/aacraid/comminit.c 				if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
phase            1606 drivers/scsi/aacraid/commsup.c 			if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
phase            1618 drivers/scsi/aacraid/commsup.c 		command->SCp.phase = AAC_OWNER_ERROR_HANDLER;
phase             244 drivers/scsi/aacraid/linit.c 	cmd->SCp.phase = AAC_OWNER_LOWLEVEL;
phase             635 drivers/scsi/aacraid/linit.c 			switch (scmnd->SCp.phase) {
phase             769 drivers/scsi/aacraid/linit.c 					cmd->SCp.phase =
phase             796 drivers/scsi/aacraid/linit.c 					command->SCp.phase =
phase            1031 drivers/scsi/aacraid/linit.c 				cmd->SCp.phase = AAC_OWNER_ERROR_HANDLER;
phase            1964 drivers/scsi/aacraid/linit.c 		if (cmd && (cmd->SCp.phase == AAC_OWNER_FIRMWARE)) {
phase             878 drivers/scsi/aha152x.c 		CURRENT_SC->SCp.phase |= 1 << 16;
phase             880 drivers/scsi/aha152x.c 		if(CURRENT_SC->SCp.phase & selecting) {
phase             885 drivers/scsi/aha152x.c 			SETPORT(SIMODE0, (CURRENT_SC->SCp.phase & spiordy) ? ENSPIORDY : 0);
phase             908 drivers/scsi/aha152x.c 				  int phase, void (*done)(struct scsi_cmnd *))
phase             914 drivers/scsi/aha152x.c 	SCpnt->SCp.phase	= not_issued | phase;
phase             920 drivers/scsi/aha152x.c 	if(SCpnt->SCp.phase & (resetting|check_condition)) {
phase             942 drivers/scsi/aha152x.c 	if ((phase & resetting) || !scsi_sglist(SCpnt)) {
phase            1080 drivers/scsi/aha152x.c 	if(SCpnt->SCp.phase & resetted) {
phase            1375 drivers/scsi/aha152x.c 		CURRENT_SC->SCp.phase &= ~syncneg;
phase            1377 drivers/scsi/aha152x.c 		if(CURRENT_SC->SCp.phase & completed) {
phase            1381 drivers/scsi/aha152x.c 		} else if(CURRENT_SC->SCp.phase & aborted) {
phase            1384 drivers/scsi/aha152x.c 		} else if(CURRENT_SC->SCp.phase & resetted) {
phase            1387 drivers/scsi/aha152x.c 		} else if(CURRENT_SC->SCp.phase & disconnected) {
phase            1393 drivers/scsi/aha152x.c 			CURRENT_SC->SCp.phase |= 1 << 16;
phase            1412 drivers/scsi/aha152x.c 		if(DONE_SC->SCp.phase & check_condition) {
phase            1428 drivers/scsi/aha152x.c 			if(!(DONE_SC->SCp.phase & not_issued)) {
phase            1479 drivers/scsi/aha152x.c 		CURRENT_SC->SCp.phase |= selecting;
phase            1511 drivers/scsi/aha152x.c 	CURRENT_SC->SCp.phase &= ~(selecting|not_issued);
phase            1526 drivers/scsi/aha152x.c 	if (CURRENT_SC->SCp.phase & aborting) {
phase            1528 drivers/scsi/aha152x.c 	} else if (CURRENT_SC->SCp.phase & resetting) {
phase            1531 drivers/scsi/aha152x.c 		CURRENT_SC->SCp.phase |= syncneg;
phase            1552 drivers/scsi/aha152x.c 	CURRENT_SC->SCp.phase &= ~selecting;
phase            1554 drivers/scsi/aha152x.c 	if (CURRENT_SC->SCp.phase & aborted)
phase            1582 drivers/scsi/aha152x.c 		if(!(CURRENT_SC->SCp.phase & not_issued))
phase            1677 drivers/scsi/aha152x.c 			CURRENT_SC->SCp.phase &= ~disconnected;
phase            1693 drivers/scsi/aha152x.c 			CURRENT_SC->SCp.phase |= disconnected;
phase            1697 drivers/scsi/aha152x.c 			CURRENT_SC->SCp.phase |= completed;
phase            1828 drivers/scsi/aha152x.c 		if((CURRENT_SC->SCp.phase & syncneg) && SYNCNEG==2 && SYNCRATE==0) {
phase            1856 drivers/scsi/aha152x.c 			CURRENT_SC->SCp.phase |= identified;
phase            1859 drivers/scsi/aha152x.c 			CURRENT_SC->SCp.phase |= aborted;
phase            1862 drivers/scsi/aha152x.c 			CURRENT_SC->SCp.phase |= resetted;
phase            2193 drivers/scsi/aha152x.c 	} else if(stat0 & SELDO && CURRENT_SC && (CURRENT_SC->SCp.phase & selecting)) {
phase            2325 drivers/scsi/aha152x.c 				CURRENT_SC->SCp.phase &= ~spiordy;
phase            2347 drivers/scsi/aha152x.c 				CURRENT_SC->SCp.phase |= spiordy;
phase            2442 drivers/scsi/aha152x.c 		    (ptr->SCp.phase & not_issued) ? "not issued|" : "",
phase            2443 drivers/scsi/aha152x.c 		    (ptr->SCp.phase & selecting) ? "selecting|" : "",
phase            2444 drivers/scsi/aha152x.c 		    (ptr->SCp.phase & identified) ? "identified|" : "",
phase            2445 drivers/scsi/aha152x.c 		    (ptr->SCp.phase & disconnected) ? "disconnected|" : "",
phase            2446 drivers/scsi/aha152x.c 		    (ptr->SCp.phase & completed) ? "completed|" : "",
phase            2447 drivers/scsi/aha152x.c 		    (ptr->SCp.phase & spiordy) ? "spiordy|" : "",
phase            2448 drivers/scsi/aha152x.c 		    (ptr->SCp.phase & syncneg) ? "syncneg|" : "",
phase            2449 drivers/scsi/aha152x.c 		    (ptr->SCp.phase & aborted) ? "aborted|" : "",
phase            2450 drivers/scsi/aha152x.c 		    (ptr->SCp.phase & resetted) ? "resetted|" : "",
phase            2495 drivers/scsi/aha152x.c 	if (ptr->SCp.phase & not_issued)
phase            2497 drivers/scsi/aha152x.c 	if (ptr->SCp.phase & selecting)
phase            2499 drivers/scsi/aha152x.c 	if (ptr->SCp.phase & disconnected)
phase            2501 drivers/scsi/aha152x.c 	if (ptr->SCp.phase & aborted)
phase            2503 drivers/scsi/aha152x.c 	if (ptr->SCp.phase & identified)
phase            2505 drivers/scsi/aha152x.c 	if (ptr->SCp.phase & completed)
phase            2507 drivers/scsi/aha152x.c 	if (ptr->SCp.phase & spiordy)
phase            2509 drivers/scsi/aha152x.c 	if (ptr->SCp.phase & syncneg)
phase             813 drivers/scsi/aic7xxx/aic79xx.h         uint8_t phase;
phase             249 drivers/scsi/aic7xxx/aic79xx_core.c static const struct ahd_phase_table_entry* ahd_lookup_phase_entry(int phase);
phase            4339 drivers/scsi/aic7xxx/aic79xx_core.c ahd_lookup_phase_entry(int phase)
phase            4350 drivers/scsi/aic7xxx/aic79xx_core.c 		if (phase == entry->phase)
phase             759 drivers/scsi/aic7xxx/aic7xxx.h         uint8_t phase;
phase            1387 drivers/scsi/aic7xxx/aic7xxx_core.c 			if (lastphase == ahc_phase_table[i].phase)
phase            1643 drivers/scsi/aic7xxx/aic7xxx_core.c 			if (errorphase == ahc_phase_table[i].phase)
phase            1933 drivers/scsi/aic7xxx/aic7xxx_core.c 				if (lastphase == ahc_phase_table[i].phase)
phase            2795 drivers/scsi/aic7xxx/aic7xxx_core.c ahc_lookup_phase_entry(int phase)
phase            2806 drivers/scsi/aic7xxx/aic7xxx_core.c 		if (phase == entry->phase)
phase             141 drivers/scsi/aic94xx/aic94xx_tmf.c 			       enum clear_nexus_phase phase)
phase             147 drivers/scsi/aic94xx/aic94xx_tmf.c 	switch (phase) {
phase             382 drivers/scsi/arm/acornscsi.c     host->scsi.phase = PHASE_IDLE;
phase             736 drivers/scsi/arm/acornscsi.c     host->scsi.phase = PHASE_CONNECTING;
phase             872 drivers/scsi/arm/acornscsi.c     host->scsi.phase = PHASE_IDLE;
phase            1318 drivers/scsi/arm/acornscsi.c     host->scsi.phase = PHASE_COMMAND;
phase            1479 drivers/scsi/arm/acornscsi.c     if (host->scsi.phase == PHASE_RECONNECTED) {
phase            1489 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_MSGIN;
phase            1496 drivers/scsi/arm/acornscsi.c 	if (host->scsi.phase != PHASE_STATUSIN) {
phase            1501 drivers/scsi/arm/acornscsi.c 	host->scsi.phase = PHASE_DONE;
phase            1515 drivers/scsi/arm/acornscsi.c 	host->scsi.phase = PHASE_MSGIN;
phase            1530 drivers/scsi/arm/acornscsi.c 	host->scsi.phase = PHASE_MSGIN;
phase            1544 drivers/scsi/arm/acornscsi.c 	host->scsi.phase = PHASE_DISCONNECT;
phase            1668 drivers/scsi/arm/acornscsi.c 	host->scsi.phase = PHASE_MSGIN;
phase            1798 drivers/scsi/arm/acornscsi.c     ADD_STATUS(target, 0x81, host->scsi.phase, 0);
phase            1801 drivers/scsi/arm/acornscsi.c 	host->scsi.phase = PHASE_RECONNECTED;
phase            1904 drivers/scsi/arm/acornscsi.c     host->scsi.phase = PHASE_ABORTED;
phase            1939 drivers/scsi/arm/acornscsi.c     print_sbic_status(asr, ssr, host->scsi.phase);
phase            1942 drivers/scsi/arm/acornscsi.c     ADD_STATUS(8, ssr, host->scsi.phase, in_irq);
phase            1945 drivers/scsi/arm/acornscsi.c 	ADD_STATUS(host->SCpnt->device->id, ssr, host->scsi.phase, in_irq);
phase            1969 drivers/scsi/arm/acornscsi.c     switch (host->scsi.phase) {
phase            1974 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_CONNECTED;
phase            1982 drivers/scsi/arm/acornscsi.c 	    ADD_STATUS(8, ssr, host->scsi.phase, 1);
phase            1983 drivers/scsi/arm/acornscsi.c 	    ADD_STATUS(host->SCpnt->device->id, ssr, host->scsi.phase, 1);
phase            2019 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_STATUSIN;
phase            2025 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_MSGOUT;
phase            2059 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_STATUSIN;
phase            2089 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_DATAOUT;
phase            2099 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_DATAIN;
phase            2105 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_STATUSIN;
phase            2129 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_IDLE;
phase            2159 drivers/scsi/arm/acornscsi.c 	ADD_STATUS(host->SCpnt->device->id, ssr, host->scsi.phase, in_irq);
phase            2167 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_DATAOUT;
phase            2176 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_DATAIN;
phase            2188 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_STATUSIN;
phase            2227 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_STATUSIN;
phase            2277 drivers/scsi/arm/acornscsi.c 	    host->scsi.phase = PHASE_STATUSIN;
phase            2386 drivers/scsi/arm/acornscsi.c 		host->scsi.phase = PHASE_IDLE;
phase            2493 drivers/scsi/arm/acornscsi.c     SCpnt->SCp.phase = (int)acornscsi_datadirection(SCpnt->cmnd[0]);
phase            2510 drivers/scsi/arm/acornscsi.c 	if (host->scsi.phase == PHASE_IDLE)
phase            2587 drivers/scsi/arm/acornscsi.c 		switch (host->scsi.phase) {
phase            2658 drivers/scsi/arm/acornscsi.c 		print_sbic_status(asr, ssr, host->scsi.phase);
phase            2740 drivers/scsi/arm/acornscsi.c 	print_sbic_status(asr, ssr, host->scsi.phase);
phase             284 drivers/scsi/arm/acornscsi.h 	phase_t		phase;			/* current phase			*/
phase             199 drivers/scsi/arm/fas216.c 		info->scsi.type, info->scsi.phase);
phase             275 drivers/scsi/arm/fas216.c 	if (info->scsi.phase < ARRAY_SIZE(phases) &&
phase             276 drivers/scsi/arm/fas216.c 	    phases[info->scsi.phase])
phase             277 drivers/scsi/arm/fas216.c 		return phases[info->scsi.phase];
phase             564 drivers/scsi/arm/fas216.c 			info->scsi.phase = PHASE_MSGOUT_EXPECT;
phase             605 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_MSGOUT_EXPECT;
phase             635 drivers/scsi/arm/fas216.c 	SCp->phase -= bytes_transferred;
phase             717 drivers/scsi/arm/fas216.c 		total = info->scsi.SCp.phase;
phase             735 drivers/scsi/arm/fas216.c 	if (info->scsi.phase == PHASE_DATAOUT)
phase             755 drivers/scsi/arm/fas216.c 		   info->scsi.SCp.phase);
phase             775 drivers/scsi/arm/fas216.c 	if (info->scsi.phase == PHASE_DATAOUT)
phase             786 drivers/scsi/arm/fas216.c 		fas216_set_stc(info, info->scsi.SCp.phase);
phase             839 drivers/scsi/arm/fas216.c 	if (info->scsi.phase == PHASE_DATAIN) {
phase             889 drivers/scsi/arm/fas216.c 		   info->scsi.phase);
phase             893 drivers/scsi/arm/fas216.c 	switch (info->scsi.phase) {
phase             901 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_IDLE;
phase             904 drivers/scsi/arm/fas216.c 		if (info->scsi.phase == PHASE_IDLE)
phase             946 drivers/scsi/arm/fas216.c 	WARN_ON(info->scsi.phase == PHASE_SELECTION ||
phase             947 drivers/scsi/arm/fas216.c 		info->scsi.phase == PHASE_SELSTEPS);
phase             952 drivers/scsi/arm/fas216.c 		   info->scsi.phase, cfis);
phase            1015 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_MSGIN;
phase            1031 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_MSGOUT_EXPECT;
phase            1048 drivers/scsi/arm/fas216.c 	info->scsi.phase = PHASE_MSGOUT_EXPECT;
phase            1102 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_MSGIN_DISCONNECT;
phase            1159 drivers/scsi/arm/fas216.c 	info->scsi.phase = PHASE_MSGOUT_EXPECT;
phase            1276 drivers/scsi/arm/fas216.c 	info->scsi.phase = PHASE_MSGOUT_EXPECT;
phase            1302 drivers/scsi/arm/fas216.c 	info->scsi.phase = PHASE_COMMAND;
phase            1338 drivers/scsi/arm/fas216.c 	info->scsi.phase = PHASE_MSGOUT;
phase            1355 drivers/scsi/arm/fas216.c 		   stat, is, info->scsi.phase);
phase            1357 drivers/scsi/arm/fas216.c 	switch (info->scsi.phase) {
phase            1389 drivers/scsi/arm/fas216.c 	switch (STATE(stat & STAT_BUSMASK, info->scsi.phase)) {
phase            1394 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_DATAIN;
phase            1409 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_DATAOUT;
phase            1423 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_STATUS;
phase            1437 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_MSGIN;
phase            1448 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_COMMAND;
phase            1510 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_MSGOUT_EXPECT;
phase            1514 drivers/scsi/arm/fas216.c 	if (info->scsi.phase == PHASE_MSGIN_DISCONNECT) {
phase            1521 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_MSGOUT_EXPECT;
phase            1557 drivers/scsi/arm/fas216.c 		   stat, is, info->scsi.phase);
phase            1559 drivers/scsi/arm/fas216.c 	switch (info->scsi.phase) {
phase            1569 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_DONE;
phase            1607 drivers/scsi/arm/fas216.c 	info->scsi.phase = PHASE_IDLE;
phase            1641 drivers/scsi/arm/fas216.c 	add_debug_list(stat, is, inst, info->scsi.phase);
phase            1713 drivers/scsi/arm/fas216.c 		info->scsi.phase = PHASE_SELSTEPS;
phase            1768 drivers/scsi/arm/fas216.c 	info->scsi.phase = PHASE_SELECTION;
phase            1858 drivers/scsi/arm/fas216.c 	info->scsi.phase = PHASE_SELECTION;
phase            2152 drivers/scsi/arm/fas216.c     	info->scsi.phase = PHASE_IDLE;
phase            2186 drivers/scsi/arm/fas216.c 		if (info->scsi.phase == PHASE_IDLE)
phase            2238 drivers/scsi/arm/fas216.c 	if (result == 0 && info->scsi.phase == PHASE_IDLE)
phase            2382 drivers/scsi/arm/fas216.c 		switch (info->scsi.phase) {
phase            2522 drivers/scsi/arm/fas216.c 		if (info->scsi.phase == PHASE_IDLE)
phase            2608 drivers/scsi/arm/fas216.c 	info->scsi.phase = PHASE_IDLE;
phase             233 drivers/scsi/arm/fas216.h 		phase_t		phase;			/* current phase			*/
phase              90 drivers/scsi/arm/scsi.h 		SCpnt->SCp.phase = scsi_bufflen(SCpnt);
phase             114 drivers/scsi/arm/scsi.h 				SCpnt->SCp.phase =
phase             123 drivers/scsi/arm/scsi.h 		SCpnt->SCp.phase = 0;
phase             307 drivers/scsi/be2iscsi/be_cmds.h 	u8 phase[2];		/* dword 2 */
phase             329 drivers/scsi/be2iscsi/be_cmds.h 	u32 phase;
phase             707 drivers/scsi/be2iscsi/be_cmds.h 		__le32 phase;
phase            1106 drivers/scsi/be2iscsi/be_cmds.h 	u32 phase;
phase             341 drivers/scsi/be2iscsi/be_mgmt.c 		req->delay[i].phase = 0;
phase            1553 drivers/scsi/bfa/bfa_ioc.c 		drv_fwhdr->fwver.phase == fwhdr_to_cmp->fwver.phase &&
phase            1572 drivers/scsi/bfa/bfa_ioc.c 	if (fwhdr->fwver.phase == 0 &&
phase            1610 drivers/scsi/bfa/bfa_ioc.c 	if (fwhdr_to_cmp->fwver.phase > base_fwhdr->fwver.phase)
phase            1612 drivers/scsi/bfa/bfa_ioc.c 	else if (fwhdr_to_cmp->fwver.phase < base_fwhdr->fwver.phase)
phase             332 drivers/scsi/bfa/bfi.h 	uint8_t phase;
phase             338 drivers/scsi/bfa/bfi.h 	uint8_t phase;
phase            1601 drivers/scsi/dc395x.c 	u16 phase;
phase            1654 drivers/scsi/dc395x.c 		phase = (u16)srb->scsi_phase;
phase            1669 drivers/scsi/dc395x.c 		dc395x_statev = dc395x_scsi_phase0[phase];
phase            1678 drivers/scsi/dc395x.c 		phase = (u16)scsi_status & PHASEMASK;
phase            1692 drivers/scsi/dc395x.c 		dc395x_statev = dc395x_scsi_phase1[phase];
phase            1382 drivers/scsi/esp_scsi.c 			u32 fflags, phase;
phase            1396 drivers/scsi/esp_scsi.c 			phase = esp->sreg & ESP_STAT_PMASK;
phase            1399 drivers/scsi/esp_scsi.c 			if ((phase == ESP_DOP &&
phase            1401 drivers/scsi/esp_scsi.c 			    (phase == ESP_DIP &&
phase            2105 drivers/scsi/esp_scsi.c 	u8 phase;
phase            2137 drivers/scsi/esp_scsi.c 	phase = (esp->sreg & ESP_STAT_PMASK);
phase            2139 drivers/scsi/esp_scsi.c 		if (((phase != ESP_DIP && phase != ESP_DOP) &&
phase            2833 drivers/scsi/esp_scsi.c 	u8 phase = esp->sreg & ESP_STAT_PMASK;
phase            2840 drivers/scsi/esp_scsi.c 		u8 mask = ~(phase == ESP_MIP ? ESP_INTR_FDONE : ESP_INTR_BSERV);
phase            2859 drivers/scsi/esp_scsi.c 			if ((esp->sreg & ESP_STAT_PMASK) != phase)
phase            2868 drivers/scsi/esp_scsi.c 			if (phase == ESP_MIP)
phase            2893 drivers/scsi/esp_scsi.c 			if ((esp->sreg & ESP_STAT_PMASK) != phase)
phase             273 drivers/scsi/fdomain.c 	if (cmd->SCp.phase & in_arbitration) {
phase             279 drivers/scsi/fdomain.c 		cmd->SCp.phase = in_selection;
phase             288 drivers/scsi/fdomain.c 	} else if (cmd->SCp.phase & in_selection) {
phase             299 drivers/scsi/fdomain.c 		cmd->SCp.phase = in_other;
phase             366 drivers/scsi/fdomain.c 		if (cmd->SCp.phase & disconnect) {
phase             406 drivers/scsi/fdomain.c 	cmd->SCp.phase		= in_arbitration;
phase             441 drivers/scsi/fdomain.c 	fd->cur_cmd->SCp.phase |= aborted;
phase              96 drivers/scsi/fnic/fnic.h #define CMD_STATE(Cmnd)		((Cmnd)->SCp.phase)
phase            1624 drivers/scsi/gdth.c         if (nscp_cmndinfo->phase == -1) {
phase            1625 drivers/scsi/gdth.c             nscp_cmndinfo->phase = CACHESERVICE;           /* default: cache svc. */
phase            1639 drivers/scsi/gdth.c                         nscp_cmndinfo->phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
phase            1650 drivers/scsi/gdth.c                         nscp_cmndinfo->phase = SCSIRAWSERVICE;
phase            1668 drivers/scsi/gdth.c             if ((nscp_cmndinfo->phase & 0xff) == CACHESERVICE) {
phase            1672 drivers/scsi/gdth.c             } else if ((nscp_cmndinfo->phase & 0xff) == SCSIRAWSERVICE) {
phase            2171 drivers/scsi/gdth.c             cmdp->u.raw64.direction = (cmndinfo->phase >> 8);
phase            2177 drivers/scsi/gdth.c             cmdp->u.raw.direction  = (cmndinfo->phase >> 8);
phase            2760 drivers/scsi/gdth.c                             cmndinfo->phase = -2;      /* reservation conflict */
phase            3413 drivers/scsi/gdth.c     cmndinfo->phase = -1;
phase             883 drivers/scsi/gdth.h         int phase;                              /* ???? */
phase              69 drivers/scsi/imm.c 		dev->cur_cmd->SCp.phase = 1;
phase             765 drivers/scsi/imm.c 	if (cmd->SCp.phase > 1)
phase             789 drivers/scsi/imm.c 	switch (cmd->SCp.phase) {
phase             803 drivers/scsi/imm.c 		cmd->SCp.phase++;
phase             811 drivers/scsi/imm.c 		cmd->SCp.phase++;
phase             821 drivers/scsi/imm.c 		cmd->SCp.phase++;
phase             835 drivers/scsi/imm.c 		cmd->SCp.phase++;
phase             854 drivers/scsi/imm.c 		cmd->SCp.phase++;
phase             870 drivers/scsi/imm.c 		cmd->SCp.phase++;
phase             882 drivers/scsi/imm.c 		cmd->SCp.phase++;
phase             928 drivers/scsi/imm.c 	cmd->SCp.phase = 0;	/* bus free */
phase             967 drivers/scsi/imm.c 	switch (cmd->SCp.phase) {
phase             995 drivers/scsi/imm.c 	if (cmd->SCp.phase)
phase            1150 drivers/scsi/initio.c 		host->phase = host->jsstatus0 & TSS_PH_MASK;
phase            1308 drivers/scsi/initio.c 	if (host->phase == MSG_OUT) {
phase            1388 drivers/scsi/initio.c 		switch (host->phase) {
phase            1395 drivers/scsi/initio.c 			if (host->phase == CMD_OUT)
phase            1459 drivers/scsi/initio.c 		switch (host->phase) {
phase            1546 drivers/scsi/initio.c 		if ((cnt == 1) && (host->phase == DATA_OUT)) {
phase            1606 drivers/scsi/initio.c 		switch (host->phase) {
phase            1656 drivers/scsi/initio.c 	switch (host->phase) {
phase            1745 drivers/scsi/initio.c 		if (host->phase != DATA_IN) {
phase            1770 drivers/scsi/initio.c 		if (host->phase != DATA_OUT) {	/* Disable wide CPU to allow read 16 bits */
phase            1790 drivers/scsi/initio.c 	if (host->phase == MSG_OUT) {
phase            1798 drivers/scsi/initio.c 	if (host->phase == MSG_IN) {
phase            1803 drivers/scsi/initio.c 			if (host->phase != MSG_OUT)
phase            1925 drivers/scsi/initio.c 		if (host->phase != MSG_IN)
phase            1939 drivers/scsi/initio.c 		if (host->phase != MSG_IN)
phase            2010 drivers/scsi/initio.c 	if (host->phase != MSG_OUT)
phase            2033 drivers/scsi/initio.c 	if (host->phase != MSG_OUT)
phase            2093 drivers/scsi/initio.c 		if (host->phase != MSG_IN)
phase            2094 drivers/scsi/initio.c 			return host->phase;
phase            2106 drivers/scsi/initio.c 	if (host->phase == MSG_OUT) {
phase            2111 drivers/scsi/initio.c 	return host->phase;
phase            2126 drivers/scsi/initio.c 		return host->phase;
phase            2139 drivers/scsi/initio.c 			return host->phase;
phase            2164 drivers/scsi/initio.c 			return host->phase;
phase            2200 drivers/scsi/initio.c 		return host->phase;
phase            2361 drivers/scsi/initio.c 	if (host->phase != MSG_OUT)
phase            2414 drivers/scsi/initio.c 	host->phase = host->jsstatus0 & TSS_PH_MASK;
phase            2450 drivers/scsi/initio.c 		return host->phase;
phase            2451 drivers/scsi/initio.c 	return host->phase;
phase             512 drivers/scsi/initio.h 	u8 phase;		/* 0F */
phase            1329 drivers/scsi/libiscsi.c 	if (task->sc->SCp.phase != conn->session->age) {
phase            1332 drivers/scsi/libiscsi.c 				  task->sc->SCp.phase, conn->session->age);
phase            1607 drivers/scsi/libiscsi.c 	sc->SCp.phase = conn->session->age;
phase            2171 drivers/scsi/libiscsi.c 	    sc->SCp.phase != session->age) {
phase            1081 drivers/scsi/lpfc/lpfc_hw4.h 	uint32_t phase;
phase            14702 drivers/scsi/lpfc/lpfc_sli.c 		eq_delay->u.request.eq[cnt].phase = 0;
phase              54 drivers/scsi/mac53c94.c 	enum fsc_phase phase;		/* what we're currently trying to do */
phase              97 drivers/scsi/mac53c94.c 	if (state->phase == idle)
phase             153 drivers/scsi/mac53c94.c 	if (state->phase != idle || state->current_req != NULL)
phase             178 drivers/scsi/mac53c94.c 	state->phase = selecting;
phase             213 drivers/scsi/mac53c94.c 	       intr, stat, seq, state->phase);
phase             226 drivers/scsi/mac53c94.c 		       intr, stat, seq, state->phase);
phase             234 drivers/scsi/mac53c94.c 		       intr, stat, seq, state->phase);
phase             248 drivers/scsi/mac53c94.c 	switch (state->phase) {
phase             279 drivers/scsi/mac53c94.c 			state->phase = dataing;
phase             284 drivers/scsi/mac53c94.c 			state->phase = completing;
phase             319 drivers/scsi/mac53c94.c 		state->phase = completing;
phase             331 drivers/scsi/mac53c94.c 		state->phase = busfreeing;
phase             341 drivers/scsi/mac53c94.c 		printk(KERN_DEBUG "don't know about phase %d\n", state->phase);
phase             355 drivers/scsi/mac53c94.c 	state->phase = idle;
phase              96 drivers/scsi/mesh.c 	u8	phase;
phase             153 drivers/scsi/mesh.c 	enum mesh_phase phase;		/* what we're currently trying to do */
phase             222 drivers/scsi/mesh.c 	tlp->phase = (ms->msgphase << 4) + ms->phase;
phase             253 drivers/scsi/mesh.c 		       t, lp->bs1, lp->bs0, lp->phase);
phase             278 drivers/scsi/mesh.c 		       lp->bs1, lp->bs0, lp->phase, lp->tgt);
phase             323 drivers/scsi/mesh.c 	       ms->phase, ms->msgphase, ms->conn_tgt, ms->data_ptr);
phase             400 drivers/scsi/mesh.c 	ms->phase = idle;
phase             428 drivers/scsi/mesh.c 	ms->phase = arbitrating;
phase             468 drivers/scsi/mesh.c 				if (ms->phase != arbitrating)
phase             476 drivers/scsi/mesh.c 			ms->phase = idle;
phase             506 drivers/scsi/mesh.c 		if (ms->phase != arbitrating)
phase             562 drivers/scsi/mesh.c 	if (ms->phase != idle || ms->current_req != NULL) {
phase             564 drivers/scsi/mesh.c 		       ms->phase, ms);
phase             568 drivers/scsi/mesh.c 	while (ms->phase == idle) {
phase             621 drivers/scsi/mesh.c 		ms->phase = idle;
phase             763 drivers/scsi/mesh.c 	switch (ms->phase) {
phase             818 drivers/scsi/mesh.c 		       ms->phase);
phase             863 drivers/scsi/mesh.c 	switch (ms->phase) {
phase             878 drivers/scsi/mesh.c 		ms->phase = reselecting;
phase             885 drivers/scsi/mesh.c 		       ms->msgphase, ms->phase, ms->conn_tgt);
phase             895 drivers/scsi/mesh.c 	ms->phase = dataing;
phase            1009 drivers/scsi/mesh.c 	ms->phase = idle;
phase            1115 drivers/scsi/mesh.c 	if (ms->phase > selecting && (in_8(&mr->bus_status1) & BS1_BSY)) {
phase            1217 drivers/scsi/mesh.c 		ms->phase = disconnecting;
phase            1367 drivers/scsi/mesh.c 	int phase;
phase            1371 drivers/scsi/mesh.c 	phase = in_8(&mr->bus_status0) & BS0_PHASE;
phase            1372 drivers/scsi/mesh.c 	if (ms->msgphase == msg_out_xxx && phase == BP_MSGOUT) {
phase            1398 drivers/scsi/mesh.c 	switch (phase) {
phase            1401 drivers/scsi/mesh.c 		ms->phase = dataing;
phase            1405 drivers/scsi/mesh.c 		ms->phase = dataing;
phase            1408 drivers/scsi/mesh.c 		ms->phase = commanding;
phase            1411 drivers/scsi/mesh.c 		ms->phase = statusing;
phase            1434 drivers/scsi/mesh.c 		printk(KERN_DEBUG "mesh: unknown scsi phase %x\n", phase);
phase            1540 drivers/scsi/mesh.c 		switch (ms->phase) {
phase            1612 drivers/scsi/mesh.c 			ms->phase = idle;
phase            1618 drivers/scsi/mesh.c 		++ms->phase;
phase            1644 drivers/scsi/mesh.c 	if (ms->phase == idle)
phase            1667 drivers/scsi/mesh.c 		       ms->phase, ms->msgphase);
phase            1768 drivers/scsi/mesh.c 	if (ms->phase == sleeping)
phase            1773 drivers/scsi/mesh.c 	while(ms->phase != idle) {
phase            1778 drivers/scsi/mesh.c 	ms->phase = sleeping;
phase            1791 drivers/scsi/mesh.c 	if (ms->phase != sleeping)
phase             513 drivers/scsi/ncr53c8xx.c #define __data_mapped	SCp.phase
phase            6159 drivers/scsi/ncr53c8xx.c 	int phase	= -1;
phase            6190 drivers/scsi/ncr53c8xx.c 		phase = (dbc >> 24) & 7;
phase            6191 drivers/scsi/ncr53c8xx.c 	if (phase == 7)
phase            6203 drivers/scsi/ncr53c8xx.c 	if (phase == 1)
phase            1226 drivers/scsi/ncr53c8xx.h #define WHEN(phase)    (0x00030000 | (phase))
phase            1227 drivers/scsi/ncr53c8xx.h #define IF(phase)      (0x00020000 | (phase))
phase             449 drivers/scsi/nsp32.c 	unsigned char	phase;
phase             459 drivers/scsi/nsp32.c 	phase = nsp32_read1(base, SCSI_BUS_MONITOR);
phase             460 drivers/scsi/nsp32.c 	if (phase != BUSMON_BUS_FREE) {
phase             462 drivers/scsi/nsp32.c 		show_busphase(phase & BUSMON_PHASE_MASK);
phase             579 drivers/scsi/nsp32.c 	unsigned char	phase;
phase             596 drivers/scsi/nsp32.c 	phase = nsp32_read1(base, SCSI_BUS_MONITOR);
phase             597 drivers/scsi/nsp32.c 	if ((phase & BUSMON_BSY) || (phase & BUSMON_SEL)) {
phase             230 drivers/scsi/pcmcia/nsp_cs.c 	SCpnt->SCp.phase	= PH_UNDETERMINED;
phase             371 drivers/scsi/pcmcia/nsp_cs.c 	unsigned char phase, arbit;
phase             375 drivers/scsi/pcmcia/nsp_cs.c 	phase = nsp_index_read(base, SCSIBUSMON);
phase             376 drivers/scsi/pcmcia/nsp_cs.c 	if(phase != BUSMON_BUS_FREE) {
phase             383 drivers/scsi/pcmcia/nsp_cs.c 	SCpnt->SCp.phase = PH_ARBSTART;
phase             403 drivers/scsi/pcmcia/nsp_cs.c 	SCpnt->SCp.phase = PH_SELSTART;
phase             550 drivers/scsi/pcmcia/nsp_cs.c 	unsigned char phase, i_src;
phase             556 drivers/scsi/pcmcia/nsp_cs.c 		phase = nsp_index_read(base, SCSIBUSMON);
phase             557 drivers/scsi/pcmcia/nsp_cs.c 		if (phase == 0xff) {
phase             566 drivers/scsi/pcmcia/nsp_cs.c 		if ((phase & mask) != 0 && (phase & BUSMON_PHASE_MASK) == current_phase) {
phase             579 drivers/scsi/pcmcia/nsp_cs.c static int nsp_xfer(struct scsi_cmnd *SCpnt, int phase)
phase             591 drivers/scsi/pcmcia/nsp_cs.c 		ret = nsp_expect_signal(SCpnt, phase, BUSMON_REQ);
phase             598 drivers/scsi/pcmcia/nsp_cs.c 		if (len == 1 && SCpnt->SCp.phase == PH_MSG_OUT) {
phase             603 drivers/scsi/pcmcia/nsp_cs.c 		if (phase & BUSMON_IO) {
phase             641 drivers/scsi/pcmcia/nsp_cs.c 	SCpnt->SCp.phase = PH_DATA;
phase             958 drivers/scsi/pcmcia/nsp_cs.c 	unsigned char  irq_status, irq_phase, phase;
phase            1000 drivers/scsi/pcmcia/nsp_cs.c 	phase = nsp_index_read(base, SCSIBUSMON);
phase            1047 drivers/scsi/pcmcia/nsp_cs.c 		nsp_msg(KERN_ERR, "CurrentSC==NULL irq_status=0x%x phase=0x%x irq_phase=0x%x this can't be happen. reset everything", irq_status, phase, irq_phase);
phase            1077 drivers/scsi/pcmcia/nsp_cs.c 	switch(tmpSC->SCp.phase) {
phase            1080 drivers/scsi/pcmcia/nsp_cs.c 		if ((phase & BUSMON_BSY) == 0) {
phase            1100 drivers/scsi/pcmcia/nsp_cs.c 		tmpSC->SCp.phase       = PH_SELECTED;
phase            1111 drivers/scsi/pcmcia/nsp_cs.c 		if ((phase & BUSMON_PHASE_MASK) != BUSPHASE_MESSAGE_IN) {
phase            1131 drivers/scsi/pcmcia/nsp_cs.c 	if (((tmpSC->SCp.phase == PH_MSG_IN) || (tmpSC->SCp.phase == PH_MSG_OUT)) &&
phase            1133 drivers/scsi/pcmcia/nsp_cs.c 		nsp_dbg(NSP_DEBUG_INTR, "normal disconnect irq_status=0x%x, phase=0x%x, irq_phase=0x%x", irq_status, phase, irq_phase);
phase            1153 drivers/scsi/pcmcia/nsp_cs.c 	if (phase == 0) {
phase            1154 drivers/scsi/pcmcia/nsp_cs.c 		nsp_msg(KERN_DEBUG, "unexpected bus free. irq_status=0x%x, phase=0x%x, irq_phase=0x%x", irq_status, phase, irq_phase);
phase            1162 drivers/scsi/pcmcia/nsp_cs.c 	switch (phase & BUSMON_PHASE_MASK) {
phase            1165 drivers/scsi/pcmcia/nsp_cs.c 		if ((phase & BUSMON_REQ) == 0) {
phase            1170 drivers/scsi/pcmcia/nsp_cs.c 		tmpSC->SCp.phase = PH_COMMAND;
phase            1186 drivers/scsi/pcmcia/nsp_cs.c 		tmpSC->SCp.phase        = PH_DATA;
phase            1196 drivers/scsi/pcmcia/nsp_cs.c 		tmpSC->SCp.phase        = PH_DATA;
phase            1207 drivers/scsi/pcmcia/nsp_cs.c 		tmpSC->SCp.phase = PH_STATUS;
phase            1216 drivers/scsi/pcmcia/nsp_cs.c 		if ((phase & BUSMON_REQ) == 0) {
phase            1220 drivers/scsi/pcmcia/nsp_cs.c 		tmpSC->SCp.phase = PH_MSG_OUT;
phase            1249 drivers/scsi/pcmcia/nsp_cs.c 		if ((phase & BUSMON_REQ) == 0) {
phase            1253 drivers/scsi/pcmcia/nsp_cs.c 		tmpSC->SCp.phase = PH_MSG_IN;
phase             321 drivers/scsi/pcmcia/nsp_cs.h static int  nsp_xfer             (struct scsi_cmnd *SCpnt, int phase);
phase             148 drivers/scsi/pcmcia/nsp_debug.c 	int i = SCpnt->SCp.phase;
phase             400 drivers/scsi/pcmcia/sym53c500_cs.c 		if (curSC->SCp.phase != message_in) {	/* Unexpected disconnect */
phase             415 drivers/scsi/pcmcia/sym53c500_cs.c 			curSC->SCp.phase = data_out;
phase             434 drivers/scsi/pcmcia/sym53c500_cs.c 			curSC->SCp.phase = data_in;
phase             449 drivers/scsi/pcmcia/sym53c500_cs.c 		curSC->SCp.phase = command_ph;
phase             454 drivers/scsi/pcmcia/sym53c500_cs.c 		curSC->SCp.phase = status_ph;
phase             467 drivers/scsi/pcmcia/sym53c500_cs.c 		curSC->SCp.phase = message_out;
phase             474 drivers/scsi/pcmcia/sym53c500_cs.c 		curSC->SCp.phase = message_in;
phase             494 drivers/scsi/pcmcia/sym53c500_cs.c 	curSC->SCp.phase = idle;
phase             560 drivers/scsi/pcmcia/sym53c500_cs.c 	data->current_SC->SCp.phase = command_ph;
phase             602 drivers/scsi/pm8001/pm8001_sas.h 	u32			phase;/*ret code phase*/
phase              59 drivers/scsi/ppa.c 		dev->cur_cmd->SCp.phase = 1;
phase             661 drivers/scsi/ppa.c 	if (cmd->SCp.phase > 1)
phase             683 drivers/scsi/ppa.c 	switch (cmd->SCp.phase) {
phase             718 drivers/scsi/ppa.c 			cmd->SCp.phase++;
phase             727 drivers/scsi/ppa.c 		cmd->SCp.phase++;
phase             737 drivers/scsi/ppa.c 		cmd->SCp.phase++;
phase             751 drivers/scsi/ppa.c 		cmd->SCp.phase++;
phase             764 drivers/scsi/ppa.c 		cmd->SCp.phase++;
phase             804 drivers/scsi/ppa.c 	cmd->SCp.phase = 0;	/* bus free */
phase             845 drivers/scsi/ppa.c 	switch (cmd->SCp.phase) {
phase             869 drivers/scsi/ppa.c 	if (cmd->SCp.phase)
phase              96 drivers/scsi/qlogicfas408.c static int ql_pdma(struct qlogicfas408_priv *priv, int phase, char *request, int reqlen)
phase             101 drivers/scsi/qlogicfas408.c 	if (phase & 1) {	/* in */
phase             266 drivers/scsi/qlogicfas408.c 	unsigned int phase;	/* recorded scsi phase */
phase             304 drivers/scsi/qlogicfas408.c 	if (reqlen && !((phase = inb(qbase + 4)) & 6)) {	/* data phase */
phase             321 drivers/scsi/qlogicfas408.c 			if (ql_pdma(priv, phase, buf, sg->length))
phase             709 drivers/scsi/sym53c8xx_2/sym_defs.h #define WHEN(phase)    (0x00030000 | (phase))
phase             710 drivers/scsi/sym53c8xx_2/sym_defs.h #define IF(phase)      (0x00020000 | (phase))
phase            2305 drivers/scsi/sym53c8xx_2/sym_hipd.c 	int phase	= cmd & 7;
phase            2331 drivers/scsi/sym53c8xx_2/sym_hipd.c 	if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
phase            2343 drivers/scsi/sym53c8xx_2/sym_hipd.c 	np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
phase            2352 drivers/scsi/sym53c8xx_2/sym_hipd.c 	if (phase == 1 || phase == 5) {
phase            2365 drivers/scsi/sym53c8xx_2/sym_hipd.c 	else if (phase == 7)	/* We definitely cannot handle parity errors */
phase             553 drivers/scsi/wd33c93.c 	cmd->SCp.phase = 0;	/* assume no disconnect */
phase             570 drivers/scsi/wd33c93.c 				prev->SCp.phase = 1;
phase             578 drivers/scsi/wd33c93.c 	cmd->SCp.phase = 1;
phase             586 drivers/scsi/wd33c93.c 	write_wd33c93(regs, WD_SOURCE_ID, ((cmd->SCp.phase) ? SRCID_ER : 0));
phase             655 drivers/scsi/wd33c93.c 		if ((cmd->SCp.phase == 0) && (hostdata->no_dma == 0)) {
phase             682 drivers/scsi/wd33c93.c 	   printk("%s)EX-2 ", (cmd->SCp.phase) ? "d:" : ""))
phase             781 drivers/scsi/wd33c93.c 		    (hostdata->level2 == L2_BASIC && cmd->SCp.phase == 0)) {
phase             891 drivers/scsi/wd33c93.c 		if (cmd->SCp.phase)
phase             263 drivers/scsi/zorro_esp.c 	u8 phase = esp->sreg & ESP_STAT_PMASK;
phase             270 drivers/scsi/zorro_esp.c 	if (phase == ESP_MIP && addr == esp->command_block_dma) {
phase             314 drivers/scsi/zorro_esp.c 	u8 phase = esp->sreg & ESP_STAT_PMASK;
phase             317 drivers/scsi/zorro_esp.c 	if (phase == ESP_MIP && addr == esp->command_block_dma) {
phase             359 drivers/scsi/zorro_esp.c 	u8 phase = esp->sreg & ESP_STAT_PMASK;
phase             362 drivers/scsi/zorro_esp.c 	if (phase == ESP_MIP && addr == esp->command_block_dma) {
phase             405 drivers/scsi/zorro_esp.c 	u8 phase = esp->sreg & ESP_STAT_PMASK;
phase             409 drivers/scsi/zorro_esp.c 	if (phase == ESP_MIP && addr == esp->command_block_dma) {
phase             456 drivers/scsi/zorro_esp.c 	u8 phase = esp->sreg & ESP_STAT_PMASK;
phase             459 drivers/scsi/zorro_esp.c 	if (phase == ESP_MIP && addr == esp->command_block_dma) {
phase             498 drivers/scsi/zorro_esp.c 	u8 phase = esp->sreg & ESP_STAT_PMASK;
phase             502 drivers/scsi/zorro_esp.c 	if (phase == ESP_MIP && addr == esp->command_block_dma) {
phase             156 drivers/staging/iio/frequency/ad9832.c 			      unsigned long addr, unsigned long phase)
phase             158 drivers/staging/iio/frequency/ad9832.c 	if (phase > BIT(AD9832_PHASE_BITS))
phase             163 drivers/staging/iio/frequency/ad9832.c 					((phase >> 8) & 0xFF));
phase             166 drivers/staging/iio/frequency/ad9832.c 					(phase & 0xFF));
phase             133 drivers/staging/iio/frequency/ad9834.c 			      unsigned long addr, unsigned long phase)
phase             135 drivers/staging/iio/frequency/ad9834.c 	if (phase > BIT(AD9834_PHASE_BITS))
phase             137 drivers/staging/iio/frequency/ad9834.c 	st->data = cpu_to_be16(addr | phase);
phase              49 drivers/staging/media/ipu3/ipu3-css-params.c 	int tap, phase, phase_sum_left, phase_sum_right;
phase              55 drivers/staging/media/ipu3/ipu3-css-params.c 		for (phase = 0; phase < IMGU_SCALER_PHASES; phase++) {
phase              57 drivers/staging/media/ipu3/ipu3-css-params.c 				coeff_lut[phase * IMGU_SCALER_FILTER_TAPS + tap]
phase              73 drivers/staging/media/ipu3/ipu3-css-params.c 	for (phase = 0; phase < IMGU_SCALER_PHASES; phase++) {
phase              77 drivers/staging/media/ipu3/ipu3-css-params.c 				((tap * (coeffs_size / taps)) + phase) - 1];
phase              85 drivers/staging/media/ipu3/ipu3-css-params.c 			coeff_lut[phase * IMGU_SCALER_FILTER_TAPS + tap] =
phase             119 drivers/target/iscsi/iscsi_target_parameters.c 		char *name, char *value, u8 phase, u8 scope, u8 sender,
phase             143 drivers/target/iscsi/iscsi_target_parameters.c 	param->phase		= phase;
phase             603 drivers/target/iscsi/iscsi_target_parameters.c 		new_param->phase = param->phase;
phase            1224 drivers/target/iscsi/iscsi_target_parameters.c 	int phase,
phase            1261 drivers/target/iscsi/iscsi_target_parameters.c 	if (!phase)
phase            1264 drivers/target/iscsi/iscsi_target_parameters.c 	if (!(param->phase & phase)) {
phase            1267 drivers/target/iscsi/iscsi_target_parameters.c 		switch (phase) {
phase            1284 drivers/target/iscsi/iscsi_target_parameters.c 	u8 phase,
phase            1294 drivers/target/iscsi/iscsi_target_parameters.c 		if (!(param->phase & phase))
phase            1311 drivers/target/iscsi/iscsi_target_parameters.c 		if (!(param->phase & phase))
phase            1351 drivers/target/iscsi/iscsi_target_parameters.c 	u8 phase,
phase            1380 drivers/target/iscsi/iscsi_target_parameters.c 		if (phase & PHASE_SECURITY) {
phase            1387 drivers/target/iscsi/iscsi_target_parameters.c 		param = iscsi_check_key(key, phase, sender, param_list);
phase            1423 drivers/target/iscsi/iscsi_target_parameters.c 	u8 phase,
phase            1436 drivers/target/iscsi/iscsi_target_parameters.c 	if (iscsi_enforce_integrity_rules(phase, param_list) < 0)
phase            1445 drivers/target/iscsi/iscsi_target_parameters.c 		    (param->phase & phase)) {
phase            1458 drivers/target/iscsi/iscsi_target_parameters.c 		    (param->phase & phase)) {
phase              18 drivers/target/iscsi/iscsi_target_parameters.h 	u8 phase;
phase             212 drivers/target/iscsi/iscsi_target_parameters.h #define IS_PHASE_SECURITY(p)		((p)->phase & PHASE_SECURITY)
phase             213 drivers/target/iscsi/iscsi_target_parameters.h #define IS_PHASE_OPERATIONAL(p)		((p)->phase & PHASE_OPERATIONAL)
phase             214 drivers/target/iscsi/iscsi_target_parameters.h #define IS_PHASE_DECLARATIVE(p)		((p)->phase & PHASE_DECLARATIVE)
phase             215 drivers/target/iscsi/iscsi_target_parameters.h #define IS_PHASE_FFP0(p)		((p)->phase & PHASE_FFP0)
phase            1077 drivers/usb/atm/cxacru.c 				char *phase, const struct firmware **fw_p)
phase            1083 drivers/usb/atm/cxacru.c 	sprintf(buf, "cxacru-%s.bin", phase);
phase            1087 drivers/usb/atm/cxacru.c 		usb_dbg(usbatm, "no stage %s firmware found\n", phase);
phase             348 drivers/usb/atm/speedtch.c 				  int phase, const struct firmware **fw_p)
phase             356 drivers/usb/atm/speedtch.c 	sprintf(buf, "speedtch-%d.bin.%x.%02x", phase, major_revision, minor_revision);
phase             360 drivers/usb/atm/speedtch.c 		sprintf(buf, "speedtch-%d.bin.%x", phase, major_revision);
phase             364 drivers/usb/atm/speedtch.c 			sprintf(buf, "speedtch-%d.bin", phase);
phase             368 drivers/usb/atm/speedtch.c 				usb_err(usbatm, "%s: no stage %d firmware found!\n", __func__, phase);
phase             374 drivers/usb/atm/speedtch.c 	usb_info(usbatm, "found stage %d firmware %s\n", phase, buf);
phase             294 drivers/usb/dwc3/debug.h 			int phase = DEPEVT_STATUS_CONTROL_PHASE(event->status);
phase             296 drivers/usb/dwc3/debug.h 			switch (phase) {
phase             810 drivers/usb/host/ehci-q.c 		qh->ps.phase = NO_FRAME;
phase             202 drivers/usb/host/ehci-sched.c 			ps->phase, ps->phase_uf, ps->period,
phase             216 drivers/usb/host/ehci-sched.c 	if (qh->ps.phase == NO_FRAME)	/* Bandwidth wasn't reserved */
phase             543 drivers/usb/host/ehci-sched.c 		qh, qh->ps.phase, qh->ps.usecs, qh->ps.c_usecs);
phase             549 drivers/usb/host/ehci-sched.c 	for (i = qh->ps.phase; i < ehci->periodic_size; i += period) {
phase             624 drivers/usb/host/ehci-sched.c 	for (i = qh->ps.phase; i < ehci->periodic_size; i += period)
phase             636 drivers/usb/host/ehci-sched.c 		qh, qh->ps.phase, qh->ps.usecs, qh->ps.c_usecs);
phase             860 drivers/usb/host/ehci-sched.c 	if (qh->ps.phase != NO_FRAME) {
phase             900 drivers/usb/host/ehci-sched.c 	qh->ps.phase = (qh->ps.period ? ehci->random_frame &
phase             902 drivers/usb/host/ehci-sched.c 	qh->ps.bw_phase = qh->ps.phase & (qh->ps.bw_period - 1);
phase            1024 drivers/usb/host/ehci-sched.c 		stream->ps.phase = NO_FRAME;
phase            1327 drivers/usb/host/ehci-sched.c 	if (stream->ps.phase == NO_FRAME)	/* Bandwidth wasn't reserved */
phase            1504 drivers/usb/host/ehci-sched.c 		if (stream->ps.phase == NO_FRAME) {
phase            1544 drivers/usb/host/ehci-sched.c 			stream->ps.phase = (start >> 3) &
phase            1546 drivers/usb/host/ehci-sched.c 			stream->ps.bw_phase = stream->ps.phase &
phase            1554 drivers/usb/host/ehci-sched.c 			start = (stream->ps.phase << 3) + stream->ps.phase_uf;
phase              55 drivers/usb/host/ehci.h 	u16			phase;		/* actual phase, frame part */
phase             188 drivers/usb/host/uhci-debug.c 				space, "", qh->period, qh->phase, qh->load,
phase             192 drivers/usb/host/uhci-debug.c 				space, "", qh->period, qh->phase, qh->load);
phase             171 drivers/usb/host/uhci-hcd.h 	short phase;			/* Between 0 and period-1 */
phase             610 drivers/usb/host/uhci-q.c static int uhci_highest_load(struct uhci_hcd *uhci, int phase, int period)
phase             612 drivers/usb/host/uhci-q.c 	int highest_load = uhci->load[phase];
phase             614 drivers/usb/host/uhci-q.c 	for (phase += period; phase < MAX_PHASE; phase += period)
phase             615 drivers/usb/host/uhci-q.c 		highest_load = max_t(int, highest_load, uhci->load[phase]);
phase             629 drivers/usb/host/uhci-q.c 	if (qh->phase >= 0)
phase             630 drivers/usb/host/uhci-q.c 		minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
phase             632 drivers/usb/host/uhci-q.c 		int phase, load;
phase             635 drivers/usb/host/uhci-q.c 		qh->phase = 0;
phase             636 drivers/usb/host/uhci-q.c 		minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
phase             637 drivers/usb/host/uhci-q.c 		for (phase = 1; phase < max_phase; ++phase) {
phase             638 drivers/usb/host/uhci-q.c 			load = uhci_highest_load(uhci, phase, qh->period);
phase             641 drivers/usb/host/uhci-q.c 				qh->phase = phase;
phase             650 drivers/usb/host/uhci-q.c 				qh->period, qh->phase, minimax_load, qh->load);
phase             665 drivers/usb/host/uhci-q.c 	for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
phase             686 drivers/usb/host/uhci-q.c 			qh->period, qh->phase, load);
phase             698 drivers/usb/host/uhci-q.c 	for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
phase             719 drivers/usb/host/uhci-q.c 			qh->period, qh->phase, load);
phase            1102 drivers/usb/host/uhci-q.c 			qh->phase = (qh->period / 2) & (MAX_PHASE - 1);
phase            1273 drivers/usb/host/uhci-q.c 		qh->phase = -1;		/* Find the best phase */
phase            1280 drivers/usb/host/uhci-q.c 		frame = qh->phase;
phase             512 fs/f2fs/gc.c   	int phase = 0;
phase             521 fs/f2fs/gc.c   	if (fggc && phase == 2)
phase             537 fs/f2fs/gc.c   		if (phase == 0) {
phase             543 fs/f2fs/gc.c   		if (phase == 1) {
phase             575 fs/f2fs/gc.c   	if (++phase < 3)
phase             999 fs/f2fs/gc.c   	int phase = 0;
phase            1022 fs/f2fs/gc.c   		if (phase == 0) {
phase            1028 fs/f2fs/gc.c   		if (phase == 1) {
phase            1037 fs/f2fs/gc.c   		if (phase == 2) {
phase            1044 fs/f2fs/gc.c   		if (phase == 3) {
phase            1128 fs/f2fs/gc.c   	if (++phase < 5)
phase             733 fs/fs_context.c 	fc->phase = FS_CONTEXT_AWAITING_RECONF;
phase             740 fs/fs_context.c 	if (fc->phase != FS_CONTEXT_AWAITING_RECONF)
phase             748 fs/fs_context.c 		fc->phase = FS_CONTEXT_FAILED;
phase             752 fs/fs_context.c 	fc->phase = FS_CONTEXT_RECONF_PARAMS;
phase             142 fs/fsopen.c    	fc->phase = FS_CONTEXT_CREATE_PARAMS;
phase             195 fs/fsopen.c    	fc->phase = FS_CONTEXT_RECONF_PARAMS;
phase             227 fs/fsopen.c    		if (fc->phase != FS_CONTEXT_CREATE_PARAMS)
phase             231 fs/fsopen.c    		fc->phase = FS_CONTEXT_CREATING;
phase             242 fs/fsopen.c    		fc->phase = FS_CONTEXT_AWAITING_MOUNT;
phase             245 fs/fsopen.c    		if (fc->phase != FS_CONTEXT_RECONF_PARAMS)
phase             247 fs/fsopen.c    		fc->phase = FS_CONTEXT_RECONFIGURING;
phase             261 fs/fsopen.c    		if (fc->phase != FS_CONTEXT_CREATE_PARAMS &&
phase             262 fs/fsopen.c    		    fc->phase != FS_CONTEXT_RECONF_PARAMS)
phase             267 fs/fsopen.c    	fc->phase = FS_CONTEXT_FAILED;
phase            3448 fs/namespace.c 	if (fc->phase != FS_CONTEXT_AWAITING_MOUNT)
phase             194 include/linux/clk.h static inline long clk_set_phase(struct clk *clk, int phase)
phase             105 include/linux/fs_context.h 	enum fs_context_phase	phase:8;	/* The phase the context is in */
phase              60 include/linux/greybus/greybus_protocols.h 	__u8 phase;
phase              30 include/linux/greybus/hd.h 				u8 phase, unsigned int timeout);
phase             184 include/linux/parport.h 	volatile enum ieee1284_phase phase;
phase             496 include/net/netfilter/nf_tables.h 			      enum nft_trans_phase phase);
phase             791 include/net/netfilter/nf_tables.h 						      enum nft_trans_phase phase);
phase            1189 include/net/netfilter/nf_tables.h 				    enum nft_trans_phase phase);
phase              53 include/scsi/scsi_cmnd.h 	volatile int phase;
phase             156 include/trace/events/clk.h 	TP_PROTO(struct clk_core *core, int phase),
phase             158 include/trace/events/clk.h 	TP_ARGS(core, phase),
phase             162 include/trace/events/clk.h 		__field(	  int,           phase                     )
phase             167 include/trace/events/clk.h 		__entry->phase = phase;
phase             170 include/trace/events/clk.h 	TP_printk("%s %d", __get_str(name), (int)__entry->phase)
phase             175 include/trace/events/clk.h 	TP_PROTO(struct clk_core *core, int phase),
phase             177 include/trace/events/clk.h 	TP_ARGS(core, phase)
phase             182 include/trace/events/clk.h 	TP_PROTO(struct clk_core *core, int phase),
phase             184 include/trace/events/clk.h 	TP_ARGS(core, phase)
phase             406 include/uapi/linux/input.h 	__u16 phase;
phase              86 include/uapi/rdma/bnxt_re-abi.h 	__u32 phase;
phase             256 kernel/bpf/btf.c 	enum verifier_phase phase;
phase             744 kernel/bpf/btf.c 	if (env->phase != CHECK_META)
phase             780 kernel/bpf/btf.c 	if (env->phase != CHECK_META)
phase            3073 kernel/bpf/btf.c 	env->phase++;
phase             267 net/netfilter/nf_tables_api.c 				     enum nft_trans_phase phase)
phase             274 net/netfilter/nf_tables_api.c 			expr->ops->deactivate(ctx, expr, phase);
phase            3901 net/netfilter/nf_tables_api.c 			      enum nft_trans_phase phase)
phase            3903 net/netfilter/nf_tables_api.c 	switch (phase) {
phase            3913 net/netfilter/nf_tables_api.c 				     phase == NFT_TRANS_COMMIT);
phase            5646 net/netfilter/nf_tables_api.c 				    enum nft_trans_phase phase)
phase            5648 net/netfilter/nf_tables_api.c 	switch (phase) {
phase             258 net/netfilter/nft_dynset.c 				  enum nft_trans_phase phase)
phase             262 net/netfilter/nft_dynset.c 	nf_tables_deactivate_set(ctx, priv->set, &priv->binding, phase);
phase             182 net/netfilter/nft_flow_offload.c 					enum nft_trans_phase phase)
phase             186 net/netfilter/nft_flow_offload.c 	nf_tables_deactivate_flowtable(ctx, priv->flowtable, phase);
phase              74 net/netfilter/nft_immediate.c 				     enum nft_trans_phase phase)
phase              78 net/netfilter/nft_immediate.c 	if (phase == NFT_TRANS_COMMIT)
phase             120 net/netfilter/nft_lookup.c 				  enum nft_trans_phase phase)
phase             124 net/netfilter/nft_lookup.c 	nf_tables_deactivate_set(ctx, priv->set, &priv->binding, phase);
phase              67 net/netfilter/nft_objref.c 				  enum nft_trans_phase phase)
phase              71 net/netfilter/nft_objref.c 	if (phase == NFT_TRANS_COMMIT)
phase             171 net/netfilter/nft_objref.c 				      enum nft_trans_phase phase)
phase             175 net/netfilter/nft_objref.c 	nf_tables_deactivate_set(ctx, priv->set, &priv->binding, phase);
phase             327 sound/firewire/amdtp-stream.c 	unsigned int phase, data_blocks;
phase             342 sound/firewire/amdtp-stream.c 			phase = s->ctx_data.rx.data_block_state;
phase             354 sound/firewire/amdtp-stream.c 				data_blocks = 5 + ((phase & 1) ^
phase             355 sound/firewire/amdtp-stream.c 						   (phase == 0 || phase >= 40));
phase             358 sound/firewire/amdtp-stream.c 				data_blocks = 11 * (s->sfc >> 1) + (phase == 0);
phase             359 sound/firewire/amdtp-stream.c 			if (++phase >= (80 >> (s->sfc >> 1)))
phase             360 sound/firewire/amdtp-stream.c 				phase = 0;
phase             361 sound/firewire/amdtp-stream.c 			s->ctx_data.rx.data_block_state = phase;
phase             371 sound/firewire/amdtp-stream.c 	unsigned int syt_offset, phase, index, syt;
phase             388 sound/firewire/amdtp-stream.c 			phase = s->ctx_data.rx.syt_offset_state;
phase             389 sound/firewire/amdtp-stream.c 			index = phase % 13;
phase             392 sound/firewire/amdtp-stream.c 					      phase == 146);
phase             393 sound/firewire/amdtp-stream.c 			if (++phase >= 147)
phase             394 sound/firewire/amdtp-stream.c 				phase = 0;
phase             395 sound/firewire/amdtp-stream.c 			s->ctx_data.rx.syt_offset_state = phase;
phase              91 sound/usb/card.h 	unsigned int phase;		/* phase accumulator */
phase             141 sound/usb/endpoint.c 	ep->phase = (ep->phase & 0xffff)
phase             143 sound/usb/endpoint.c 	ret = min(ep->phase >> 16, ep->maxframesize);
phase             886 sound/usb/endpoint.c 	ep->phase = 0;
phase             938 sound/usb/endpoint.c 	ep->phase = 0;
phase              49 tools/testing/selftests/kvm/x86_64/smm_test.c void sync_with_host(uint64_t phase)
phase              52 tools/testing/selftests/kvm/x86_64/smm_test.c 		     : : "a" (phase));