CR 181 arch/arm/mach-rpc/dma.c writeb(DMA_CR_C, base + CR); CR 188 arch/arm/mach-rpc/dma.c writeb(ctrl, base + CR); CR 201 arch/arm/mach-rpc/dma.c writeb(0, base + CR); CR 78 arch/arm/mach-spear/time.c writew(CTRL_PRESCALER256, gpt_base + CR(CLKSRC)); CR 86 arch/arm/mach-spear/time.c val = readw(gpt_base + CR(CLKSRC)); CR 89 arch/arm/mach-spear/time.c writew(val, gpt_base + CR(CLKSRC)); CR 98 arch/arm/mach-spear/time.c u16 val = readw(gpt_base + CR(CLKEVT)); CR 102 arch/arm/mach-spear/time.c writew(val, gpt_base + CR(CLKEVT)); CR 119 arch/arm/mach-spear/time.c val = readw(gpt_base + CR(CLKEVT)); CR 121 arch/arm/mach-spear/time.c writew(val, gpt_base + CR(CLKEVT)); CR 138 arch/arm/mach-spear/time.c val = readw(gpt_base + CR(CLKEVT)); CR 141 arch/arm/mach-spear/time.c writew(val, gpt_base + CR(CLKEVT)); CR 160 arch/arm/mach-spear/time.c u16 val = readw(gpt_base + CR(CLKEVT)); CR 163 arch/arm/mach-spear/time.c writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT)); CR 168 arch/arm/mach-spear/time.c writew(val, gpt_base + CR(CLKEVT)); CR 195 arch/arm/mach-spear/time.c writew(CTRL_PRESCALER16, gpt_base + CR(CLKEVT)); CR 274 arch/powerpc/xmon/ppc-opc.c #define CRB CR + 1 CR 3893 arch/powerpc/xmon/ppc-opc.c {"bge-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3894 arch/powerpc/xmon/ppc-opc.c {"bge+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3895 arch/powerpc/xmon/ppc-opc.c {"bge", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3896 arch/powerpc/xmon/ppc-opc.c {"bnl-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3897 arch/powerpc/xmon/ppc-opc.c {"bnl+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3898 arch/powerpc/xmon/ppc-opc.c {"bnl", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3899 arch/powerpc/xmon/ppc-opc.c {"bgel-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3900 arch/powerpc/xmon/ppc-opc.c {"bgel+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3901 arch/powerpc/xmon/ppc-opc.c {"bgel", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3902 arch/powerpc/xmon/ppc-opc.c {"bnll-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3903 arch/powerpc/xmon/ppc-opc.c {"bnll+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3904 arch/powerpc/xmon/ppc-opc.c {"bnll", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3905 arch/powerpc/xmon/ppc-opc.c {"bgea-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3906 arch/powerpc/xmon/ppc-opc.c {"bgea+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3907 arch/powerpc/xmon/ppc-opc.c {"bgea", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3908 arch/powerpc/xmon/ppc-opc.c {"bnla-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3909 arch/powerpc/xmon/ppc-opc.c {"bnla+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3910 arch/powerpc/xmon/ppc-opc.c {"bnla", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3911 arch/powerpc/xmon/ppc-opc.c {"bgela-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3912 arch/powerpc/xmon/ppc-opc.c {"bgela+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3913 arch/powerpc/xmon/ppc-opc.c {"bgela", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3914 arch/powerpc/xmon/ppc-opc.c {"bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3915 arch/powerpc/xmon/ppc-opc.c {"bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3916 arch/powerpc/xmon/ppc-opc.c {"bnlla", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3917 arch/powerpc/xmon/ppc-opc.c {"ble-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3918 arch/powerpc/xmon/ppc-opc.c {"ble+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3919 arch/powerpc/xmon/ppc-opc.c {"ble", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3920 arch/powerpc/xmon/ppc-opc.c {"bng-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3921 arch/powerpc/xmon/ppc-opc.c {"bng+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3922 arch/powerpc/xmon/ppc-opc.c {"bng", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3923 arch/powerpc/xmon/ppc-opc.c {"blel-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3924 arch/powerpc/xmon/ppc-opc.c {"blel+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3925 arch/powerpc/xmon/ppc-opc.c {"blel", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3926 arch/powerpc/xmon/ppc-opc.c {"bngl-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3927 arch/powerpc/xmon/ppc-opc.c {"bngl+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3928 arch/powerpc/xmon/ppc-opc.c {"bngl", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3929 arch/powerpc/xmon/ppc-opc.c {"blea-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3930 arch/powerpc/xmon/ppc-opc.c {"blea+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3931 arch/powerpc/xmon/ppc-opc.c {"blea", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3932 arch/powerpc/xmon/ppc-opc.c {"bnga-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3933 arch/powerpc/xmon/ppc-opc.c {"bnga+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3934 arch/powerpc/xmon/ppc-opc.c {"bnga", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3935 arch/powerpc/xmon/ppc-opc.c {"blela-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3936 arch/powerpc/xmon/ppc-opc.c {"blela+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3937 arch/powerpc/xmon/ppc-opc.c {"blela", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3938 arch/powerpc/xmon/ppc-opc.c {"bngla-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3939 arch/powerpc/xmon/ppc-opc.c {"bngla+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3940 arch/powerpc/xmon/ppc-opc.c {"bngla", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3941 arch/powerpc/xmon/ppc-opc.c {"bne-", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3942 arch/powerpc/xmon/ppc-opc.c {"bne+", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3943 arch/powerpc/xmon/ppc-opc.c {"bne", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3944 arch/powerpc/xmon/ppc-opc.c {"bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3945 arch/powerpc/xmon/ppc-opc.c {"bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3946 arch/powerpc/xmon/ppc-opc.c {"bnel", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3947 arch/powerpc/xmon/ppc-opc.c {"bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3948 arch/powerpc/xmon/ppc-opc.c {"bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3949 arch/powerpc/xmon/ppc-opc.c {"bnea", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3950 arch/powerpc/xmon/ppc-opc.c {"bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3951 arch/powerpc/xmon/ppc-opc.c {"bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3952 arch/powerpc/xmon/ppc-opc.c {"bnela", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3953 arch/powerpc/xmon/ppc-opc.c {"bns-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3954 arch/powerpc/xmon/ppc-opc.c {"bns+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3955 arch/powerpc/xmon/ppc-opc.c {"bns", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3956 arch/powerpc/xmon/ppc-opc.c {"bnu-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3957 arch/powerpc/xmon/ppc-opc.c {"bnu+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3958 arch/powerpc/xmon/ppc-opc.c {"bnu", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}}, CR 3959 arch/powerpc/xmon/ppc-opc.c {"bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3960 arch/powerpc/xmon/ppc-opc.c {"bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3961 arch/powerpc/xmon/ppc-opc.c {"bnsl", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3962 arch/powerpc/xmon/ppc-opc.c {"bnul-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3963 arch/powerpc/xmon/ppc-opc.c {"bnul+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3964 arch/powerpc/xmon/ppc-opc.c {"bnul", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}}, CR 3965 arch/powerpc/xmon/ppc-opc.c {"bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3966 arch/powerpc/xmon/ppc-opc.c {"bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3967 arch/powerpc/xmon/ppc-opc.c {"bnsa", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3968 arch/powerpc/xmon/ppc-opc.c {"bnua-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3969 arch/powerpc/xmon/ppc-opc.c {"bnua+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3970 arch/powerpc/xmon/ppc-opc.c {"bnua", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}}, CR 3971 arch/powerpc/xmon/ppc-opc.c {"bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3972 arch/powerpc/xmon/ppc-opc.c {"bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3973 arch/powerpc/xmon/ppc-opc.c {"bnsla", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3974 arch/powerpc/xmon/ppc-opc.c {"bnula-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3975 arch/powerpc/xmon/ppc-opc.c {"bnula+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3976 arch/powerpc/xmon/ppc-opc.c {"bnula", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}}, CR 3978 arch/powerpc/xmon/ppc-opc.c {"blt-", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3979 arch/powerpc/xmon/ppc-opc.c {"blt+", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3980 arch/powerpc/xmon/ppc-opc.c {"blt", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3981 arch/powerpc/xmon/ppc-opc.c {"bltl-", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3982 arch/powerpc/xmon/ppc-opc.c {"bltl+", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3983 arch/powerpc/xmon/ppc-opc.c {"bltl", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3984 arch/powerpc/xmon/ppc-opc.c {"blta-", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3985 arch/powerpc/xmon/ppc-opc.c {"blta+", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3986 arch/powerpc/xmon/ppc-opc.c {"blta", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3987 arch/powerpc/xmon/ppc-opc.c {"bltla-", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3988 arch/powerpc/xmon/ppc-opc.c {"bltla+", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3989 arch/powerpc/xmon/ppc-opc.c {"bltla", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3990 arch/powerpc/xmon/ppc-opc.c {"bgt-", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3991 arch/powerpc/xmon/ppc-opc.c {"bgt+", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3992 arch/powerpc/xmon/ppc-opc.c {"bgt", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3993 arch/powerpc/xmon/ppc-opc.c {"bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 3994 arch/powerpc/xmon/ppc-opc.c {"bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 3995 arch/powerpc/xmon/ppc-opc.c {"bgtl", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 3996 arch/powerpc/xmon/ppc-opc.c {"bgta-", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 3997 arch/powerpc/xmon/ppc-opc.c {"bgta+", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 3998 arch/powerpc/xmon/ppc-opc.c {"bgta", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 3999 arch/powerpc/xmon/ppc-opc.c {"bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 4000 arch/powerpc/xmon/ppc-opc.c {"bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 4001 arch/powerpc/xmon/ppc-opc.c {"bgtla", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 4002 arch/powerpc/xmon/ppc-opc.c {"beq-", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 4003 arch/powerpc/xmon/ppc-opc.c {"beq+", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 4004 arch/powerpc/xmon/ppc-opc.c {"beq", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 4005 arch/powerpc/xmon/ppc-opc.c {"beql-", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 4006 arch/powerpc/xmon/ppc-opc.c {"beql+", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 4007 arch/powerpc/xmon/ppc-opc.c {"beql", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 4008 arch/powerpc/xmon/ppc-opc.c {"beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 4009 arch/powerpc/xmon/ppc-opc.c {"beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 4010 arch/powerpc/xmon/ppc-opc.c {"beqa", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 4011 arch/powerpc/xmon/ppc-opc.c {"beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 4012 arch/powerpc/xmon/ppc-opc.c {"beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 4013 arch/powerpc/xmon/ppc-opc.c {"beqla", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 4014 arch/powerpc/xmon/ppc-opc.c {"bso-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 4015 arch/powerpc/xmon/ppc-opc.c {"bso+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 4016 arch/powerpc/xmon/ppc-opc.c {"bso", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 4017 arch/powerpc/xmon/ppc-opc.c {"bun-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 4018 arch/powerpc/xmon/ppc-opc.c {"bun+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 4019 arch/powerpc/xmon/ppc-opc.c {"bun", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}}, CR 4020 arch/powerpc/xmon/ppc-opc.c {"bsol-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 4021 arch/powerpc/xmon/ppc-opc.c {"bsol+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 4022 arch/powerpc/xmon/ppc-opc.c {"bsol", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}}, CR 4023 arch/powerpc/xmon/ppc-opc.c {"bunl-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}}, CR 4024 arch/powerpc/xmon/ppc-opc.c {"bunl+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}}, CR 4025 arch/powerpc/xmon/ppc-opc.c {"bunl", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}}, CR 4026 arch/powerpc/xmon/ppc-opc.c {"bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 4027 arch/powerpc/xmon/ppc-opc.c {"bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 4028 arch/powerpc/xmon/ppc-opc.c {"bsoa", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 4029 arch/powerpc/xmon/ppc-opc.c {"buna-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 4030 arch/powerpc/xmon/ppc-opc.c {"buna+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 4031 arch/powerpc/xmon/ppc-opc.c {"buna", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}}, CR 4032 arch/powerpc/xmon/ppc-opc.c {"bsola-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 4033 arch/powerpc/xmon/ppc-opc.c {"bsola+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 4034 arch/powerpc/xmon/ppc-opc.c {"bsola", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}}, CR 4035 arch/powerpc/xmon/ppc-opc.c {"bunla-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}}, CR 4036 arch/powerpc/xmon/ppc-opc.c {"bunla+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}}, CR 4037 arch/powerpc/xmon/ppc-opc.c {"bunla", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}}, CR 4177 arch/powerpc/xmon/ppc-opc.c {"bgelr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4178 arch/powerpc/xmon/ppc-opc.c {"bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4179 arch/powerpc/xmon/ppc-opc.c {"bger", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4180 arch/powerpc/xmon/ppc-opc.c {"bnllr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4181 arch/powerpc/xmon/ppc-opc.c {"bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4182 arch/powerpc/xmon/ppc-opc.c {"bnlr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4183 arch/powerpc/xmon/ppc-opc.c {"bgelrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4184 arch/powerpc/xmon/ppc-opc.c {"bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4185 arch/powerpc/xmon/ppc-opc.c {"bgerl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4186 arch/powerpc/xmon/ppc-opc.c {"bnllrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4187 arch/powerpc/xmon/ppc-opc.c {"bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4188 arch/powerpc/xmon/ppc-opc.c {"bnlrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4189 arch/powerpc/xmon/ppc-opc.c {"blelr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4190 arch/powerpc/xmon/ppc-opc.c {"blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4191 arch/powerpc/xmon/ppc-opc.c {"bler", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4192 arch/powerpc/xmon/ppc-opc.c {"bnglr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4193 arch/powerpc/xmon/ppc-opc.c {"bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4194 arch/powerpc/xmon/ppc-opc.c {"bngr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4195 arch/powerpc/xmon/ppc-opc.c {"blelrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4196 arch/powerpc/xmon/ppc-opc.c {"blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4197 arch/powerpc/xmon/ppc-opc.c {"blerl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4198 arch/powerpc/xmon/ppc-opc.c {"bnglrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4199 arch/powerpc/xmon/ppc-opc.c {"bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4200 arch/powerpc/xmon/ppc-opc.c {"bngrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4201 arch/powerpc/xmon/ppc-opc.c {"bnelr", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4202 arch/powerpc/xmon/ppc-opc.c {"bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4203 arch/powerpc/xmon/ppc-opc.c {"bner", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4204 arch/powerpc/xmon/ppc-opc.c {"bnelrl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4205 arch/powerpc/xmon/ppc-opc.c {"bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4206 arch/powerpc/xmon/ppc-opc.c {"bnerl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4207 arch/powerpc/xmon/ppc-opc.c {"bnslr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4208 arch/powerpc/xmon/ppc-opc.c {"bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4209 arch/powerpc/xmon/ppc-opc.c {"bnsr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4210 arch/powerpc/xmon/ppc-opc.c {"bnulr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4211 arch/powerpc/xmon/ppc-opc.c {"bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4212 arch/powerpc/xmon/ppc-opc.c {"bnslrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4213 arch/powerpc/xmon/ppc-opc.c {"bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4214 arch/powerpc/xmon/ppc-opc.c {"bnsrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4215 arch/powerpc/xmon/ppc-opc.c {"bnulrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4216 arch/powerpc/xmon/ppc-opc.c {"bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4217 arch/powerpc/xmon/ppc-opc.c {"bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4218 arch/powerpc/xmon/ppc-opc.c {"bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4219 arch/powerpc/xmon/ppc-opc.c {"bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4220 arch/powerpc/xmon/ppc-opc.c {"bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4221 arch/powerpc/xmon/ppc-opc.c {"blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4222 arch/powerpc/xmon/ppc-opc.c {"bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4223 arch/powerpc/xmon/ppc-opc.c {"blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4224 arch/powerpc/xmon/ppc-opc.c {"bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4225 arch/powerpc/xmon/ppc-opc.c {"bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4226 arch/powerpc/xmon/ppc-opc.c {"bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4227 arch/powerpc/xmon/ppc-opc.c {"bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4228 arch/powerpc/xmon/ppc-opc.c {"bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4229 arch/powerpc/xmon/ppc-opc.c {"bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4230 arch/powerpc/xmon/ppc-opc.c {"bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4231 arch/powerpc/xmon/ppc-opc.c {"bgelr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4232 arch/powerpc/xmon/ppc-opc.c {"bnllr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4233 arch/powerpc/xmon/ppc-opc.c {"bgelrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4234 arch/powerpc/xmon/ppc-opc.c {"bnllrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4235 arch/powerpc/xmon/ppc-opc.c {"blelr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4236 arch/powerpc/xmon/ppc-opc.c {"bnglr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4237 arch/powerpc/xmon/ppc-opc.c {"blelrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4238 arch/powerpc/xmon/ppc-opc.c {"bnglrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4239 arch/powerpc/xmon/ppc-opc.c {"bnelr-", XLOCB(19,BOFM4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4240 arch/powerpc/xmon/ppc-opc.c {"bnelrl-", XLOCB(19,BOFM4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4241 arch/powerpc/xmon/ppc-opc.c {"bnslr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4242 arch/powerpc/xmon/ppc-opc.c {"bnulr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4243 arch/powerpc/xmon/ppc-opc.c {"bnslrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4244 arch/powerpc/xmon/ppc-opc.c {"bnulrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4245 arch/powerpc/xmon/ppc-opc.c {"bgelr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4246 arch/powerpc/xmon/ppc-opc.c {"bnllr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4247 arch/powerpc/xmon/ppc-opc.c {"bgelrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4248 arch/powerpc/xmon/ppc-opc.c {"bnllrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4249 arch/powerpc/xmon/ppc-opc.c {"blelr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4250 arch/powerpc/xmon/ppc-opc.c {"bnglr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4251 arch/powerpc/xmon/ppc-opc.c {"blelrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4252 arch/powerpc/xmon/ppc-opc.c {"bnglrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4253 arch/powerpc/xmon/ppc-opc.c {"bnelr+", XLOCB(19,BOFP4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4254 arch/powerpc/xmon/ppc-opc.c {"bnelrl+", XLOCB(19,BOFP4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4255 arch/powerpc/xmon/ppc-opc.c {"bnslr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4256 arch/powerpc/xmon/ppc-opc.c {"bnulr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4257 arch/powerpc/xmon/ppc-opc.c {"bnslrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4258 arch/powerpc/xmon/ppc-opc.c {"bnulrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4259 arch/powerpc/xmon/ppc-opc.c {"bltlr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4260 arch/powerpc/xmon/ppc-opc.c {"bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4261 arch/powerpc/xmon/ppc-opc.c {"bltr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4262 arch/powerpc/xmon/ppc-opc.c {"bltlrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4263 arch/powerpc/xmon/ppc-opc.c {"bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4264 arch/powerpc/xmon/ppc-opc.c {"bltrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4265 arch/powerpc/xmon/ppc-opc.c {"bgtlr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4266 arch/powerpc/xmon/ppc-opc.c {"bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4267 arch/powerpc/xmon/ppc-opc.c {"bgtr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4268 arch/powerpc/xmon/ppc-opc.c {"bgtlrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4269 arch/powerpc/xmon/ppc-opc.c {"bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4270 arch/powerpc/xmon/ppc-opc.c {"bgtrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4271 arch/powerpc/xmon/ppc-opc.c {"beqlr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4272 arch/powerpc/xmon/ppc-opc.c {"beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4273 arch/powerpc/xmon/ppc-opc.c {"beqr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4274 arch/powerpc/xmon/ppc-opc.c {"beqlrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4275 arch/powerpc/xmon/ppc-opc.c {"beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4276 arch/powerpc/xmon/ppc-opc.c {"beqrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4277 arch/powerpc/xmon/ppc-opc.c {"bsolr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4278 arch/powerpc/xmon/ppc-opc.c {"bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4279 arch/powerpc/xmon/ppc-opc.c {"bsor", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4280 arch/powerpc/xmon/ppc-opc.c {"bunlr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4281 arch/powerpc/xmon/ppc-opc.c {"bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4282 arch/powerpc/xmon/ppc-opc.c {"bsolrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4283 arch/powerpc/xmon/ppc-opc.c {"bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4284 arch/powerpc/xmon/ppc-opc.c {"bsorl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}}, CR 4285 arch/powerpc/xmon/ppc-opc.c {"bunlrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4286 arch/powerpc/xmon/ppc-opc.c {"bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4287 arch/powerpc/xmon/ppc-opc.c {"bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4288 arch/powerpc/xmon/ppc-opc.c {"bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4289 arch/powerpc/xmon/ppc-opc.c {"bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4290 arch/powerpc/xmon/ppc-opc.c {"bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4291 arch/powerpc/xmon/ppc-opc.c {"beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4292 arch/powerpc/xmon/ppc-opc.c {"beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4293 arch/powerpc/xmon/ppc-opc.c {"bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4294 arch/powerpc/xmon/ppc-opc.c {"bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4295 arch/powerpc/xmon/ppc-opc.c {"bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4296 arch/powerpc/xmon/ppc-opc.c {"bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4297 arch/powerpc/xmon/ppc-opc.c {"bltlr-", XLOCB(19,BOTM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4298 arch/powerpc/xmon/ppc-opc.c {"bltlrl-", XLOCB(19,BOTM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4299 arch/powerpc/xmon/ppc-opc.c {"bgtlr-", XLOCB(19,BOTM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4300 arch/powerpc/xmon/ppc-opc.c {"bgtlrl-", XLOCB(19,BOTM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4301 arch/powerpc/xmon/ppc-opc.c {"beqlr-", XLOCB(19,BOTM4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4302 arch/powerpc/xmon/ppc-opc.c {"beqlrl-", XLOCB(19,BOTM4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4303 arch/powerpc/xmon/ppc-opc.c {"bsolr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4304 arch/powerpc/xmon/ppc-opc.c {"bunlr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4305 arch/powerpc/xmon/ppc-opc.c {"bsolrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4306 arch/powerpc/xmon/ppc-opc.c {"bunlrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4307 arch/powerpc/xmon/ppc-opc.c {"bltlr+", XLOCB(19,BOTP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4308 arch/powerpc/xmon/ppc-opc.c {"bltlrl+", XLOCB(19,BOTP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4309 arch/powerpc/xmon/ppc-opc.c {"bgtlr+", XLOCB(19,BOTP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4310 arch/powerpc/xmon/ppc-opc.c {"bgtlrl+", XLOCB(19,BOTP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4311 arch/powerpc/xmon/ppc-opc.c {"beqlr+", XLOCB(19,BOTP4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4312 arch/powerpc/xmon/ppc-opc.c {"beqlrl+", XLOCB(19,BOTP4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4313 arch/powerpc/xmon/ppc-opc.c {"bsolr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4314 arch/powerpc/xmon/ppc-opc.c {"bunlr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4315 arch/powerpc/xmon/ppc-opc.c {"bsolrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4316 arch/powerpc/xmon/ppc-opc.c {"bunlrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4429 arch/powerpc/xmon/ppc-opc.c {"bgectr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4430 arch/powerpc/xmon/ppc-opc.c {"bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4431 arch/powerpc/xmon/ppc-opc.c {"bnlctr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4432 arch/powerpc/xmon/ppc-opc.c {"bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4433 arch/powerpc/xmon/ppc-opc.c {"bgectrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4434 arch/powerpc/xmon/ppc-opc.c {"bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4435 arch/powerpc/xmon/ppc-opc.c {"bnlctrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4436 arch/powerpc/xmon/ppc-opc.c {"bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4437 arch/powerpc/xmon/ppc-opc.c {"blectr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4438 arch/powerpc/xmon/ppc-opc.c {"blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4439 arch/powerpc/xmon/ppc-opc.c {"bngctr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4440 arch/powerpc/xmon/ppc-opc.c {"bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4441 arch/powerpc/xmon/ppc-opc.c {"blectrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4442 arch/powerpc/xmon/ppc-opc.c {"blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4443 arch/powerpc/xmon/ppc-opc.c {"bngctrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4444 arch/powerpc/xmon/ppc-opc.c {"bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4445 arch/powerpc/xmon/ppc-opc.c {"bnectr", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4446 arch/powerpc/xmon/ppc-opc.c {"bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4447 arch/powerpc/xmon/ppc-opc.c {"bnectrl", XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4448 arch/powerpc/xmon/ppc-opc.c {"bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4449 arch/powerpc/xmon/ppc-opc.c {"bnsctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4450 arch/powerpc/xmon/ppc-opc.c {"bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4451 arch/powerpc/xmon/ppc-opc.c {"bnuctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4452 arch/powerpc/xmon/ppc-opc.c {"bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4453 arch/powerpc/xmon/ppc-opc.c {"bnsctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4454 arch/powerpc/xmon/ppc-opc.c {"bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4455 arch/powerpc/xmon/ppc-opc.c {"bnuctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4456 arch/powerpc/xmon/ppc-opc.c {"bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4457 arch/powerpc/xmon/ppc-opc.c {"bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4458 arch/powerpc/xmon/ppc-opc.c {"bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4459 arch/powerpc/xmon/ppc-opc.c {"bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4460 arch/powerpc/xmon/ppc-opc.c {"bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4461 arch/powerpc/xmon/ppc-opc.c {"blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4462 arch/powerpc/xmon/ppc-opc.c {"bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4463 arch/powerpc/xmon/ppc-opc.c {"blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4464 arch/powerpc/xmon/ppc-opc.c {"bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4465 arch/powerpc/xmon/ppc-opc.c {"bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4466 arch/powerpc/xmon/ppc-opc.c {"bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4467 arch/powerpc/xmon/ppc-opc.c {"bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4468 arch/powerpc/xmon/ppc-opc.c {"bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4469 arch/powerpc/xmon/ppc-opc.c {"bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4470 arch/powerpc/xmon/ppc-opc.c {"bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4471 arch/powerpc/xmon/ppc-opc.c {"bgectr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4472 arch/powerpc/xmon/ppc-opc.c {"bnlctr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4473 arch/powerpc/xmon/ppc-opc.c {"bgectrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4474 arch/powerpc/xmon/ppc-opc.c {"bnlctrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4475 arch/powerpc/xmon/ppc-opc.c {"blectr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4476 arch/powerpc/xmon/ppc-opc.c {"bngctr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4477 arch/powerpc/xmon/ppc-opc.c {"blectrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4478 arch/powerpc/xmon/ppc-opc.c {"bngctrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4479 arch/powerpc/xmon/ppc-opc.c {"bnectr-", XLOCB(19,BOFM4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4480 arch/powerpc/xmon/ppc-opc.c {"bnectrl-",XLOCB(19,BOFM4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4481 arch/powerpc/xmon/ppc-opc.c {"bnsctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4482 arch/powerpc/xmon/ppc-opc.c {"bnuctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4483 arch/powerpc/xmon/ppc-opc.c {"bnsctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4484 arch/powerpc/xmon/ppc-opc.c {"bnuctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4485 arch/powerpc/xmon/ppc-opc.c {"bgectr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4486 arch/powerpc/xmon/ppc-opc.c {"bnlctr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4487 arch/powerpc/xmon/ppc-opc.c {"bgectrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4488 arch/powerpc/xmon/ppc-opc.c {"bnlctrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4489 arch/powerpc/xmon/ppc-opc.c {"blectr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4490 arch/powerpc/xmon/ppc-opc.c {"bngctr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4491 arch/powerpc/xmon/ppc-opc.c {"blectrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4492 arch/powerpc/xmon/ppc-opc.c {"bngctrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4493 arch/powerpc/xmon/ppc-opc.c {"bnectr+", XLOCB(19,BOFP4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4494 arch/powerpc/xmon/ppc-opc.c {"bnectrl+",XLOCB(19,BOFP4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4495 arch/powerpc/xmon/ppc-opc.c {"bnsctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4496 arch/powerpc/xmon/ppc-opc.c {"bnuctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4497 arch/powerpc/xmon/ppc-opc.c {"bnsctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4498 arch/powerpc/xmon/ppc-opc.c {"bnuctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4499 arch/powerpc/xmon/ppc-opc.c {"bltctr", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4500 arch/powerpc/xmon/ppc-opc.c {"bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4501 arch/powerpc/xmon/ppc-opc.c {"bltctrl", XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4502 arch/powerpc/xmon/ppc-opc.c {"bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4503 arch/powerpc/xmon/ppc-opc.c {"bgtctr", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4504 arch/powerpc/xmon/ppc-opc.c {"bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4505 arch/powerpc/xmon/ppc-opc.c {"bgtctrl", XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4506 arch/powerpc/xmon/ppc-opc.c {"bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4507 arch/powerpc/xmon/ppc-opc.c {"beqctr", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4508 arch/powerpc/xmon/ppc-opc.c {"beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4509 arch/powerpc/xmon/ppc-opc.c {"beqctrl", XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4510 arch/powerpc/xmon/ppc-opc.c {"beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4511 arch/powerpc/xmon/ppc-opc.c {"bsoctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4512 arch/powerpc/xmon/ppc-opc.c {"bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4513 arch/powerpc/xmon/ppc-opc.c {"bunctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4514 arch/powerpc/xmon/ppc-opc.c {"bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4515 arch/powerpc/xmon/ppc-opc.c {"bsoctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4516 arch/powerpc/xmon/ppc-opc.c {"bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4517 arch/powerpc/xmon/ppc-opc.c {"bunctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}}, CR 4518 arch/powerpc/xmon/ppc-opc.c {"bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4519 arch/powerpc/xmon/ppc-opc.c {"bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4520 arch/powerpc/xmon/ppc-opc.c {"bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4521 arch/powerpc/xmon/ppc-opc.c {"bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4522 arch/powerpc/xmon/ppc-opc.c {"bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4523 arch/powerpc/xmon/ppc-opc.c {"beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4524 arch/powerpc/xmon/ppc-opc.c {"beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4525 arch/powerpc/xmon/ppc-opc.c {"bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4526 arch/powerpc/xmon/ppc-opc.c {"bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4527 arch/powerpc/xmon/ppc-opc.c {"bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4528 arch/powerpc/xmon/ppc-opc.c {"bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}}, CR 4529 arch/powerpc/xmon/ppc-opc.c {"bltctr-", XLOCB(19,BOTM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4530 arch/powerpc/xmon/ppc-opc.c {"bltctrl-",XLOCB(19,BOTM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4531 arch/powerpc/xmon/ppc-opc.c {"bgtctr-", XLOCB(19,BOTM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4532 arch/powerpc/xmon/ppc-opc.c {"bgtctrl-",XLOCB(19,BOTM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4533 arch/powerpc/xmon/ppc-opc.c {"beqctr-", XLOCB(19,BOTM4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4534 arch/powerpc/xmon/ppc-opc.c {"beqctrl-",XLOCB(19,BOTM4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4535 arch/powerpc/xmon/ppc-opc.c {"bsoctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4536 arch/powerpc/xmon/ppc-opc.c {"bunctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4537 arch/powerpc/xmon/ppc-opc.c {"bsoctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4538 arch/powerpc/xmon/ppc-opc.c {"bunctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4539 arch/powerpc/xmon/ppc-opc.c {"bltctr+", XLOCB(19,BOTP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4540 arch/powerpc/xmon/ppc-opc.c {"bltctrl+",XLOCB(19,BOTP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4541 arch/powerpc/xmon/ppc-opc.c {"bgtctr+", XLOCB(19,BOTP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4542 arch/powerpc/xmon/ppc-opc.c {"bgtctrl+",XLOCB(19,BOTP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4543 arch/powerpc/xmon/ppc-opc.c {"beqctr+", XLOCB(19,BOTP4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4544 arch/powerpc/xmon/ppc-opc.c {"beqctrl+",XLOCB(19,BOTP4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4545 arch/powerpc/xmon/ppc-opc.c {"bsoctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4546 arch/powerpc/xmon/ppc-opc.c {"bunctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4547 arch/powerpc/xmon/ppc-opc.c {"bsoctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 4548 arch/powerpc/xmon/ppc-opc.c {"bunctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}}, CR 7154 arch/powerpc/xmon/ppc-opc.c {"e_mcrf", XL(31,16), XL_MASK, PPCVLE, 0, {CRD, CR}}, CR 138 arch/sh/drivers/pci/pci-sh5.c uval = SH5PCI_READ(CR); CR 141 arch/sh/drivers/pci/pci-sh5.c SH5PCI_WRITE(CR, uval | CR_LOCK_MASK | CR_CFINT| CR_FTO | CR_PFE | CR 144 arch/sh/drivers/pci/pci-sh5.c uval=SH5PCI_READ(CR); CR 93 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CR(b, v) SET_GLOBAL_REG(CR, (b), (v)) CR 109 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_CR(b) GET_GLOBAL_REG(CR, (b)) CR 205 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RPUE(b, v) SET_GLOBAL_FIELD(b, CR, RPUE, v) CR 206 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RPUERE(b, v) SET_GLOBAL_FIELD(b, CR, RPUERE, v) CR 207 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RPUEIE(b, v) SET_GLOBAL_FIELD(b, CR, RPUEIE, v) CR 208 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_DCDEE(b, v) SET_GLOBAL_FIELD(b, CR, DCDEE, v) CR 209 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CLIENTPD(b, v) SET_GLOBAL_FIELD(b, CR, CLIENTPD, v) CR 210 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_STALLD(b, v) SET_GLOBAL_FIELD(b, CR, STALLD, v) CR 211 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBLKCRWE(b, v) SET_GLOBAL_FIELD(b, CR, TLBLKCRWE, v) CR 212 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CR_TLBIALLCFG(b, v) SET_GLOBAL_FIELD(b, CR, CR_TLBIALLCFG, v) CR 213 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBIVMIDCFG(b, v) SET_GLOBAL_FIELD(b, CR, TLBIVMIDCFG, v) CR 214 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CR_HUME(b, v) SET_GLOBAL_FIELD(b, CR, CR_HUME, v) CR 322 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_RPUE(b) GET_GLOBAL_FIELD(b, CR, RPUE) CR 323 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_RPUERE(b) GET_GLOBAL_FIELD(b, CR, RPUERE) CR 324 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_RPUEIE(b) GET_GLOBAL_FIELD(b, CR, RPUEIE) CR 325 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_DCDEE(b) GET_GLOBAL_FIELD(b, CR, DCDEE) CR 326 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_CLIENTPD(b) GET_GLOBAL_FIELD(b, CR, CLIENTPD) CR 327 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_STALLD(b) GET_GLOBAL_FIELD(b, CR, STALLD) CR 328 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_TLBLKCRWE(b) GET_GLOBAL_FIELD(b, CR, TLBLKCRWE) CR 329 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_CR_TLBIALLCFG(b) GET_GLOBAL_FIELD(b, CR, CR_TLBIALLCFG) CR 330 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_TLBIVMIDCFG(b) GET_GLOBAL_FIELD(b, CR, TLBIVMIDCFG) CR 331 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_CR_HUME(b) GET_GLOBAL_FIELD(b, CR, CR_HUME) CR 262 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VO_NA_COLOR_CR(CR) (((CR)/16)<<0) CR 3210 drivers/net/ethernet/amd/xgbe/xgbe-dev.c XGMAC_IOWRITE_BITS(pdata, MMC_CR, CR, 1); CR 455 drivers/net/ethernet/natsemi/ns83820.c #define __kick_rx(dev) writel(CR_RXE, dev->base + CR) CR 948 drivers/net/ethernet/natsemi/ns83820.c writel(CR_TXE, dev->base + CR); CR 1449 drivers/net/ethernet/natsemi/ns83820.c writel(CR_RXE, dev->base + CR); CR 1519 drivers/net/ethernet/natsemi/ns83820.c writel(which, dev->base + CR); CR 1522 drivers/net/ethernet/natsemi/ns83820.c } while (readl(dev->base + CR) & which); CR 302 drivers/net/usb/rtl8150.c get_registers(dev, CR, 1, &cr); CR 305 drivers/net/usb/rtl8150.c set_registers(dev, CR, 1, &cr); CR 314 drivers/net/usb/rtl8150.c set_registers(dev, CR, 1, &cr); CR 325 drivers/net/usb/rtl8150.c set_registers(dev, CR, 1, &data); CR 327 drivers/net/usb/rtl8150.c get_registers(dev, CR, 1, &data); CR 643 drivers/net/usb/rtl8150.c set_registers(dev, CR, 1, &cr); CR 653 drivers/net/usb/rtl8150.c get_registers(dev, CR, 1, &cr); CR 655 drivers/net/usb/rtl8150.c set_registers(dev, CR, 1, &cr); CR 451 drivers/spi/spi-at91-usart.c at91_usart_spi_writel(aus, CR, US_ENABLE); CR 463 drivers/spi/spi-at91-usart.c at91_usart_spi_writel(aus, CR, US_RESET | US_DISABLE); CR 480 drivers/spi/spi-at91-usart.c at91_usart_spi_writel(aus, CR, US_RESET | US_DISABLE); CR 418 drivers/spi/spi-atmel.c spi_writel(as, CR, SPI_BIT(LASTXFER)); CR 664 drivers/spi/spi-atmel.c spi_writel(as, CR, SPI_BIT(RXFCLR) | SPI_BIT(TXFCLR)); CR 1469 drivers/spi/spi-atmel.c spi_writel(as, CR, SPI_BIT(SWRST)); CR 1470 drivers/spi/spi-atmel.c spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ CR 1474 drivers/spi/spi-atmel.c spi_writel(as, CR, SPI_BIT(FIFOEN)); CR 1485 drivers/spi/spi-atmel.c spi_writel(as, CR, SPI_BIT(SPIEN)); CR 1653 drivers/spi/spi-atmel.c spi_writel(as, CR, SPI_BIT(SWRST)); CR 1654 drivers/spi/spi-atmel.c spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ CR 1685 drivers/spi/spi-atmel.c spi_writel(as, CR, SPI_BIT(SWRST)); CR 1686 drivers/spi/spi-atmel.c spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ CR 90 drivers/staging/rtl8712/usb_halinit.c r8712_write8(adapter, CR, val8); CR 92 drivers/staging/rtl8712/usb_halinit.c r8712_write8(adapter, CR + 1, val8); CR 154 drivers/staging/rtl8712/usb_halinit.c r8712_write8(adapter, CR, 0xFC); CR 155 drivers/staging/rtl8712/usb_halinit.c r8712_write8(adapter, CR + 1, 0x37); CR 250 drivers/staging/rtl8712/usb_halinit.c r8712_write8(adapter, CR, 0xFC); CR 251 drivers/staging/rtl8712/usb_halinit.c r8712_write8(adapter, CR + 1, 0x37); CR 271 drivers/staging/rtl8712/usb_halinit.c val8 = r8712_read8(adapter, CR); CR 272 drivers/staging/rtl8712/usb_halinit.c r8712_write8(adapter, CR, val8 & (~_TXDMA_EN)); CR 275 drivers/staging/rtl8712/usb_halinit.c r8712_write8(adapter, CR, val8 | _TXDMA_EN); CR 523 drivers/usb/misc/sisusbvga/sisusb_init.c SiS_Pr->SiS_CRT1Table[index].CR[i]); CR 527 drivers/usb/misc/sisusbvga/sisusb_init.c SiS_Pr->SiS_CRT1Table[index].CR[i]); CR 531 drivers/usb/misc/sisusbvga/sisusb_init.c SiS_Pr->SiS_CRT1Table[index].CR[i]); CR 535 drivers/usb/misc/sisusbvga/sisusb_init.c SiS_Pr->SiS_CRT1Table[index].CR[i]); CR 538 drivers/usb/misc/sisusbvga/sisusb_init.c temp = SiS_Pr->SiS_CRT1Table[index].CR[16] & 0xE0; CR 541 drivers/usb/misc/sisusbvga/sisusb_init.c temp = ((SiS_Pr->SiS_CRT1Table[index].CR[16]) & 0x01) << 5; CR 112 drivers/usb/misc/sisusbvga/sisusb_struct.h unsigned char CR[17]; CR 2092 drivers/video/fbdev/sis/init.c crt1data = (unsigned char *)&SiS_Pr->SiS_CRT1Table[temp].CR[0]; CR 3358 drivers/video/fbdev/sis/init301.c tempax = SiS_Pr->SiS_CRT1Table[index].CR[0]; CR 3359 drivers/video/fbdev/sis/init301.c tempax |= (SiS_Pr->SiS_CRT1Table[index].CR[14] << 8); CR 3361 drivers/video/fbdev/sis/init301.c tempbx = SiS_Pr->SiS_CRT1Table[index].CR[6]; CR 3362 drivers/video/fbdev/sis/init301.c tempcx = SiS_Pr->SiS_CRT1Table[index].CR[13] << 8; CR 3366 drivers/video/fbdev/sis/init301.c temp1 = SiS_Pr->SiS_CRT1Table[index].CR[7]; CR 6371 drivers/video/fbdev/sis/init301.c cr4 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[4]; CR 6372 drivers/video/fbdev/sis/init301.c cr14 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14]; CR 6373 drivers/video/fbdev/sis/init301.c cr5 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[5]; CR 6374 drivers/video/fbdev/sis/init301.c cr15 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[15]; CR 6459 drivers/video/fbdev/sis/init301.c cr8 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[8]; CR 6460 drivers/video/fbdev/sis/init301.c cr7 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7]; CR 6461 drivers/video/fbdev/sis/init301.c cr13 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13]; CR 6462 drivers/video/fbdev/sis/init301.c tempcx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[9]; CR 6788 drivers/video/fbdev/sis/init301.c SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]); CR 6789 drivers/video/fbdev/sis/init301.c SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x02,0x80,(CRT2Part2Ptr+resindex)->CR[1]); CR 6791 drivers/video/fbdev/sis/init301.c SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); CR 6794 drivers/video/fbdev/sis/init301.c SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); CR 6797 drivers/video/fbdev/sis/init301.c SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); CR 6799 drivers/video/fbdev/sis/init301.c SiS_SetReg(SiS_Pr->SiS_Part2Port,0x23,(CRT2Part2Ptr+resindex)->CR[10]); CR 6800 drivers/video/fbdev/sis/init301.c SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]); CR 7299 drivers/video/fbdev/sis/init301.c SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]); CR 7300 drivers/video/fbdev/sis/init301.c SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x02,0x80,(CRT2Part2Ptr+resindex)->CR[1]); CR 7302 drivers/video/fbdev/sis/init301.c SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); CR 7305 drivers/video/fbdev/sis/init301.c SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); CR 7308 drivers/video/fbdev/sis/init301.c SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); CR 7310 drivers/video/fbdev/sis/init301.c SiS_SetReg(SiS_Pr->SiS_Part2Port,0x23,(CRT2Part2Ptr+resindex)->CR[10]); CR 7311 drivers/video/fbdev/sis/init301.c SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]); CR 8061 drivers/video/fbdev/sis/init301.c tempah = (LVDSCRT1Ptr + ResIndex)->CR[i]; CR 8066 drivers/video/fbdev/sis/init301.c tempah = (LVDSCRT1Ptr + ResIndex)->CR[j]; CR 8070 drivers/video/fbdev/sis/init301.c tempah = (LVDSCRT1Ptr + ResIndex)->CR[14] & 0xE0; CR 8076 drivers/video/fbdev/sis/init301.c tempah = ((LVDSCRT1Ptr + ResIndex)->CR[14] & 0x01) << 5; CR 116 drivers/video/fbdev/sis/initextlfb.c (unsigned char *)&SiS_Pr->SiS_CRT1Table[index].CR[0], CR 199 drivers/video/fbdev/sis/initextlfb.c sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14]; CR 200 drivers/video/fbdev/sis/initextlfb.c cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0]; CR 203 drivers/video/fbdev/sis/initextlfb.c sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13]; CR 204 drivers/video/fbdev/sis/initextlfb.c cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6]; CR 205 drivers/video/fbdev/sis/initextlfb.c cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7]; CR 99 drivers/video/fbdev/sis/vstruct.h unsigned char CR[15]; CR 173 drivers/video/fbdev/sis/vstruct.h unsigned char CR[12]; CR 177 drivers/video/fbdev/sis/vstruct.h unsigned char CR[17]; CR 25 fs/gfs2/trace_gfs2.h dlm_state_name(CR), \ CR 288 sound/soc/atmel/atmel_ssc_dai.c ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST)); CR 360 sound/soc/atmel/atmel_ssc_dai.c ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST)); CR 724 sound/soc/atmel/atmel_ssc_dai.c ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable); CR 752 sound/soc/atmel/atmel_ssc_dai.c ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_enable); CR 755 sound/soc/atmel/atmel_ssc_dai.c ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable); CR 775 sound/soc/atmel/atmel_ssc_dai.c ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_TXDIS) | SSC_BIT(CR_RXDIS)); CR 819 sound/soc/atmel/atmel_ssc_dai.c ssc_writel(ssc_p->ssc->regs, CR, cr); CR 859 sound/spi/at73c213.c ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); CR 873 sound/spi/at73c213.c ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); CR 1020 sound/spi/at73c213.c ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); CR 1088 sound/spi/at73c213.c ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); CR 1102 sound/spi/at73c213.c ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));