pciu_write 134 arch/mips/pci/pci-vr41xx.c pciu_write(PCICLKSELREG, EQUAL_VTCLOCK); pciu_write 136 arch/mips/pci/pci-vr41xx.c pciu_write(PCICLKSELREG, HALF_VTCLOCK); pciu_write 139 arch/mips/pci/pci-vr41xx.c pciu_write(PCICLKSELREG, ONE_THIRD_VTCLOCK); pciu_write 141 arch/mips/pci/pci-vr41xx.c pciu_write(PCICLKSELREG, QUARTER_VTCLOCK); pciu_write 157 arch/mips/pci/pci-vr41xx.c pciu_write(PCIMMAW1REG, val); pciu_write 161 arch/mips/pci/pci-vr41xx.c pciu_write(PCIMMAW1REG, val); pciu_write 170 arch/mips/pci/pci-vr41xx.c pciu_write(PCIMMAW2REG, val); pciu_write 174 arch/mips/pci/pci-vr41xx.c pciu_write(PCIMMAW2REG, val); pciu_write 182 arch/mips/pci/pci-vr41xx.c pciu_write(PCITAW1REG, val); pciu_write 186 arch/mips/pci/pci-vr41xx.c pciu_write(PCITAW1REG, val); pciu_write 194 arch/mips/pci/pci-vr41xx.c pciu_write(PCITAW2REG, val); pciu_write 198 arch/mips/pci/pci-vr41xx.c pciu_write(PCITAW2REG, val); pciu_write 207 arch/mips/pci/pci-vr41xx.c pciu_write(PCIMIOAWREG, val); pciu_write 211 arch/mips/pci/pci-vr41xx.c pciu_write(PCIMIOAWREG, val); pciu_write 215 arch/mips/pci/pci-vr41xx.c pciu_write(PCIEXACCREG, UNLOCK); pciu_write 217 arch/mips/pci/pci-vr41xx.c pciu_write(PCIEXACCREG, 0); pciu_write 220 arch/mips/pci/pci-vr41xx.c pciu_write(PCITRDYVREG, TRDYV(setup->wait_time_limit_from_irdy_to_trdy)); pciu_write 222 arch/mips/pci/pci-vr41xx.c pciu_write(LATTIMEREG, MLTIM(setup->master_latency_timer)); pciu_write 228 arch/mips/pci/pci-vr41xx.c pciu_write(MAILBAREG, val); pciu_write 235 arch/mips/pci/pci-vr41xx.c pciu_write(PCIMBA1REG, val); pciu_write 242 arch/mips/pci/pci-vr41xx.c pciu_write(PCIMBA2REG, val); pciu_write 248 arch/mips/pci/pci-vr41xx.c pciu_write(RETVALREG, val); pciu_write 268 arch/mips/pci/pci-vr41xx.c pciu_write(PCIAPCNTREG, val); pciu_write 270 arch/mips/pci/pci-vr41xx.c pciu_write(COMMANDREG, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | pciu_write 277 arch/mips/pci/pci-vr41xx.c pciu_write(PCIENREG, PCIU_CONFIG_DONE);