pcie_w32          105 arch/mips/pci/pci-mt7620.c 	pcie_w32(val, reg);
pcie_w32          130 arch/mips/pci/pci-mt7620.c 	pcie_w32(WRITE_MODE | (val << DATA_SHIFT) | (addr << ADDR_SHIFT),
pcie_w32          344 arch/mips/pci/pci-mt7620.c 	pcie_w32(0x7FFF0001, RALINK_PCI0_BAR0SETUP_ADDR);
pcie_w32          345 arch/mips/pci/pci-mt7620.c 	pcie_w32(RALINK_PCI_MEMORY_BASE, RALINK_PCI0_IMBASEBAR0_ADDR);
pcie_w32          346 arch/mips/pci/pci-mt7620.c 	pcie_w32(0x06040001, RALINK_PCI0_CLASS);
pcie_w32          368 arch/mips/pci/pci-mt7620.c 		pcie_w32(0x7FFF0001, RALINK_PCI0_BAR0SETUP_ADDR);