CQSPI_REG_INDIRECTWR  637 drivers/mtd/spi-nor/cadence-quadspi.c 	       reg_base + CQSPI_REG_INDIRECTWR);
CQSPI_REG_INDIRECTWR  681 drivers/mtd/spi-nor/cadence-quadspi.c 	ret = cqspi_wait_for_bit(reg_base + CQSPI_REG_INDIRECTWR,
CQSPI_REG_INDIRECTWR  693 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_REG_INDIRECTWR_DONE_MASK, reg_base + CQSPI_REG_INDIRECTWR);
CQSPI_REG_INDIRECTWR  705 drivers/mtd/spi-nor/cadence-quadspi.c 	       reg_base + CQSPI_REG_INDIRECTWR);