CQSPI_REG_INDIRECTRD  527 drivers/mtd/spi-nor/cadence-quadspi.c 	       reg_base + CQSPI_REG_INDIRECTRD);
CQSPI_REG_INDIRECTRD  570 drivers/mtd/spi-nor/cadence-quadspi.c 	ret = cqspi_wait_for_bit(reg_base + CQSPI_REG_INDIRECTRD,
CQSPI_REG_INDIRECTRD  582 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_REG_INDIRECTRD_DONE_MASK, reg_base + CQSPI_REG_INDIRECTRD);
CQSPI_REG_INDIRECTRD  592 drivers/mtd/spi-nor/cadence-quadspi.c 	       reg_base + CQSPI_REG_INDIRECTRD);