pch_dbg           229 drivers/i2c/busses/i2c-eg20t.c 		pch_dbg(adap, "Fast mode enabled\n");
pch_dbg           245 drivers/i2c/busses/i2c-eg20t.c 	pch_dbg(adap,
pch_dbg           266 drivers/i2c/busses/i2c-eg20t.c 			pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));
pch_dbg           296 drivers/i2c/busses/i2c-eg20t.c 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
pch_dbg           307 drivers/i2c/busses/i2c-eg20t.c 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
pch_dbg           339 drivers/i2c/busses/i2c-eg20t.c 		pch_dbg(adap, "Receive NACK for slave address setting\n");
pch_dbg           353 drivers/i2c/busses/i2c-eg20t.c 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
pch_dbg           386 drivers/i2c/busses/i2c-eg20t.c 	pch_dbg(adap, "I2CCTL = %x msgs->len = %d\n", ioread32(p + PCH_I2CCTL),
pch_dbg           420 drivers/i2c/busses/i2c-eg20t.c 		pch_dbg(adap, "writing %x to Data register\n", buf[wrcount]);
pch_dbg           436 drivers/i2c/busses/i2c-eg20t.c 	pch_dbg(adap, "return=%d\n", wrcount);
pch_dbg           448 drivers/i2c/busses/i2c-eg20t.c 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
pch_dbg           459 drivers/i2c/busses/i2c-eg20t.c 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
pch_dbg           472 drivers/i2c/busses/i2c-eg20t.c 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
pch_dbg           608 drivers/i2c/busses/i2c-eg20t.c 	pch_dbg(adap, "PCH_I2CSR = %x\n", ioread32(p + PCH_I2CSR));
pch_dbg           671 drivers/i2c/busses/i2c-eg20t.c 	pch_dbg(adap, "adap->p_adapter_info->pch_i2c_suspended is %d\n",
pch_dbg           680 drivers/i2c/busses/i2c-eg20t.c 		pch_dbg(adap,