out_be32 208 arch/m68k/include/asm/io_mm.h #define isa_outl(val,port) (ISA_SEX ? out_be32(isa_itl(port),(val)) : out_le32(isa_itl(port),(val))) out_be32 45 arch/m68k/include/asm/raw_io.h #define raw_outl(val,port) out_be32((port),(val)) out_be32 48 arch/m68k/include/asm/raw_io.h #define __raw_writel(val,addr) out_be32((addr),(val)) out_be32 395 arch/m68k/mvme16x/config.c out_be32(PCCTCNT1, 0); out_be32 396 arch/m68k/mvme16x/config.c out_be32(PCCTCMP1, PCC_TIMER_CYCLES); out_be32 55 arch/microblaze/include/asm/io.h #define writel_be(v, a) out_be32((__force unsigned *)a, v) out_be32 46 arch/microblaze/pci/indirect_pci.c out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | out_be32 100 arch/microblaze/pci/indirect_pci.c out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | out_be32 161 arch/microblaze/pci/xilinx_pci.c out_be32(pci_reg + XPLB_PCI_BUS, 0x000000ff); out_be32 104 arch/powerpc/boot/cpm-serial.c out_be32(cpcr, op | cpm_cmd | 0x10000); out_be32 119 arch/powerpc/boot/cpm-serial.c out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) & ~0x30); out_be32 130 arch/powerpc/boot/cpm-serial.c out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) | 0x30); out_be32 101 arch/powerpc/boot/cuboot-pq2.c out_be32(&ctrl_addr[cs * 2], 0); out_be32 102 arch/powerpc/boot/cuboot-pq2.c out_be32(&ctrl_addr[cs * 2 + 1], out_be32 104 arch/powerpc/boot/cuboot-pq2.c out_be32(&ctrl_addr[cs * 2], base | cs_ranges_buf[i].addr); out_be32 185 arch/powerpc/boot/cuboot-pq2.c out_be32(&pci_regs[1][0], mem_base->phys_addr | 1); out_be32 186 arch/powerpc/boot/cuboot-pq2.c out_be32(&pci_regs[2][0], ~(mem->size[1] + mmio->size[1] - 1)); out_be32 188 arch/powerpc/boot/cuboot-pq2.c out_be32(&pci_regs[1][1], io->phys_addr | 1); out_be32 189 arch/powerpc/boot/cuboot-pq2.c out_be32(&pci_regs[2][1], ~(io->size[1] - 1)); out_be32 230 arch/powerpc/boot/cuboot-pq2.c out_be32((u32 *)&soc_regs[0x1002c], 0x01236745); out_be32 34 arch/powerpc/boot/uartlite.c out_be32(reg_base + ULITE_CONTROL, ULITE_CONTROL_RST_RX); out_be32 43 arch/powerpc/boot/uartlite.c out_be32(reg_base + ULITE_TX, c); out_be32 47 arch/powerpc/boot/ugecon.c out_be32(csr_reg, csr); out_be32 51 arch/powerpc/boot/ugecon.c out_be32(data_reg, data); out_be32 53 arch/powerpc/boot/ugecon.c out_be32(cr_reg, cr); out_be32 59 arch/powerpc/boot/ugecon.c out_be32(csr_reg, 0); out_be32 146 arch/powerpc/boot/wii.c out_be32(EXI_CTRL, in_be32(EXI_CTRL) | EXI_CTRL_ENABLE); out_be32 38 arch/powerpc/include/asm/dcr-mmio.h out_be32(host.token + ((host.base + dcr_n) * host.stride), value); out_be32 148 arch/powerpc/include/asm/io.h DEF_MMIO_OUT_D(out_be32, 32, stw); out_be32 158 arch/powerpc/include/asm/io.h DEF_MMIO_OUT_X(out_be32, 32, stwbrx); out_be32 492 arch/powerpc/include/asm/io.h #define __do_writel_be(val, addr) out_be32(PCI_FIX_ADDR(addr), val) out_be32 836 arch/powerpc/include/asm/io.h #define setbits32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v)) out_be32 837 arch/powerpc/include/asm/io.h #define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v)) out_be32 75 arch/powerpc/include/asm/mpic_msgr.h out_be32(msgr->base, message); out_be32 113 arch/powerpc/include/asm/mpic_msgr.h out_be32(msgr->base, 1 << get_hard_smp_processor_id(cpu_num)); out_be32 391 arch/powerpc/include/asm/pmac_feature.h #define UN_OUT(r,v) (out_be32(UN_REG(r), (v))) out_be32 110 arch/powerpc/include/asm/tsi108.h out_be32((volatile u32 *)(tsi108_csr_vir_base + reg_offset), val); out_be32 179 arch/powerpc/kernel/rtas_pci.c out_be32(chip_regs + 0xf6030, val); out_be32 155 arch/powerpc/platforms/44x/warp.c out_be32(dtm_fpga + 0x14, reset); out_be32 258 arch/powerpc/platforms/44x/warp.c out_be32(fpga + 0x20, temp); out_be32 176 arch/powerpc/platforms/4xx/msi.c out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi); out_be32 177 arch/powerpc/platforms/4xx/msi.c out_be32(msi->msi_regs + PEIH_TERMADL, msi->msi_addr_lo); out_be32 180 arch/powerpc/platforms/4xx/msi.c out_be32(msi->msi_regs + PEIH_MSIED, *msi_data); out_be32 181 arch/powerpc/platforms/4xx/msi.c out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask); out_be32 903 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_OUTTR, 0x08000000); out_be32 904 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_INTR, 0x02000000); out_be32 905 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_OPDBSZ, 0x10000000); out_be32 906 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_PBBSZ, 0x53000000); out_be32 907 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_IPHBSZ, 0x08000000); out_be32 908 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_IPDBSZ, 0x10000000); out_be32 909 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_RCIRQEN, 0x00f00000); out_be32 910 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_PCTL, 0x80800066); out_be32 918 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_PBCTL, 0x08000000); out_be32 1030 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_PBCTL, 0x0800000c); out_be32 1031 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_OUTTR, 0x08000000); out_be32 1032 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_INTR, 0x02000000); out_be32 1033 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_OPDBSZ, 0x04000000); out_be32 1034 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_PBBSZ, 0x00000000); out_be32 1035 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_IPHBSZ, 0x02000000); out_be32 1036 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_IPDBSZ, 0x04000000); out_be32 1037 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_RCIRQEN,0x00f00000); out_be32 1038 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_PCTL, 0x80800066); out_be32 1228 arch/powerpc/platforms/4xx/pci.c out_be32 (port->utl_base + PEUTL_PBBSZ, 0x00000000); out_be32 1230 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_PCTL, 0x80800000); out_be32 1341 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_OUTTR, 0x02000000); out_be32 1342 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_INTR, 0x02000000); out_be32 1343 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_OPDBSZ, 0x04000000); out_be32 1344 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_PBBSZ, 0x21000000); out_be32 1345 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_IPHBSZ, 0x02000000); out_be32 1346 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_IPDBSZ, 0x04000000); out_be32 1347 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_RCIRQEN, 0x00f00000); out_be32 1348 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_PCTL, 0x80800066); out_be32 1350 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_PBCTL, 0x08000000); out_be32 1628 arch/powerpc/platforms/4xx/pci.c out_be32(port->utl_base + PEUTL_RCSTA, 0x00040000); out_be32 652 arch/powerpc/platforms/512x/clock-commonclk.c out_be32(mccr_reg, (0 << 16)); out_be32 653 arch/powerpc/platforms/512x/clock-commonclk.c out_be32(mccr_reg, (0 << 16) | ((div - 1) << 17)); out_be32 654 arch/powerpc/platforms/512x/clock-commonclk.c out_be32(mccr_reg, (1 << 16) | ((div - 1) << 17)); out_be32 84 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->enable, out_be32 89 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->status, MPC512X_SCLPC_SUCCESS); out_be32 269 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->enable, out_be32 271 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->enable, 0x0); out_be32 280 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->fifo_ctrl, MPC512X_SCLPC_FIFO_CTRL(0x7)); out_be32 281 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->fifo_alarm, MPC512X_SCLPC_FIFO_ALARM(0x200)); out_be32 287 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->start_addr, lpbfifo.req->dev_phys_addr); out_be32 299 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->ctrl, bits); out_be32 308 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->enable, bits); out_be32 312 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->pkt_size, bits); out_be32 324 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->enable, out_be32 465 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(&lpbfifo.regs->enable, out_be32 510 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c out_be32(®s->enable, MPC512X_SCLPC_RESET | MPC512X_SCLPC_FIFO_RESET); out_be32 50 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&reset_module_base->rpr, 0x52535445); out_be32 52 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&reset_module_base->rcr, 0x2); out_be32 277 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&diu_reg->gamma, virt_to_phys(&diu_shared_fb.gamma)); out_be32 278 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&diu_reg->desc[1], 0); out_be32 279 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&diu_reg->desc[2], 0); out_be32 280 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&diu_reg->desc[0], virt_to_phys(&diu_shared_fb.ad0)); out_be32 443 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&FIFOC(psc)->txsz, (fifobase << 16) | tx_fifo_size); out_be32 445 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&FIFOC(psc)->rxsz, (fifobase << 16) | rx_fifo_size); out_be32 449 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&FIFOC(psc)->txcmd, 0x80); out_be32 450 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&FIFOC(psc)->txcmd, 0x01); out_be32 451 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&FIFOC(psc)->rxcmd, 0x80); out_be32 452 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&FIFOC(psc)->rxcmd, 0x01); out_be32 503 arch/powerpc/platforms/512x/mpc512x_shared.c out_be32(&lpc->cs_cfg[cs], val); out_be32 66 arch/powerpc/platforms/512x/pdm360ng.c out_be32(pdm360ng_gpio_base + 0xc, 0xffffffff); out_be32 116 arch/powerpc/platforms/52xx/lite5200.c out_be32(&gpio->port_config, port_config); out_be32 136 arch/powerpc/platforms/52xx/lite5200.c out_be32(mbar + 0x1048, in_be32(mbar + 0x1048) & ~0x300); out_be32 138 arch/powerpc/platforms/52xx/lite5200.c out_be32(mbar + 0x1050, 0x00000001); out_be32 144 arch/powerpc/platforms/52xx/lite5200.c out_be32(mbar + 0x1050, 0x00010000); out_be32 129 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&xlb->snoop_window, sxlb.snoop_window); out_be32 130 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&xlb->master_priority, sxlb.master_priority); out_be32 131 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&xlb->master_pri_enable, sxlb.master_pri_enable); out_be32 134 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&xlb->int_enable, sxlb.int_enable); out_be32 135 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&xlb->config, sxlb.config); out_be32 146 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&cdm->clk_enables, scdm.clk_enables); out_be32 157 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->taskBar, sbes.taskBar); out_be32 158 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->currentPointer, sbes.currentPointer); out_be32 159 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->endPointer, sbes.endPointer); out_be32 160 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->variablePointer, sbes.variablePointer); out_be32 169 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->cReqSelect, sbes.cReqSelect); out_be32 170 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->task_size0, sbes.task_size0); out_be32 171 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->task_size1, sbes.task_size1); out_be32 172 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->MDEDebug, sbes.MDEDebug); out_be32 173 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->ADSDebug, sbes.ADSDebug); out_be32 174 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->Value1, sbes.Value1); out_be32 175 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->Value2, sbes.Value2); out_be32 176 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->Control, sbes.Control); out_be32 177 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->Status, sbes.Status); out_be32 178 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->PTDDebug, sbes.PTDDebug); out_be32 185 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->IntPend, sbes.IntPend); out_be32 186 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&bes->IntMask, sbes.IntMask); out_be32 190 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&pic->per_pri1, spic.per_pri1); out_be32 191 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&pic->per_pri2, spic.per_pri2); out_be32 192 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&pic->per_pri3, spic.per_pri3); out_be32 194 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&pic->main_pri1, spic.main_pri1); out_be32 195 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&pic->main_pri2, spic.main_pri2); out_be32 197 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&pic->enc_status, spic.enc_status); out_be32 200 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&pic->per_mask, spic.per_mask); out_be32 201 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&pic->main_mask, spic.main_mask); out_be32 202 arch/powerpc/platforms/52xx/lite5200_pm.c out_be32(&pic->ctrl, spic.ctrl); out_be32 55 arch/powerpc/platforms/52xx/media5200.c out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val); out_be32 67 arch/powerpc/platforms/52xx/media5200.c out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val); out_be32 167 arch/powerpc/platforms/52xx/media5200.c out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, 0); out_be32 222 arch/powerpc/platforms/52xx/media5200.c out_be32(&gpio->port_config, port_config); out_be32 73 arch/powerpc/platforms/52xx/mpc52xx_common.c out_be32(&xlb->master_pri_enable, 0xff); out_be32 74 arch/powerpc/platforms/52xx/mpc52xx_common.c out_be32(&xlb->master_priority, 0x11111111); out_be32 83 arch/powerpc/platforms/52xx/mpc52xx_common.c out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); out_be32 199 arch/powerpc/platforms/52xx/mpc52xx_common.c out_be32(&mpc52xx_cdm->clk_enables, val | mask); out_be32 253 arch/powerpc/platforms/52xx/mpc52xx_common.c out_be32(&mpc52xx_wdt->mode, 0x00000000); out_be32 254 arch/powerpc/platforms/52xx/mpc52xx_common.c out_be32(&mpc52xx_wdt->count, 0x000000ff); out_be32 255 arch/powerpc/platforms/52xx/mpc52xx_common.c out_be32(&mpc52xx_wdt->mode, 0x00009004); out_be32 313 arch/powerpc/platforms/52xx/mpc52xx_common.c out_be32(&simple_gpio->port_config, mux & (~gpio)); out_be32 337 arch/powerpc/platforms/52xx/mpc52xx_common.c out_be32(&simple_gpio->port_config, mux); out_be32 159 arch/powerpc/platforms/52xx/mpc52xx_gpt.c out_be32(&gpt->regs->status, MPC52xx_GPT_STATUS_IRQMASK); out_be32 176 arch/powerpc/platforms/52xx/mpc52xx_gpt.c out_be32(&gpt->regs->mode, reg); out_be32 266 arch/powerpc/platforms/52xx/mpc52xx_gpt.c out_be32(&gpt->regs->mode, mode | MPC52xx_GPT_MODE_MS_IC); out_be32 442 arch/powerpc/platforms/52xx/mpc52xx_gpt.c out_be32(&gpt->regs->count, prescale << 16 | clocks); out_be32 75 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000); out_be32 78 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x00000001); out_be32 97 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(reg, *data++); out_be32 101 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x00000301); out_be32 111 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_FIFO_ALARM, 0x1e4); out_be32 115 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_FIFO_ALARM, 0x1ff); out_be32 158 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, bit_fields); out_be32 162 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_START_ADDRESS, out_be32 164 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_PACKET_SIZE, transfer_size); out_be32 169 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_CONTROL, bit_fields); out_be32 257 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000); out_be32 465 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000); out_be32 494 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000); out_be32 548 arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000); out_be32 117 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(hose->cfg_addr, out_be32 157 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(hose->cfg_addr, 0); out_be32 174 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(hose->cfg_addr, out_be32 221 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(hose->cfg_addr, 0); out_be32 255 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->scr, tmp); out_be32 265 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->iw0btar, out_be32 279 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->iw1btar, out_be32 300 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->iw2btar, out_be32 307 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->iwcr, MPC52xx_PCI_IWCR_PACK(iwcr0, iwcr1, iwcr2)); out_be32 311 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->tbatr0, MPC52xx_PCI_TBATR_ENABLE | pci_phys); out_be32 312 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->bar0, PCI_BASE_ADDRESS_MEM_PREFETCH | pci_phys); out_be32 315 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->tbatr1, MPC52xx_PCI_TBATR_ENABLE); out_be32 316 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->bar1, PCI_BASE_ADDRESS_MEM_PREFETCH); out_be32 318 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD | MPC52xx_PCI_TCR_WCT8); out_be32 326 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->gscr, tmp | MPC52xx_PCI_GSCR_PR); out_be32 331 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->gscr, tmp & ~MPC52xx_PCI_GSCR_PR); out_be32 147 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(addr, in_be32(addr) | (1 << bitno)); out_be32 152 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(addr, in_be32(addr) & ~(1 << bitno)); out_be32 197 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&intr->ctrl, ctrl_reg); out_be32 281 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&sdma->IntPend, 1 << l2irq); out_be32 425 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */ out_be32 426 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */ out_be32 427 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */ out_be32 428 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */ out_be32 435 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&intr->ctrl, intr_ctrl); out_be32 438 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&intr->per_pri1, 0); out_be32 439 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&intr->per_pri2, 0); out_be32 440 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&intr->per_pri3, 0); out_be32 441 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&intr->main_pri1, 0); out_be32 442 arch/powerpc/platforms/52xx/mpc52xx_pic.c out_be32(&intr->main_pri2, 0); out_be32 127 arch/powerpc/platforms/52xx/mpc52xx_pm.c out_be32(&intr->main_mask, intr_main_mask | 0x1ffff); out_be32 144 arch/powerpc/platforms/52xx/mpc52xx_pm.c out_be32(&cdm->clk_enables, clk_enables & 0x00088000); out_be32 171 arch/powerpc/platforms/52xx/mpc52xx_pm.c out_be32(&cdm->clk_enables, clk_enables); out_be32 179 arch/powerpc/platforms/52xx/mpc52xx_pm.c out_be32(&intr->main_mask, intr_main_mask); out_be32 152 arch/powerpc/platforms/82xx/pq2ads-pci-pic.c out_be32(&priv->regs->mask, ~0); out_be32 45 arch/powerpc/platforms/83xx/misc.c out_be32(restart_reg_base + (RST_PROT_REG >> 2), 0x52535445); out_be32 48 arch/powerpc/platforms/83xx/misc.c out_be32(restart_reg_base + (RST_CTRL_REG >> 2), 0x2); out_be32 64 arch/powerpc/platforms/83xx/misc.c out_be32(spcr, tmp | SPCR_TBEN); out_be32 134 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->config1, reg_cfg1); out_be32 153 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->event, event); out_be32 162 arch/powerpc/platforms/83xx/suspend.c out_be32(&syscr_regs->sicrl, saved_regs.sicrl); out_be32 163 arch/powerpc/platforms/83xx/suspend.c out_be32(&syscr_regs->sicrh, saved_regs.sicrh); out_be32 164 arch/powerpc/platforms/83xx/suspend.c out_be32(&clock_regs->sccr, saved_regs.sccr); out_be32 186 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->config1, out_be32 195 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN); out_be32 205 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->mask, PMCER_ALL); out_be32 207 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->config1, out_be32 214 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->config1, out_be32 217 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->mask, PMCER_PMCI); out_be32 221 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->mask, PMCER_PMCI); out_be32 229 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->config1, out_be32 292 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->config1, PMCCR1_USE_STATE); out_be32 293 arch/powerpc/platforms/83xx/suspend.c out_be32(&pmc_regs->mask, PMCER_PMCI); out_be32 89 arch/powerpc/platforms/83xx/usb.c out_be32(immap + MPC83XX_SCCR_OFFS, sccr); out_be32 90 arch/powerpc/platforms/83xx/usb.c out_be32(immap + MPC83XX_SICRL_OFFS, sicrl); out_be32 91 arch/powerpc/platforms/83xx/usb.c out_be32(immap + MPC83XX_SICRH_OFFS, sicrh); out_be32 184 arch/powerpc/platforms/83xx/usb.c out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, out_be32 198 arch/powerpc/platforms/83xx/usb.c out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, temp); out_be32 252 arch/powerpc/platforms/85xx/p1022_ds.c out_be32(&lbc->bank[0].br, br0); out_be32 253 arch/powerpc/platforms/85xx/p1022_ds.c out_be32(&lbc->bank[0].or, or0); out_be32 258 arch/powerpc/platforms/85xx/p1022_ds.c out_be32(&lbc->bank[1].br, br1); out_be32 259 arch/powerpc/platforms/85xx/p1022_ds.c out_be32(&lbc->bank[1].or, or1); out_be32 250 arch/powerpc/platforms/85xx/smp.c out_be32(&spin_table->pir, hw_cpu); out_be32 255 arch/powerpc/platforms/85xx/smp.c out_be32(&spin_table->addr_l, __pa(__early_start)); out_be32 61 arch/powerpc/platforms/85xx/socrates_fpga_pic.c out_be32(socrates_fpga_pic_iobase + reg, val); out_be32 71 arch/powerpc/platforms/85xx/xes_mpc85xx.c out_be32(l2_base, ctl); out_be32 49 arch/powerpc/platforms/86xx/mpc86xx_smp.c out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr); out_be32 77 arch/powerpc/platforms/8xx/cpm1.c out_be32(&cpic_reg->cpic_cisr, (1 << cpm_vec)); out_be32 164 arch/powerpc/platforms/8xx/cpm1.c out_be32(&cpic_reg->cpic_cicr, out_be32 168 arch/powerpc/platforms/8xx/cpm1.c out_be32(&cpic_reg->cpic_cimr, 0); out_be32 233 arch/powerpc/platforms/8xx/cpm1.c out_be32(&siu_conf->sc_sdcr, 0x40); out_be32 235 arch/powerpc/platforms/8xx/cpm1.c out_be32(&siu_conf->sc_sdcr, 1); out_be32 290 arch/powerpc/platforms/8xx/cpm1.c out_be32(bp, (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN); out_be32 292 arch/powerpc/platforms/8xx/cpm1.c out_be32(bp, (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) | out_be32 521 arch/powerpc/platforms/8xx/cpm1.c out_be32(reg, (in_be32(reg) & ~mask) | bits); out_be32 710 arch/powerpc/platforms/8xx/cpm1.c out_be32(&iop->dat, cpm1_gc->cpdata); out_be32 100 arch/powerpc/platforms/8xx/m8xx_setup.c out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY); out_be32 101 arch/powerpc/platforms/8xx/m8xx_setup.c out_be32(&clk_r1->cark_sccrk, KAPWR_KEY); out_be32 135 arch/powerpc/platforms/8xx/m8xx_setup.c out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY); out_be32 136 arch/powerpc/platforms/8xx/m8xx_setup.c out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY); out_be32 137 arch/powerpc/platforms/8xx/m8xx_setup.c out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY); out_be32 138 arch/powerpc/platforms/8xx/m8xx_setup.c out_be32(&sys_tmr1->sitk_tbscrk, KAPWR_KEY); out_be32 139 arch/powerpc/platforms/8xx/m8xx_setup.c out_be32(&sys_tmr1->sitk_rtcsck, KAPWR_KEY); out_be32 140 arch/powerpc/platforms/8xx/m8xx_setup.c out_be32(&sys_tmr1->sitk_tbk, KAPWR_KEY); out_be32 179 arch/powerpc/platforms/8xx/m8xx_setup.c out_be32(&sys_tmr1->sitk_rtck, KAPWR_KEY); out_be32 180 arch/powerpc/platforms/8xx/m8xx_setup.c out_be32(&sys_tmr2->sit_rtc, (u32)time); out_be32 181 arch/powerpc/platforms/8xx/m8xx_setup.c out_be32(&sys_tmr1->sitk_rtck, ~KAPWR_KEY); out_be32 31 arch/powerpc/platforms/8xx/pic.c out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask); out_be32 37 arch/powerpc/platforms/8xx/pic.c out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask); out_be32 42 arch/powerpc/platforms/8xx/pic.c out_be32(&siu_reg->sc_sipend, mpc8xx_irqd_to_bit(d)); out_be32 48 arch/powerpc/platforms/8xx/pic.c out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask); out_be32 57 arch/powerpc/platforms/8xx/pic.c out_be32(&siu_reg->sc_siel, siel); out_be32 267 arch/powerpc/platforms/cell/ras.c out_be32(®s->fir_mode_reg, out_be32 78 arch/powerpc/platforms/cell/spider-pci.c out_be32(regs + SPIDER_PCI_VCI_CNTL_STAT, val | 0x8); out_be32 107 arch/powerpc/platforms/cell/spider-pci.c out_be32(regs + SPIDER_PCI_DUMMY_READ_BASE, dummy_page_da); out_be32 74 arch/powerpc/platforms/cell/spider-pic.c out_be32(cfg, in_be32(cfg) | 0x30000000u); out_be32 82 arch/powerpc/platforms/cell/spider-pic.c out_be32(cfg, in_be32(cfg) & ~0x30000000u); out_be32 100 arch/powerpc/platforms/cell/spider-pic.c out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf)); out_be32 143 arch/powerpc/platforms/cell/spider-pic.c out_be32(cfg, old_mask | (ic << 24) | (0x7 << 16) | out_be32 145 arch/powerpc/platforms/cell/spider-pic.c out_be32(cfg + 4, (0x2 << 16) | (hw & 0xff)); out_be32 297 arch/powerpc/platforms/cell/spider-pic.c out_be32(cfg, in_be32(cfg) & ~0x30000000u); out_be32 301 arch/powerpc/platforms/cell/spider-pic.c out_be32(pic->regs + TIR_MSK, 0x0); out_be32 304 arch/powerpc/platforms/cell/spider-pic.c out_be32(pic->regs + TIR_PIEN, in_be32(pic->regs + TIR_PIEN) | 0x1); out_be32 317 arch/powerpc/platforms/cell/spider-pic.c out_be32(pic->regs + TIR_DEN, in_be32(pic->regs + TIR_DEN) | 0x1); out_be32 112 arch/powerpc/platforms/cell/spufs/hw_ops.c out_be32(&prob->spu_mb_W, data); out_be32 126 arch/powerpc/platforms/cell/spufs/hw_ops.c out_be32(&ctx->spu->problem->signal_notify1, data); out_be32 131 arch/powerpc/platforms/cell/spufs/hw_ops.c out_be32(&ctx->spu->problem->signal_notify2, data); out_be32 183 arch/powerpc/platforms/cell/spufs/hw_ops.c out_be32(&ctx->spu->problem->spu_npc_RW, val); out_be32 212 arch/powerpc/platforms/cell/spufs/hw_ops.c out_be32(&ctx->spu->problem->spu_runcntl_RW, val); out_be32 219 arch/powerpc/platforms/cell/spufs/hw_ops.c out_be32(&ctx->spu->problem->spu_runcntl_RW, SPU_RUNCNTL_STOP); out_be32 257 arch/powerpc/platforms/cell/spufs/hw_ops.c out_be32(&prob->dma_querymask_RW, mask); out_be32 258 arch/powerpc/platforms/cell/spufs/hw_ops.c out_be32(&prob->dma_querytype_RW, mode); out_be32 281 arch/powerpc/platforms/cell/spufs/hw_ops.c out_be32(&prob->mfc_lsa_W, cmd->lsa); out_be32 283 arch/powerpc/platforms/cell/spufs/hw_ops.c out_be32(&prob->mfc_union_W.by32.mfc_size_tag32, out_be32 285 arch/powerpc/platforms/cell/spufs/hw_ops.c out_be32(&prob->mfc_union_W.by32.mfc_class_cmd32, out_be32 232 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_STOP); out_be32 782 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->mfc_lsa_W, ls_offset); out_be32 827 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_npc_RW, 0); out_be32 845 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->signal_notify1, addr64.ui[0]); out_be32 863 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->signal_notify2, addr64.ui[1]); out_be32 892 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->dma_querymask_RW, MFC_TAGID_TO_TAGMASK(0)); out_be32 1010 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_STOP); out_be32 1014 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, 0x2); out_be32 1021 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_STOP); out_be32 1045 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_RUNNABLE); out_be32 1057 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, 0x2); out_be32 1334 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_RUNNABLE); out_be32 1357 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_RUNNABLE); out_be32 1361 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_STOP); out_be32 1457 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->dma_querymask_RW, csa->prob.dma_querymask_RW); out_be32 1468 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->dma_querytype_RW, csa->prob.dma_querytype_RW); out_be32 1636 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_npc_RW, csa->prob.spu_npc_RW); out_be32 1722 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_RUNNABLE); out_be32 1879 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_STOP); out_be32 1890 arch/powerpc/platforms/cell/spufs/switch.c out_be32(&prob->spu_runcntl_RW, 2); out_be32 181 arch/powerpc/platforms/chrp/pci.c out_be32(®[12], val & ~PRG_CL_RESET_VALID); out_be32 247 arch/powerpc/platforms/chrp/setup.c out_be32(briq_SPOR, 0); out_be32 53 arch/powerpc/platforms/embedded6xx/flipper-pic.c out_be32(io_base + FLIPPER_ICR, mask); out_be32 62 arch/powerpc/platforms/embedded6xx/flipper-pic.c out_be32(io_base + FLIPPER_ICR, 1 << irq); out_be32 118 arch/powerpc/platforms/embedded6xx/flipper-pic.c out_be32(io_base + FLIPPER_IMR, 0x00000000); out_be32 119 arch/powerpc/platforms/embedded6xx/flipper-pic.c out_be32(io_base + FLIPPER_ICR, 0xffffffff); out_be32 49 arch/powerpc/platforms/embedded6xx/hlwd-pic.c out_be32(io_base + HW_BROADWAY_ICR, mask); out_be32 57 arch/powerpc/platforms/embedded6xx/hlwd-pic.c out_be32(io_base + HW_BROADWAY_ICR, 1 << irq); out_be32 154 arch/powerpc/platforms/embedded6xx/hlwd-pic.c out_be32(io_base + HW_BROADWAY_IMR, 0); out_be32 155 arch/powerpc/platforms/embedded6xx/hlwd-pic.c out_be32(io_base + HW_BROADWAY_ICR, 0xffffffff); out_be32 54 arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c out_be32(csr_reg, csr); out_be32 58 arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c out_be32(data_reg, data); out_be32 60 arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c out_be32(cr_reg, cr); out_be32 66 arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c out_be32(csr_reg, 0); out_be32 247 arch/powerpc/platforms/maple/pci.c out_be32(addr, val); out_be32 370 arch/powerpc/platforms/powermac/pci.c swap ? out_le32(addr, val) : out_be32(addr, val); out_be32 355 arch/powerpc/platforms/powermac/smp.c out_be32(psurge_start, start); out_be32 415 arch/powerpc/platforms/powermac/smp.c out_be32(psurge_start, 0x100); out_be32 92 arch/powerpc/sysdev/cpm2.c out_be32(&cpmp->cp_cpcr, command | opcode | CPM_CR_FLG); out_be32 134 arch/powerpc/sysdev/cpm2.c out_be32(bp, val); out_be32 263 arch/powerpc/sysdev/cpm2.c out_be32(reg, (in_be32(reg) & ~mask) | bits); out_be32 88 arch/powerpc/sysdev/cpm2_pic.c out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); out_be32 100 arch/powerpc/sysdev/cpm2_pic.c out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); out_be32 111 arch/powerpc/sysdev/cpm2_pic.c out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit); out_be32 123 arch/powerpc/sysdev/cpm2_pic.c out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); out_be32 182 arch/powerpc/sysdev/cpm2_pic.c out_be32(&cpm2_intctl->ic_siexr, vnew); out_be32 242 arch/powerpc/sysdev/cpm2_pic.c out_be32(&cpm2_intctl->ic_simrh, 0x00000000); out_be32 243 arch/powerpc/sysdev/cpm2_pic.c out_be32(&cpm2_intctl->ic_simrl, 0x00000000); out_be32 248 arch/powerpc/sysdev/cpm2_pic.c out_be32(&cpm2_intctl->ic_sipnrh, 0xffffffff); out_be32 249 arch/powerpc/sysdev/cpm2_pic.c out_be32(&cpm2_intctl->ic_sipnrl, 0xffffffff); out_be32 260 arch/powerpc/sysdev/cpm2_pic.c out_be32(&cpm2_intctl->ic_scprrh, 0x05309770); out_be32 261 arch/powerpc/sysdev/cpm2_pic.c out_be32(&cpm2_intctl->ic_scprrl, 0x05309770); out_be32 65 arch/powerpc/sysdev/cpm_common.c out_be32(&cpm_udbg_txdesc[0], 0xa0000001); out_be32 138 arch/powerpc/sysdev/cpm_common.c out_be32(&iop->dat, cpm2_gc->cpdata); out_be32 48 arch/powerpc/sysdev/dart.h #define DART_OUT(r,v) (out_be32(DART_REG(r), (v))) out_be32 67 arch/powerpc/sysdev/ehv_pic.c out_be32(mpic_percpu_base_vaddr + MPIC_EOI / 4, 0); out_be32 99 arch/powerpc/sysdev/fsl_85xx_l2ctlr.c out_be32(&l2ctlr->srbar0, out_be32 106 arch/powerpc/sysdev/fsl_85xx_l2ctlr.c out_be32(&l2ctlr->srbarea0, out_be32 162 arch/powerpc/sysdev/fsl_lbc.c out_be32(&fsl_lbc_ctrl_dev->regs->mar, mar); out_be32 172 arch/powerpc/sysdev/fsl_lbc.c out_be32(io_base, 0x0); out_be32 192 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->lteatr, 0); out_be32 193 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->ltear, 0); out_be32 194 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->lteccr, LTECCR_CLEAR); out_be32 195 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->ltedr, LTEDR_ENABLE); out_be32 223 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->ltesr, LTESR_CLEAR); out_be32 224 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->lteatr, 0); out_be32 225 arch/powerpc/sysdev/fsl_lbc.c out_be32(&lbc->ltear, 0); out_be32 336 arch/powerpc/sysdev/fsl_lbc.c out_be32(&fsl_lbc_ctrl_dev->regs->lteir, LTEIR_ENABLE); out_be32 29 arch/powerpc/sysdev/fsl_mpic_err.c out_be32(base + (MPIC_ERR_INT_EIMR >> 2), value); out_be32 166 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pow[index + i].potar, pci_addr >> 12); out_be32 167 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pow[index + i].potear, (u64)pci_addr >> 44); out_be32 168 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pow[index + i].powbar, phys_addr >> 12); out_be32 169 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pow[index + i].powar, flags | (bits - 1)); out_be32 238 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pow[i].powar, 0); out_be32 242 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[i].piwar, 0); out_be32 274 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pow[j].potar, (hose->io_resource.start >> 12)); out_be32 275 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pow[j].potear, 0); out_be32 276 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pow[j].powbar, (hose->io_base_phys >> 12)); out_be32 278 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pow[j].powar, 0x80088000 out_be32 361 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].pitar, 0x00000000); out_be32 362 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].piwbar, 0x00000000); out_be32 363 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].piwar, piwar); out_be32 387 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].pitar, 0x00000000); out_be32 388 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].piwbear, out_be32 390 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].piwbar, out_be32 392 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].piwar, piwar); out_be32 408 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].pitar, paddr >> 12); out_be32 409 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].piwbar, paddr >> 12); out_be32 410 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].piwar, out_be32 423 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].pitar, out_be32 425 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].piwbar, out_be32 427 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->piw[win_idx].piwar, piwar); out_be32 1154 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pex_pme_mes_dr, dr); out_be32 1199 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pex_pme_mes_ier, 0); out_be32 1224 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pex_pme_mes_dr, dr); out_be32 1260 arch/powerpc/sysdev/fsl_pci.c out_be32(&pci->pex_pme_mes_dr, dr); out_be32 109 arch/powerpc/sysdev/fsl_rio.c out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), out_be32 162 arch/powerpc/sysdev/fsl_rio.c out_be32(priv->regs_win + offset, data); out_be32 201 arch/powerpc/sysdev/fsl_rio.c out_be32(&priv->maint_atmu_regs->rowtar, out_be32 203 arch/powerpc/sysdev/fsl_rio.c out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); out_be32 266 arch/powerpc/sysdev/fsl_rio.c out_be32(&priv->maint_atmu_regs->rowtar, out_be32 268 arch/powerpc/sysdev/fsl_rio.c out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); out_be32 279 arch/powerpc/sysdev/fsl_rio.c out_be32((u32 *) data, val); out_be32 295 arch/powerpc/sysdev/fsl_rio.c out_be32(&priv->inb_atmu_regs[i].riwar, 0); out_be32 341 arch/powerpc/sysdev/fsl_rio.c out_be32(&priv->inb_atmu_regs[i].riwtar, lstart >> RIWTAR_TRAD_VAL_SHIFT); out_be32 342 arch/powerpc/sysdev/fsl_rio.c out_be32(&priv->inb_atmu_regs[i].riwbar, rstart >> RIWBAR_BADD_VAL_SHIFT); out_be32 343 arch/powerpc/sysdev/fsl_rio.c out_be32(&priv->inb_atmu_regs[i].riwar, RIWAR_ENABLE | RIWAR_TGINT_LOCAL | out_be32 366 arch/powerpc/sysdev/fsl_rio.c out_be32(&priv->inb_atmu_regs[i].riwar, riwar & ~RIWAR_ENABLE); out_be32 375 arch/powerpc/sysdev/fsl_rio.c out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0); out_be32 378 arch/powerpc/sysdev/fsl_rio.c out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0); out_be32 379 arch/powerpc/sysdev/fsl_rio.c out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR); out_be32 380 arch/powerpc/sysdev/fsl_rio.c out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR); out_be32 382 arch/powerpc/sysdev/fsl_rio.c out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0); out_be32 383 arch/powerpc/sysdev/fsl_rio.c out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR); out_be32 384 arch/powerpc/sysdev/fsl_rio.c out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR); out_be32 664 arch/powerpc/sysdev/fsl_rio.c out_be32(priv->regs_win out_be32 692 arch/powerpc/sysdev/fsl_rio.c out_be32(priv->regs_win + RIO_GCCSR, RIO_PORT_GEN_HOST | out_be32 695 arch/powerpc/sysdev/fsl_rio.c out_be32(priv->regs_win + RIO_GCCSR, out_be32 709 arch/powerpc/sysdev/fsl_rio.c out_be32((priv->regs_win + RIO_ISR_AACR + i*0x80), out_be32 713 arch/powerpc/sysdev/fsl_rio.c out_be32(&priv->maint_atmu_regs->rowbar, out_be32 715 arch/powerpc/sysdev/fsl_rio.c out_be32(&priv->maint_atmu_regs->rowar, out_be32 215 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_TE); out_be32 221 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_QOI); out_be32 234 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_EOMI); out_be32 260 arch/powerpc/sysdev/fsl_rmu.c out_be32((void *)&rmu->msg_regs->isr, RIO_MSG_ISR_TE); out_be32 277 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->isr, RIO_MSG_ISR_DIQI); out_be32 303 arch/powerpc/sysdev/fsl_rmu.c out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_TE); out_be32 309 arch/powerpc/sysdev/fsl_rmu.c out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_QFI); out_be32 355 arch/powerpc/sysdev/fsl_rmu.c out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_DIQI); out_be32 366 arch/powerpc/sysdev/fsl_rmu.c out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0); out_be32 368 arch/powerpc/sysdev/fsl_rmu.c out_be32((u32 *)(rmu_regs_win + RIO_IM0SR), IMSR_CLEAR); out_be32 369 arch/powerpc/sysdev/fsl_rmu.c out_be32((u32 *)(rmu_regs_win + RIO_IM1SR), IMSR_CLEAR); out_be32 370 arch/powerpc/sysdev/fsl_rmu.c out_be32((u32 *)(rmu_regs_win + RIO_OM0SR), OMSR_CLEAR); out_be32 371 arch/powerpc/sysdev/fsl_rmu.c out_be32((u32 *)(rmu_regs_win + RIO_OM1SR), OMSR_CLEAR); out_be32 373 arch/powerpc/sysdev/fsl_rmu.c out_be32(&dbell->dbell_regs->odsr, ODSR_CLEAR); out_be32 374 arch/powerpc/sysdev/fsl_rmu.c out_be32(&dbell->dbell_regs->dsr, IDSR_CLEAR); out_be32 376 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwsr, IPWSR_CLEAR); out_be32 432 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwsr, RIO_IPWSR_QFI); out_be32 433 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwmr, ipwmr | RIO_IPWMR_CQ); out_be32 445 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwmr, ipwmr & ~RIO_IPWMR_PWE); out_be32 446 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwsr, RIO_IPWSR_TE); out_be32 447 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwmr, ipwmr); out_be32 454 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwsr, RIO_IPWSR_PWD); out_be32 529 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwmr, rval); out_be32 548 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwmr, out_be32 564 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->epwqbar, 0); out_be32 565 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwqbar, (u32) pw->port_write_msg.phys); out_be32 572 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwsr, out_be32 577 arch/powerpc/sysdev/fsl_rmu.c out_be32(&pw->pw_regs->pwmr, out_be32 589 arch/powerpc/sysdev/fsl_rmu.c out_be32((u32 *)(rio_regs_win + RIO_LTLEECSR), LTLEECSR_ENABLE_ALL); out_be32 637 arch/powerpc/sysdev/fsl_rmu.c out_be32(&dbell->dbell_regs->odmr, 0x00000000); out_be32 638 arch/powerpc/sysdev/fsl_rmu.c out_be32(&dbell->dbell_regs->odretcr, 0x00000004); out_be32 639 arch/powerpc/sysdev/fsl_rmu.c out_be32(&dbell->dbell_regs->oddpr, destid << 16); out_be32 640 arch/powerpc/sysdev/fsl_rmu.c out_be32(&dbell->dbell_regs->oddatr, (index << 20) | data); out_be32 641 arch/powerpc/sysdev/fsl_rmu.c out_be32(&dbell->dbell_regs->odmr, 0x00000001); out_be32 698 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->omr, omr | RIO_MSG_OMR_MUI); out_be32 766 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->odqdpar, rmu->msg_tx_ring.phys); out_be32 767 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->odqepar, rmu->msg_tx_ring.phys); out_be32 770 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->osar, 0x00000004); out_be32 773 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->osr, 0x000000b3); out_be32 788 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->omr, 0x00100220); out_be32 791 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->omr, out_be32 796 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->omr, in_be32(&rmu->msg_regs->omr) | 0x1); out_be32 829 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->omr, 0); out_be32 881 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->ifqdpar, (u32) rmu->msg_rx_ring.phys); out_be32 882 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->ifqepar, (u32) rmu->msg_rx_ring.phys); out_be32 885 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->isr, 0x00000091); out_be32 904 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->imr, 0x001b0060); out_be32 930 arch/powerpc/sysdev/fsl_rmu.c out_be32(&rmu->msg_regs->imr, 0); out_be32 1041 arch/powerpc/sysdev/fsl_rmu.c out_be32(&dbell->dbell_regs->dqdpar, (u32) dbell->dbell_ring.phys); out_be32 1042 arch/powerpc/sysdev/fsl_rmu.c out_be32(&dbell->dbell_regs->dqepar, (u32) dbell->dbell_ring.phys); out_be32 1045 arch/powerpc/sysdev/fsl_rmu.c out_be32(&dbell->dbell_regs->dsr, 0x00000091); out_be32 1059 arch/powerpc/sysdev/fsl_rmu.c out_be32(&dbell->dbell_regs->dmr, 0x00108161); out_be32 163 arch/powerpc/sysdev/fsl_soc.c out_be32(rstcr, 0x2); /* HRESET_REQ */ out_be32 120 arch/powerpc/sysdev/ge/ge_pic.c out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); out_be32 141 arch/powerpc/sysdev/ge/ge_pic.c out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); out_be32 199 arch/powerpc/sysdev/ge/ge_pic.c out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0); out_be32 200 arch/powerpc/sysdev/ge/ge_pic.c out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_INTR_MASK, 0); out_be32 202 arch/powerpc/sysdev/ge/ge_pic.c out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0); out_be32 203 arch/powerpc/sysdev/ge/ge_pic.c out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0); out_be32 30 arch/powerpc/sysdev/grackle.c out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); out_be32 34 arch/powerpc/sysdev/grackle.c out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); out_be32 43 arch/powerpc/sysdev/grackle.c out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); out_be32 47 arch/powerpc/sysdev/grackle.c out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); out_be32 51 arch/powerpc/sysdev/indirect_pci.c out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | out_be32 117 arch/powerpc/sysdev/indirect_pci.c out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | out_be32 512 arch/powerpc/sysdev/ipic.c out_be32(base + (reg >> 2), value); out_be32 201 arch/powerpc/sysdev/mpic.c out_be32(rb->base + (reg >> 2), value); out_be32 32 arch/powerpc/sysdev/mpic_msgr.c out_be32(msgr->mer, value); out_be32 157 arch/powerpc/sysdev/mpic_timer.c out_be32(&priv->regs[num].gtccr, 0); out_be32 158 arch/powerpc/sysdev/mpic_timer.c out_be32(&priv->regs[num].gtbcr, tmp_ticks | TIMER_STOP); out_be32 160 arch/powerpc/sysdev/mpic_timer.c out_be32(&priv->regs[num - 1].gtccr, 0); out_be32 161 arch/powerpc/sysdev/mpic_timer.c out_be32(&priv->regs[num - 1].gtbcr, rem_ticks); out_be32 226 arch/powerpc/sysdev/mpic_timer.c out_be32(&priv->regs[num].gtbcr, out_be32 228 arch/powerpc/sysdev/mpic_timer.c out_be32(&priv->regs[num].gtccr, 0); out_be32 272 arch/powerpc/sysdev/mpic_timer.c out_be32(&priv->regs[handle->num].gtccr, 0); out_be32 273 arch/powerpc/sysdev/mpic_timer.c out_be32(&priv->regs[handle->num - 1].gtccr, 0); out_be32 275 arch/powerpc/sysdev/mpic_timer.c out_be32(&priv->regs[handle->num].gtccr, 0); out_be32 64 arch/powerpc/sysdev/xics/icp-native.c out_be32(&icp_native_regs[cpu]->xirr.word, value); out_be32 430 arch/powerpc/sysdev/xive/native.c out_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD0, 0xff); out_be32 431 arch/powerpc/sysdev/xive/native.c out_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD2, TM_QW2W2_VP | vp_cam); out_be32 4027 arch/powerpc/xmon/xmon.c out_be32(&spu->problem->spu_runcntl_RW, out_be32 335 drivers/ata/pata_mpc52xx.c out_be32(®s->pio1, timing->pio1); out_be32 336 drivers/ata/pata_mpc52xx.c out_be32(®s->pio2, timing->pio2); out_be32 337 drivers/ata/pata_mpc52xx.c out_be32(®s->mdma1, timing->mdma1); out_be32 338 drivers/ata/pata_mpc52xx.c out_be32(®s->mdma2, timing->mdma2); out_be32 339 drivers/ata/pata_mpc52xx.c out_be32(®s->udma1, timing->udma1); out_be32 340 drivers/ata/pata_mpc52xx.c out_be32(®s->udma2, timing->udma2); out_be32 341 drivers/ata/pata_mpc52xx.c out_be32(®s->udma3, timing->udma3); out_be32 342 drivers/ata/pata_mpc52xx.c out_be32(®s->udma4, timing->udma4); out_be32 343 drivers/ata/pata_mpc52xx.c out_be32(®s->udma5, timing->udma5); out_be32 354 drivers/ata/pata_mpc52xx.c out_be32(®s->share_cnt, 0); out_be32 357 drivers/ata/pata_mpc52xx.c out_be32(®s->config, out_be32 365 drivers/ata/pata_mpc52xx.c out_be32(®s->config, out_be32 371 drivers/ata/pata_mpc52xx.c out_be32(®s->share_cnt, tslot << 16); out_be32 132 drivers/char/xilinx_hwicap/buffer_icap.c out_be32(base_address + XHI_SIZE_REG_OFFSET, data); out_be32 146 drivers/char/xilinx_hwicap/buffer_icap.c out_be32(base_address + XHI_BRAM_OFFSET_REG_OFFSET, data); out_be32 162 drivers/char/xilinx_hwicap/buffer_icap.c out_be32(base_address + XHI_RNC_REG_OFFSET, data); out_be32 177 drivers/char/xilinx_hwicap/buffer_icap.c out_be32(base_address + (offset << 2), data); out_be32 258 drivers/char/xilinx_hwicap/buffer_icap.c out_be32(drvdata->base_address + XHI_STATUS_REG_OFFSET, 0xFEFE); out_be32 97 drivers/char/xilinx_hwicap/fifo_icap.c out_be32(drvdata->base_address + XHI_WF_OFFSET, data); out_be32 121 drivers/char/xilinx_hwicap/fifo_icap.c out_be32(drvdata->base_address + XHI_SZ_OFFSET, data); out_be32 130 drivers/char/xilinx_hwicap/fifo_icap.c out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_WRITE_MASK); out_be32 140 drivers/char/xilinx_hwicap/fifo_icap.c out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_READ_MASK); out_be32 366 drivers/char/xilinx_hwicap/fifo_icap.c out_be32(drvdata->base_address + XHI_CR_OFFSET, out_be32 369 drivers/char/xilinx_hwicap/fifo_icap.c out_be32(drvdata->base_address + XHI_CR_OFFSET, out_be32 387 drivers/char/xilinx_hwicap/fifo_icap.c out_be32(drvdata->base_address + XHI_CR_OFFSET, out_be32 390 drivers/char/xilinx_hwicap/fifo_icap.c out_be32(drvdata->base_address + XHI_CR_OFFSET, out_be32 313 drivers/crypto/talitos.c out_be32(priv->chan[ch].reg + TALITOS_FF, out_be32 315 drivers/crypto/talitos.c out_be32(priv->chan[ch].reg + TALITOS_FF_LO, out_be32 687 drivers/crypto/talitos.c out_be32(priv->reg + TALITOS_ICR, isr & (ch_done_mask | ch_err_mask)); \ out_be32 688 drivers/crypto/talitos.c out_be32(priv->reg + TALITOS_ICR_LO, isr_lo); \ out_be32 722 drivers/crypto/talitos.c out_be32(priv->reg + TALITOS_ICR, isr & (ch_done_mask | ch_err_mask)); \ out_be32 723 drivers/crypto/talitos.c out_be32(priv->reg + TALITOS_ICR_LO, isr_lo); \ out_be32 97 drivers/dma/bestcomm/ata.c out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */ out_be32 327 drivers/dma/bestcomm/bestcomm.c out_be32(&bcom_eng->regs->taskBar, tdt_pa); out_be32 354 drivers/dma/bestcomm/bestcomm.c out_be32(&bcom_eng->regs->taskBar, 0ul); out_be32 151 drivers/dma/bestcomm/fec.c out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */ out_be32 252 drivers/dma/bestcomm/fec.c out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */ out_be32 154 drivers/dma/bestcomm/gen_bd.c out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */ out_be32 238 drivers/dma/bestcomm/gen_bd.c out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */ out_be32 129 drivers/dma/fsl_raid.c out_be32(&re_chan->jrregs->inbring_add_job, FSL_RE_ADD_JOB(1)); out_be32 196 drivers/dma/fsl_raid.c out_be32(&re_chan->jrregs->oubring_job_rmvd, out_be32 226 drivers/dma/fsl_raid.c out_be32(&re_chan->jrregs->jr_interrupt_status, FSL_RE_CLR_INTR); out_be32 712 drivers/dma/fsl_raid.c out_be32(&chan->jrregs->inbring_base_h, out_be32 714 drivers/dma/fsl_raid.c out_be32(&chan->jrregs->oubring_base_h, out_be32 716 drivers/dma/fsl_raid.c out_be32(&chan->jrregs->inbring_base_l, out_be32 718 drivers/dma/fsl_raid.c out_be32(&chan->jrregs->oubring_base_l, out_be32 720 drivers/dma/fsl_raid.c out_be32(&chan->jrregs->inbring_size, out_be32 722 drivers/dma/fsl_raid.c out_be32(&chan->jrregs->oubring_size, out_be32 729 drivers/dma/fsl_raid.c out_be32(&chan->jrregs->jr_config_1, out_be32 735 drivers/dma/fsl_raid.c out_be32(&chan->jrregs->jr_command, FSL_RE_ENABLE); out_be32 773 drivers/dma/fsl_raid.c out_be32(&re_priv->re_regs->global_config, FSL_RE_NON_DPAA_MODE); out_be32 776 drivers/dma/fsl_raid.c out_be32(&re_priv->re_regs->galois_field_config, FSL_RE_GFM_POLY); out_be32 198 drivers/dma/fsldma.h #define fsl_iowrite32be(v, p) out_be32(p, v) out_be32 230 drivers/dma/fsldma.h out_be32((u32 __iomem *)addr, val >> 32); out_be32 231 drivers/dma/fsldma.h out_be32((u32 __iomem *)addr + 1, (u32)val); out_be32 1022 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_ERCA); out_be32 1025 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmagpor, MPC_DMA_DMAGPOR_SNOOP_ENABLE); out_be32 1027 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmaeeil, 0); out_be32 1030 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmaintl, 0xFFFF); out_be32 1031 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmaerrl, 0xFFFF); out_be32 1033 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_EDCG | out_be32 1038 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmaerqh, 0); out_be32 1039 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmaerql, 0); out_be32 1042 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmaeeih, 0); out_be32 1043 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmaeeil, 0); out_be32 1046 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmainth, 0xFFFFFFFF); out_be32 1047 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmaintl, 0xFFFFFFFF); out_be32 1048 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmaerrh, 0xFFFFFFFF); out_be32 1049 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmaerrl, 0xFFFFFFFF); out_be32 1052 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmaihsa, 0); out_be32 1053 drivers/dma/mpc512x_dma.c out_be32(&mdma->regs->dmailsa, 0); out_be32 58 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect); out_be32 77 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect); out_be32 107 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect); out_be32 110 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, err_cap_stat | 0x1); out_be32 225 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, ~0); out_be32 228 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, 0); out_be32 234 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR, 0x40); out_be32 240 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, ~0x40); out_be32 244 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, ~0); out_be32 247 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, 0x1); out_be32 282 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, ~0 out_be32 284 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, 0 out_be32 309 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, orig_pci_err_cap_dr); out_be32 310 drivers/edac/mpc85xx_edac.c out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, orig_pci_err_en); out_be32 370 drivers/edac/mpc85xx_edac.c out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJHI, out_be32 383 drivers/edac/mpc85xx_edac.c out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJLO, out_be32 396 drivers/edac/mpc85xx_edac.c out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJCTL, out_be32 464 drivers/edac/mpc85xx_edac.c out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDET, err_detect); out_be32 537 drivers/edac/mpc85xx_edac.c out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDET, ~0); out_be32 542 drivers/edac/mpc85xx_edac.c out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDIS, 0); out_be32 575 drivers/edac/mpc85xx_edac.c out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINTEN, L2_EIE_MASK); out_be32 601 drivers/edac/mpc85xx_edac.c out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINTEN, 0); out_be32 605 drivers/edac/mpc85xx_edac.c out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDIS, orig_l2_err_disable); out_be32 230 drivers/gpio/gpio-mpc5200.c out_be32(®s->simple_dvo, chip->shadow_dvo); out_be32 258 drivers/gpio/gpio-mpc5200.c out_be32(®s->simple_ddr, chip->shadow_ddr); out_be32 262 drivers/gpio/gpio-mpc5200.c out_be32(®s->simple_gpioe, chip->shadow_gpioe); out_be32 284 drivers/gpio/gpio-mpc5200.c out_be32(®s->simple_ddr, chip->shadow_ddr); out_be32 288 drivers/gpio/gpio-mpc5200.c out_be32(®s->simple_gpioe, chip->shadow_gpioe); out_be32 153 drivers/i2c/busses/i2c-cpm.c out_be32(&i2c_ram->rstate, 0); out_be32 154 drivers/i2c/busses/i2c-cpm.c out_be32(&i2c_ram->rdp, 0); out_be32 157 drivers/i2c/busses/i2c-cpm.c out_be32(&i2c_ram->rxtmp, 0); out_be32 158 drivers/i2c/busses/i2c-cpm.c out_be32(&i2c_ram->tstate, 0); out_be32 159 drivers/i2c/busses/i2c-cpm.c out_be32(&i2c_ram->tdp, 0); out_be32 162 drivers/i2c/busses/i2c-cpm.c out_be32(&i2c_ram->txtmp, 0); out_be32 532 drivers/i2c/busses/i2c-cpm.c out_be32(&rbdf[i].cbd_bufaddr, ((cpm->rxdma[i] + 1) & ~1)); out_be32 541 drivers/i2c/busses/i2c-cpm.c out_be32(&tbdf[i].cbd_bufaddr, cpm->txdma[i]); out_be32 113 drivers/input/serio/xilinx_ps2.c out_be32(drvdata->base_address + XPS2_IPISR_OFFSET, intr_sr); out_be32 167 drivers/input/serio/xilinx_ps2.c out_be32(drvdata->base_address + XPS2_TX_DATA_OFFSET, c); out_be32 197 drivers/input/serio/xilinx_ps2.c out_be32(drvdata->base_address + XPS2_GIER_OFFSET, XPS2_GIER_GIE_MASK); out_be32 198 drivers/input/serio/xilinx_ps2.c out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, XPS2_IPIXR_RX_ALL); out_be32 215 drivers/input/serio/xilinx_ps2.c out_be32(drvdata->base_address + XPS2_GIER_OFFSET, 0x00); out_be32 216 drivers/input/serio/xilinx_ps2.c out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0x00); out_be32 287 drivers/input/serio/xilinx_ps2.c out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0); out_be32 293 drivers/input/serio/xilinx_ps2.c out_be32(drvdata->base_address + XPS2_SRST_OFFSET, XPS2_SRST_RESET); out_be32 680 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->ppbah, upper_32_bits(ppaact_phys)); out_be32 681 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->ppbal, lower_32_bits(ppaact_phys)); out_be32 683 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->pplah, upper_32_bits(ppaact_phys)); out_be32 684 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->pplal, lower_32_bits(ppaact_phys)); out_be32 686 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->spbah, upper_32_bits(spaact_phys)); out_be32 687 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->spbal, lower_32_bits(spaact_phys)); out_be32 689 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->splah, upper_32_bits(spaact_phys)); out_be32 690 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->splal, lower_32_bits(spaact_phys)); out_be32 692 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->obah, upper_32_bits(omt_phys)); out_be32 693 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->obal, lower_32_bits(omt_phys)); out_be32 695 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->olah, upper_32_bits(omt_phys)); out_be32 696 drivers/iommu/fsl_pamu.c out_be32(&pamu_regs->olal, lower_32_bits(omt_phys)); out_be32 704 drivers/iommu/fsl_pamu.c out_be32((u32 *)(pamu_reg_base + PAMU_PICS), out_be32 706 drivers/iommu/fsl_pamu.c out_be32(pc, PAMU_PC_PE | PAMU_PC_OCE | PAMU_PC_SPCC | PAMU_PC_PPCC); out_be32 792 drivers/iommu/fsl_pamu.c out_be32(p + PAMU_AVS1, avs1 & PAMU_AV_MASK); out_be32 811 drivers/iommu/fsl_pamu.c out_be32((p + PAMU_PICS), pics); out_be32 1158 drivers/iommu/fsl_pamu.c out_be32(&guts_regs->pamubypenr, pamubypenr); out_be32 2066 drivers/macintosh/via-pmu.c out_be32(mem_ctrl_sleep, i); out_be32 2097 drivers/macintosh/via-pmu.c out_be32(mem_ctrl_sleep, 0x3f); out_be32 253 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, SOFT_RST); out_be32 254 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, INT_FIELD_EN); out_be32 263 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, 0); out_be32 268 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, status_cfg & 0x3f0000); out_be32 279 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, SOFT_RST); out_be32 280 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, 0); out_be32 283 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, status_cfg & 0x3f0000); out_be32 439 drivers/media/platform/fsl-viu.c out_be32(&vr->dma_inc, reg_val.dma_inc); out_be32 440 drivers/media/platform/fsl-viu.c out_be32(&vr->picture_count, reg_val.picture_count); out_be32 441 drivers/media/platform/fsl-viu.c out_be32(&vr->field_base_addr, reg_val.field_base_addr); out_be32 701 drivers/media/platform/fsl-viu.c out_be32(&vr->field_base_addr, reg_val.field_base_addr); out_be32 702 drivers/media/platform/fsl-viu.c out_be32(&vr->dma_inc, reg_val.dma_inc); out_be32 703 drivers/media/platform/fsl-viu.c out_be32(&vr->picture_count, reg_val.picture_count); out_be32 981 drivers/media/platform/fsl-viu.c out_be32(&vr->luminance, 0x9512A254); out_be32 982 drivers/media/platform/fsl-viu.c out_be32(&vr->chroma_r, 0x03310000); out_be32 983 drivers/media/platform/fsl-viu.c out_be32(&vr->chroma_g, 0x06600F38); out_be32 984 drivers/media/platform/fsl-viu.c out_be32(&vr->chroma_b, 0x00000409); out_be32 985 drivers/media/platform/fsl-viu.c out_be32(&vr->alpha, 0x000000ff); out_be32 986 drivers/media/platform/fsl-viu.c out_be32(&vr->req_alarm, 0x00000090); out_be32 1006 drivers/media/platform/fsl-viu.c out_be32(&vr->field_base_addr, addr); out_be32 1007 drivers/media/platform/fsl-viu.c out_be32(&vr->dma_inc, reg_val.dma_inc); out_be32 1008 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, out_be32 1013 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, out_be32 1062 drivers/media/platform/fsl-viu.c out_be32(&vr->field_base_addr, addr); out_be32 1063 drivers/media/platform/fsl-viu.c out_be32(&vr->dma_inc, reg_val.dma_inc); out_be32 1064 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, out_be32 1109 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, out_be32 1140 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, out_be32 1211 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, out_be32 1217 drivers/media/platform/fsl-viu.c out_be32(&vr->status_cfg, status_cfg | INT_ALL_STATUS); out_be32 1297 drivers/media/platform/fsl-viu.c out_be32(®->status_cfg, 0); out_be32 1298 drivers/media/platform/fsl-viu.c out_be32(®->luminance, 0x9512a254); out_be32 1299 drivers/media/platform/fsl-viu.c out_be32(®->chroma_r, 0x03310000); out_be32 1300 drivers/media/platform/fsl-viu.c out_be32(®->chroma_g, 0x06600f38); out_be32 1301 drivers/media/platform/fsl-viu.c out_be32(®->chroma_b, 0x00000409); out_be32 1302 drivers/media/platform/fsl-viu.c out_be32(®->field_base_addr, 0); out_be32 1303 drivers/media/platform/fsl-viu.c out_be32(®->dma_inc, 0); out_be32 1304 drivers/media/platform/fsl-viu.c out_be32(®->picture_count, 0x01e002d0); out_be32 1305 drivers/media/platform/fsl-viu.c out_be32(®->req_alarm, 0x00000090); out_be32 1306 drivers/media/platform/fsl-viu.c out_be32(®->alpha, 0x000000ff); out_be32 54 drivers/mmc/host/sdhci-pltfm.h out_be32(host->ioaddr + reg, val); out_be32 168 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbar, page_addr >> 6); out_be32 169 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fpar, out_be32 178 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbar, page_addr >> 5); out_be32 179 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fpar, out_be32 212 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fmr, priv->fmr | 3); out_be32 214 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->mdr, elbc_fcm_ctrl->mdr); out_be32 227 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->lsor, priv->bank); out_be32 266 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->lteccr, 0x000F000F); /* clear lteccr */ out_be32 283 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, out_be32 290 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | out_be32 293 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, out_be32 300 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, NAND_CMD_READOOB << FCR_CMD0_SHIFT); out_be32 302 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); out_be32 335 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, 0); /* read entire page to enable ECC */ out_be32 360 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, mtd->oobsize - column); out_be32 373 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) | out_be32 376 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, command << FCR_CMD0_SHIFT); out_be32 381 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, 256); out_be32 401 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, out_be32 408 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, out_be32 413 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, 0); out_be32 445 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, out_be32 454 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, out_be32 472 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, fcr); out_be32 489 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, out_be32 492 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, 0); out_be32 501 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, out_be32 504 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT); out_be32 505 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fbcr, 1); out_be32 520 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, FIR_OP_CM0 << FIR_OP0_SHIFT); out_be32 521 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fcr, NAND_CMD_RESET << FCR_CMD0_SHIFT); out_be32 53 drivers/mtd/nand/raw/ndfc.c out_be32(ndfc->ndfcbase + NDFC_CCR, ccr); out_be32 83 drivers/mtd/nand/raw/ndfc.c out_be32(ndfc->ndfcbase + NDFC_CCR, ccr); out_be32 126 drivers/mtd/nand/raw/ndfc.c out_be32(ndfc->ndfcbase + NDFC_DATA, *p++); out_be32 226 drivers/mtd/nand/raw/ndfc.c out_be32(ndfc->ndfcbase + NDFC_CCR, ccr); out_be32 232 drivers/mtd/nand/raw/ndfc.c out_be32(ndfc->ndfcbase + offset, be32_to_cpup(reg)); out_be32 43 drivers/mtd/nand/raw/socrates_nand.c out_be32(host->io_base, FPGA_NAND_ENABLE | out_be32 64 drivers/mtd/nand/raw/socrates_nand.c out_be32(host->io_base, val); out_be32 104 drivers/mtd/nand/raw/socrates_nand.c out_be32(host->io_base, val); out_be32 107 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->paddr1, *(u32 *)(&mac[0])); out_be32 108 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->paddr2, (*(u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE); out_be32 189 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->r_cntrl, rcntrl); out_be32 190 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->x_cntrl, tcntrl); out_be32 454 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->ievent, ievent); /* clear pending events */ out_be32 536 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->mib_control, FEC_MIB_DISABLE); out_be32 540 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->mib_control, 0); out_be32 558 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->r_cntrl, rx_control); out_be32 561 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->r_cntrl, rx_control); out_be32 564 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->gaddr1, 0xffffffff); out_be32 565 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->gaddr2, 0xffffffff); out_be32 579 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->gaddr1, gaddr1); out_be32 580 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->gaddr2, gaddr2); out_be32 598 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->ecntrl, FEC_ECNTRL_RESET); out_be32 608 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->op_pause, FEC_OP_PAUSE_OPCODE | 0x20); out_be32 613 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->rfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7); out_be32 614 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->tfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7); out_be32 617 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->rfifo_alarm, 0x0000030c); out_be32 618 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->tfifo_alarm, 0x00000100); out_be32 621 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->x_wmrk, FEC_FIFO_WMRK_256B); out_be32 624 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->xmit_fsm, FEC_XMIT_FSM_APPEND_CRC | FEC_XMIT_FSM_ENABLE_CRC); out_be32 625 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->iaddr1, 0x00000000); /* No individual filter */ out_be32 626 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->iaddr2, 0x00000000); /* No individual filter */ out_be32 631 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->mii_speed, priv->mdio_speed); out_be32 652 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status) & tmp); out_be32 653 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->tfifo_status, in_be32(&fec->tfifo_status) & tmp); out_be32 656 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_ENABLE_IS_RESET); out_be32 676 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->r_cntrl, rcntrl); out_be32 677 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->x_cntrl, tcntrl); out_be32 680 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->ievent, 0xffffffff); out_be32 683 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->imask, FEC_IMASK_ENABLE); out_be32 686 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->ecntrl, FEC_ECNTRL_ETHER_EN); out_be32 687 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->r_des_active, 0x01000000); out_be32 703 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->imask, 0); out_be32 732 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->ecntrl, in_be32(&fec->ecntrl) & ~FEC_ECNTRL_ETHER_EN); out_be32 743 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status)); out_be32 744 drivers/net/ethernet/freescale/fec_mpc52xx.c out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_RESET_FIFO); out_be32 37 drivers/net/ethernet/freescale/fec_mpc52xx_phy.c out_be32(&fec->ievent, FEC_IEVENT_MII); out_be32 38 drivers/net/ethernet/freescale/fec_mpc52xx_phy.c out_be32(&fec->mii_data, value); out_be32 102 drivers/net/ethernet/freescale/fec_mpc52xx_phy.c out_be32(&priv->regs->mii_speed, out_be32 213 drivers/net/ethernet/freescale/fs_enet/fs_enet.h #define __cbd_out32(addr, x) out_be32(addr, x) out_be32 54 drivers/net/ethernet/freescale/fs_enet/mac-fcc.c #define W32(_p, _m, _v) out_be32(&(_p)->_m, (_v)) out_be32 55 drivers/net/ethernet/freescale/fs_enet/mac-fec.c #define __fs_out32(addr, x) out_be32(addr, x) out_be32 53 drivers/net/ethernet/freescale/fs_enet/mac-scc.c #define __fs_out32(addr, x) out_be32(addr, x) out_be32 45 drivers/net/ethernet/freescale/fs_enet/mii-bitbang.c out_be32(p, in_be32(p) | m); out_be32 50 drivers/net/ethernet/freescale/fs_enet/mii-bitbang.c out_be32(p, in_be32(p) & ~m); out_be32 61 drivers/net/ethernet/freescale/fs_enet/mii-fec.c out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_read(location)); out_be32 68 drivers/net/ethernet/freescale/fs_enet/mii-fec.c out_be32(&fecp->fec_ievent, FEC_ENET_MII); out_be32 85 drivers/net/ethernet/freescale/fs_enet/mii-fec.c out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_write(location, val)); out_be32 92 drivers/net/ethernet/freescale/fs_enet/mii-fec.c out_be32(&fecp->fec_ievent, FEC_ENET_MII); out_be32 165 drivers/net/ethernet/freescale/fs_enet/mii-fec.c out_be32(&fec->fecp->fec_ievent, FEC_ENET_MII); out_be32 225 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&((struct qe_bd __iomem *)bd)->buf, out_be32 232 drivers/net/ethernet/freescale/ucc_geth.c out_be32((u32 __iomem *)bd, out_be32 1033 drivers/net/ethernet/freescale/ucc_geth.c out_be32(upsmr_register, UCC_GETH_UPSMR_INIT); out_be32 1034 drivers/net/ethernet/freescale/ucc_geth.c out_be32(maccfg1_register, UCC_GETH_MACCFG1_INIT); out_be32 1035 drivers/net/ethernet/freescale/ucc_geth.c out_be32(maccfg2_register, UCC_GETH_MACCFG2_INIT); out_be32 1069 drivers/net/ethernet/freescale/ucc_geth.c out_be32(hafdup_register, value); out_be32 1103 drivers/net/ethernet/freescale/ucc_geth.c out_be32(ipgifg_register, value); out_be32 1121 drivers/net/ethernet/freescale/ucc_geth.c out_be32(uempr_register, value); out_be32 1131 drivers/net/ethernet/freescale/ucc_geth.c out_be32(maccfg1_register, value); out_be32 1173 drivers/net/ethernet/freescale/ucc_geth.c out_be32(tx_rmon_base_ptr, out_be32 1179 drivers/net/ethernet/freescale/ucc_geth.c out_be32(rx_rmon_base_ptr, out_be32 1212 drivers/net/ethernet/freescale/ucc_geth.c out_be32(macstnaddr1_register, value); out_be32 1224 drivers/net/ethernet/freescale/ucc_geth.c out_be32(macstnaddr2_register, value); out_be32 1241 drivers/net/ethernet/freescale/ucc_geth.c out_be32(maccfg2_register, value); out_be32 1280 drivers/net/ethernet/freescale/ucc_geth.c out_be32(upsmr_register, value); out_be32 1335 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ug_regs->maccfg2, maccfg2); out_be32 1365 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&uf_regs->upsmr, upsmr); out_be32 1412 drivers/net/ethernet/freescale/ucc_geth.c out_be32(uccf->p_ucce, UCC_GETH_UCCE_GRA); /* clear by writing 1 */ out_be32 1656 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ug_regs->maccfg2, tempval); out_be32 1657 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&uf_regs->upsmr, upsmr); out_be32 1801 drivers/net/ethernet/freescale/ucc_geth.c out_be32(addr_h, 0x00000000); out_be32 1802 drivers/net/ethernet/freescale/ucc_geth.c out_be32(addr_l, 0x00000000); out_be32 2021 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&p_82xx_addr_filt->gaddr_h, 0xffffffff); out_be32 2022 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&p_82xx_addr_filt->gaddr_l, 0xffffffff); out_be32 2026 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&p_82xx_addr_filt->gaddr_h, 0x0); out_be32 2027 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&p_82xx_addr_filt->gaddr_l, 0x0); out_be32 2057 drivers/net/ethernet/freescale/ucc_geth.c out_be32(ugeth->uccf->p_uccm, 0x00000000); out_be32 2060 drivers/net/ethernet/freescale/ucc_geth.c out_be32(ugeth->uccf->p_ucce, 0xffffffff); out_be32 2263 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&((struct qe_bd __iomem *)bd)->buf, 0); out_be32 2265 drivers/net/ethernet/freescale/ucc_geth.c out_be32((u32 __iomem *)bd, 0); out_be32 2270 drivers/net/ethernet/freescale/ucc_geth.c out_be32((u32 __iomem *)bd, T_W); /* for last BD set Wrap bit */ out_be32 2336 drivers/net/ethernet/freescale/ucc_geth.c out_be32((u32 __iomem *)bd, R_I); out_be32 2338 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&((struct qe_bd __iomem *)bd)->buf, 0); out_be32 2343 drivers/net/ethernet/freescale/ucc_geth.c out_be32((u32 __iomem *)bd, R_W); /* for last BD set Wrap bit */ out_be32 2490 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ug_regs->uempr, 0); out_be32 2543 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset); out_be32 2547 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_tx_glbl_pram->vtagtable[i], out_be32 2570 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset); out_be32 2579 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_send_q_mem_reg->sqqd[i].bd_ring_base, out_be32 2581 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_send_q_mem_reg->sqqd[i]. out_be32 2586 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_send_q_mem_reg->sqqd[i].bd_ring_base, out_be32 2588 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_send_q_mem_reg->sqqd[i]. out_be32 2610 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer, out_be32 2616 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_scheduler->mblinterval, out_be32 2678 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_tx_glbl_pram->tstate, ((u32) function_code) << 24); out_be32 2713 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset); out_be32 2754 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr, out_be32 2759 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_irq_coalescing_tbl->coalescingentry[i]. out_be32 2762 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_irq_coalescing_tbl->coalescingentry[i]. out_be32 2785 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_glbl_pram->l2qt, l2qt); out_be32 2792 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_glbl_pram->l3qt[j/8], l3qt); out_be32 2802 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_glbl_pram->ecamptr, ug_info->ecamptr); out_be32 2820 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset); out_be32 2831 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_bd_qs_tbl[i].externalbdbaseptr, out_be32 2835 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_bd_qs_tbl[i].externalbdbaseptr, out_be32 2863 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_glbl_pram->remoder, remoder); out_be32 2905 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam, out_be32 2907 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&ugeth->p_exf_glbl_param->l2pcdptr, out_be32 3051 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&p_init_enet_pram->rgftgfrxglobal, out_be32 3054 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&p_init_enet_pram->rxthread[i], out_be32 3056 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&p_init_enet_pram->txglobal, out_be32 3059 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&p_init_enet_pram->txthread[i], out_be32 3107 drivers/net/ethernet/freescale/ucc_geth.c out_be32(&((struct qe_bd __iomem *)bd)->buf, out_be32 3116 drivers/net/ethernet/freescale/ucc_geth.c out_be32((u32 __iomem *)bd, bd_status); out_be32 3325 drivers/net/ethernet/freescale/ucc_geth.c out_be32(uccf->p_ucce, ucce); out_be32 3331 drivers/net/ethernet/freescale/ucc_geth.c out_be32(uccf->p_uccm, uccm); out_be32 220 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->mr0, r | EMAC_MR0_TXE); out_be32 233 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->mr0, r & ~EMAC_MR0_TXE); out_be32 266 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->mr0, r | EMAC_MR0_RXE); out_be32 282 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->mr0, r & ~EMAC_MR0_RXE); out_be32 333 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->mr0, r & ~EMAC_MR0_RXE); out_be32 385 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->mr0, EMAC_MR0_SRST); out_be32 442 drivers/net/ethernet/ibm/emac/core.c out_be32(gaht_base + i, gaht_temp[i]); out_be32 583 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->mr1, in_be32(&p->mr1) out_be32 619 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->u1.emac4.ipcr, 0xdeadbeef); out_be32 663 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->mr1, mr1); out_be32 666 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->iahr, (ndev->dev_addr[0] << 8) | ndev->dev_addr[1]); out_be32 667 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->ialr, (ndev->dev_addr[2] << 24) | out_be32 672 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->vtpid, 0x8100); out_be32 678 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->rmr, r); out_be32 687 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->tmr1, r); out_be32 688 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->trtr, emac_calc_trtr(dev, tx_size / 2)); out_be32 711 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->rwmr, r); out_be32 714 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->ptr, 0xffff); out_be32 723 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->iser, r); out_be32 838 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->stacr, r); out_be32 911 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->stacr, r); out_be32 982 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->rmr, rmr); out_be32 1020 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->iahr, (ndev->dev_addr[0] << 8) | ndev->dev_addr[1]); out_be32 1021 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->ialr, (ndev->dev_addr[2] << 24) | out_be32 1438 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->tmr0, EMAC4_TMR0_XMIT); out_be32 1440 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->tmr0, EMAC_TMR0_XMIT); out_be32 1930 drivers/net/ethernet/ibm/emac/core.c out_be32(&p->isr, isr); out_be32 95 drivers/net/ethernet/ibm/emac/rgmii.c out_be32(&p->fer, in_be32(&p->fer) | rgmii_mode_mask(mode, input)); out_be32 126 drivers/net/ethernet/ibm/emac/rgmii.c out_be32(&p->ssr, ssr); out_be32 146 drivers/net/ethernet/ibm/emac/rgmii.c out_be32(&p->fer, fer); out_be32 165 drivers/net/ethernet/ibm/emac/rgmii.c out_be32(&p->fer, fer); out_be32 186 drivers/net/ethernet/ibm/emac/rgmii.c out_be32(&p->fer, in_be32(&p->fer) & ~RGMII_FER_MASK(input)); out_be32 256 drivers/net/ethernet/ibm/emac/rgmii.c out_be32(&dev->base->fer, 0); out_be32 51 drivers/net/ethernet/ibm/emac/tah.c out_be32(&p->mr, TAH_MR_SR); out_be32 60 drivers/net/ethernet/ibm/emac/tah.c out_be32(&p->mr, out_be32 139 drivers/net/ethernet/ibm/emac/zmii.c out_be32(&p->fer, in_be32(&p->fer) | zmii_mode_mask(dev->mode, input)); out_be32 157 drivers/net/ethernet/ibm/emac/zmii.c out_be32(&dev->base->fer, fer | ZMII_FER_MDI(input)); out_be32 185 drivers/net/ethernet/ibm/emac/zmii.c out_be32(&dev->base->ssr, ssr); out_be32 201 drivers/net/ethernet/ibm/emac/zmii.c out_be32(&dev->base->fer, out_be32 264 drivers/net/ethernet/ibm/emac/zmii.c out_be32(&dev->base->fer, 0); out_be32 100 drivers/net/ethernet/toshiba/spider_net.c out_be32(card->regs + reg, value); out_be32 20 drivers/net/ethernet/tundra/tsi108_eth.h out_be32((data->regs + (offset)), val) out_be32 26 drivers/net/ethernet/tundra/tsi108_eth.h out_be32((data->phyregs + (offset)), val) out_be32 138 drivers/rtc/rtc-mpc5121.c out_be32(®s->target_time, now - in_be32(®s->actual_time)); out_be32 352 drivers/rtc/rtc-mpc5121.c out_be32(&rtc->regs->keep_alive, ka); out_be32 274 drivers/scsi/mac_scsi.c out_be32(hostdata->io + (CTRL_REG << 4), value); out_be32 90 drivers/scsi/mvme16x_scsi.c out_be32(0xfff4202c, v); out_be32 117 drivers/scsi/mvme16x_scsi.c out_be32(0xfff4202c, v); out_be32 77 drivers/soc/fsl/qe/gpio.c out_be32(®s->cpdata, qe_gc->cpdata); out_be32 104 drivers/soc/fsl/qe/gpio.c out_be32(®s->cpdata, qe_gc->cpdata); out_be32 270 drivers/soc/fsl/qe/gpio.c out_be32(®s->cpdata, qe_gc->cpdata); out_be32 115 drivers/soc/fsl/qe/qe.c out_be32(&qe_immr->cp.cecr, (u32) (cmd | QE_CR_FLG)); out_be32 132 drivers/soc/fsl/qe/qe.c out_be32(&qe_immr->cp.cecdr, cmd_input); out_be32 133 drivers/soc/fsl/qe/qe.c out_be32(&qe_immr->cp.cecr, out_be32 233 drivers/soc/fsl/qe/qe.c out_be32(&qe_immr->brg.brgc[brg - QE_BRG1], tempval); out_be32 380 drivers/soc/fsl/qe/qe.c out_be32(&sdma->sdebcr, (u32) sdma_buf_offset & QE_SDEBCR_BA_MASK); out_be32 381 drivers/soc/fsl/qe/qe.c out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK | out_be32 420 drivers/soc/fsl/qe/qe.c out_be32(&qe_immr->iram.iadd, be32_to_cpu(ucode->iram_offset) | out_be32 424 drivers/soc/fsl/qe/qe.c out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i])); out_be32 427 drivers/soc/fsl/qe/qe.c out_be32(&qe_immr->iram.iready, be32_to_cpu(QE_IRAM_READY)); out_be32 546 drivers/soc/fsl/qe/qe.c out_be32(&qe_immr->rsp[i].tibcr[j], trap); out_be32 550 drivers/soc/fsl/qe/qe.c out_be32(&qe_immr->rsp[i].eccr, be32_to_cpu(ucode->eccr)); out_be32 182 drivers/soc/fsl/qe/qe_ic.c out_be32(base + (reg >> 2), value); out_be32 62 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io->cpodr, pin_mask1bit | tmp_val); out_be32 64 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io->cpodr, ~pin_mask1bit & tmp_val); out_be32 81 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io->cpdir2, out_be32 84 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io->cpdir2, new_mask2bits | tmp_val); out_be32 86 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io->cpdir1, out_be32 89 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io->cpdir1, new_mask2bits | tmp_val); out_be32 100 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io->cppar2, out_be32 103 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io->cppar2, new_mask2bits | tmp_val); out_be32 105 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io->cppar1, out_be32 108 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io->cppar1, new_mask2bits | tmp_val); out_be32 139 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io[port].cpdata, ~pin_mask & tmp_val); out_be32 141 drivers/soc/fsl/qe/qe_io.c out_be32(&par_io[port].cpdata, pin_mask | tmp_val); out_be32 109 drivers/soc/fsl/qe/ucc_fast.c out_be32(&uf_regs->gumr, gumr); out_be32 130 drivers/soc/fsl/qe/ucc_fast.c out_be32(&uf_regs->gumr, gumr); out_be32 262 drivers/soc/fsl/qe/ucc_fast.c out_be32(&uf_regs->gumr, gumr); out_be32 296 drivers/soc/fsl/qe/ucc_fast.c out_be32(&uf_regs->utfb, uccf->ucc_fast_tx_virtual_fifo_base_offset); out_be32 297 drivers/soc/fsl/qe/ucc_fast.c out_be32(&uf_regs->urfb, uccf->ucc_fast_rx_virtual_fifo_base_offset); out_be32 365 drivers/soc/fsl/qe/ucc_fast.c out_be32(&uf_regs->uccm, uf_info->uccm_mask); out_be32 372 drivers/soc/fsl/qe/ucc_fast.c out_be32(&uf_regs->ucce, 0xffffffff); out_be32 90 drivers/soc/fsl/qe/ucc_slow.c out_be32(&us_regs->gumr_l, gumr_l); out_be32 111 drivers/soc/fsl/qe/ucc_slow.c out_be32(&us_regs->gumr_l, gumr_l); out_be32 231 drivers/soc/fsl/qe/ucc_slow.c out_be32(&bd->buf, 0); out_be32 233 drivers/soc/fsl/qe/ucc_slow.c out_be32((u32 *) bd, 0); out_be32 237 drivers/soc/fsl/qe/ucc_slow.c out_be32(&bd->buf, 0); out_be32 238 drivers/soc/fsl/qe/ucc_slow.c out_be32((u32 *) bd, cpu_to_be32(T_W)); out_be32 244 drivers/soc/fsl/qe/ucc_slow.c out_be32((u32*)bd, 0); out_be32 246 drivers/soc/fsl/qe/ucc_slow.c out_be32(&bd->buf, 0); out_be32 250 drivers/soc/fsl/qe/ucc_slow.c out_be32((u32*)bd, cpu_to_be32(R_W)); out_be32 251 drivers/soc/fsl/qe/ucc_slow.c out_be32(&bd->buf, 0); out_be32 272 drivers/soc/fsl/qe/ucc_slow.c out_be32(&us_regs->gumr_h, gumr); out_be32 285 drivers/soc/fsl/qe/ucc_slow.c out_be32(&us_regs->gumr_l, gumr); out_be32 58 drivers/spi/spi-fsl-cpm.c out_be32(&mspi->pram->rstate, 0); out_be32 61 drivers/spi/spi-fsl-cpm.c out_be32(&mspi->pram->tstate, 0); out_be32 82 drivers/spi/spi-fsl-cpm.c out_be32(&rx_bd->cbd_bufaddr, mspi->rx_dma); out_be32 84 drivers/spi/spi-fsl-cpm.c out_be32(&rx_bd->cbd_bufaddr, mspi->rx_dma + xfer_ofs); out_be32 89 drivers/spi/spi-fsl-cpm.c out_be32(&tx_bd->cbd_bufaddr, mspi->tx_dma); out_be32 91 drivers/spi/spi-fsl-cpm.c out_be32(&tx_bd->cbd_bufaddr, mspi->tx_dma + xfer_ofs); out_be32 359 drivers/spi/spi-fsl-cpm.c out_be32(&mspi->pram->rstate, 0); out_be32 360 drivers/spi/spi-fsl-cpm.c out_be32(&mspi->pram->rdp, 0); out_be32 363 drivers/spi/spi-fsl-cpm.c out_be32(&mspi->pram->rxtmp, 0); out_be32 364 drivers/spi/spi-fsl-cpm.c out_be32(&mspi->pram->tstate, 0); out_be32 365 drivers/spi/spi-fsl-cpm.c out_be32(&mspi->pram->tdp, 0); out_be32 368 drivers/spi/spi-fsl-cpm.c out_be32(&mspi->pram->txtmp, 0); out_be32 118 drivers/spi/spi-mpc512x-psc.c out_be32(psc_addr(mps, sicr), sicr); out_be32 128 drivers/spi/spi-mpc512x-psc.c out_be32(psc_addr(mps, ccr), ccr); out_be32 192 drivers/spi/spi-mpc512x-psc.c out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY); out_be32 193 drivers/spi/spi-mpc512x-psc.c out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY); out_be32 359 drivers/spi/spi-mpc512x-psc.c out_be32(&fifo->tximr, 0); out_be32 423 drivers/spi/spi-mpc512x-psc.c out_be32(&fifo->tximr, 0); out_be32 424 drivers/spi/spi-mpc512x-psc.c out_be32(&fifo->rximr, 0); out_be32 436 drivers/spi/spi-mpc512x-psc.c out_be32(psc_addr(mps, sicr), sicr); out_be32 443 drivers/spi/spi-mpc512x-psc.c out_be32(psc_addr(mps, ccr), ccr); out_be32 450 drivers/spi/spi-mpc512x-psc.c out_be32(&fifo->rxalarm, 0xfff); out_be32 451 drivers/spi/spi-mpc512x-psc.c out_be32(&fifo->txalarm, 0); out_be32 454 drivers/spi/spi-mpc512x-psc.c out_be32(&fifo->rxcmd, out_be32 456 drivers/spi/spi-mpc512x-psc.c out_be32(&fifo->txcmd, out_be32 472 drivers/spi/spi-mpc512x-psc.c out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY); out_be32 473 drivers/spi/spi-mpc512x-psc.c out_be32(&fifo->tximr, 0); out_be32 95 drivers/spi/spi-mpc52xx-psc.c out_be32(&psc->sicr, sicr); out_be32 334 drivers/spi/spi-mpc52xx-psc.c out_be32(&psc->sicr, 0x0180C800); out_be32 411 drivers/tty/serial/cpm_uart/cpm_uart_core.c out_be32(&pinfo->smcup->smc_rstate, 0); out_be32 412 drivers/tty/serial/cpm_uart/cpm_uart_core.c out_be32(&pinfo->smcup->smc_tstate, 0); out_be32 768 drivers/tty/serial/cpm_uart/cpm_uart_core.c out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo)); out_be32 773 drivers/tty/serial/cpm_uart/cpm_uart_core.c out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo)); out_be32 783 drivers/tty/serial/cpm_uart/cpm_uart_core.c out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo)); out_be32 788 drivers/tty/serial/cpm_uart/cpm_uart_core.c out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo)); out_be32 841 drivers/tty/serial/cpm_uart/cpm_uart_core.c out_be32(&scp->scc_gsmrh, 0); out_be32 842 drivers/tty/serial/cpm_uart/cpm_uart_core.c out_be32(&scp->scc_gsmrl, out_be32 875 drivers/tty/serial/cpm_uart/cpm_uart_core.c out_be32(&up->smc_rstate, 0); out_be32 876 drivers/tty/serial/cpm_uart/cpm_uart_core.c out_be32(&up->smc_tstate, 0); out_be32 180 drivers/tty/serial/mpc52xx_uart.c out_be32(&PSC(port)->sicr, val); out_be32 429 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE); out_be32 430 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE); out_be32 431 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->txalarm, 1); out_be32 432 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->tximr, 0); out_be32 434 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE); out_be32 435 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE); out_be32 436 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->rxalarm, 1); out_be32 437 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->rximr, 0); out_be32 439 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM); out_be32 440 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM); out_be32 479 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr); out_be32 488 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr); out_be32 497 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr); out_be32 502 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr)); out_be32 507 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr)); out_be32 525 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->tximr, 0); out_be32 526 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->rximr, 0); out_be32 531 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->tximr, out_be32 533 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f); out_be32 773 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE); out_be32 774 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE); out_be32 775 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->txalarm, 1); out_be32 776 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->tximr, 0); out_be32 778 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE); out_be32 779 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE); out_be32 780 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->rxalarm, 1); out_be32 781 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->rximr, 0); out_be32 783 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->tximr, MPC512x_PSC_FIFO_ALARM); out_be32 784 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->rximr, MPC512x_PSC_FIFO_ALARM); out_be32 820 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->rximr, rx_fifo_imr); out_be32 829 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->tximr, tx_fifo_imr); out_be32 838 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->tximr, tx_fifo_imr); out_be32 843 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->rxisr, in_be32(&FIFO_5125(port)->rxisr)); out_be32 848 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->txisr, in_be32(&FIFO_5125(port)->txisr)); out_be32 866 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->tximr, 0); out_be32 867 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->rximr, 0); out_be32 872 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->tximr, out_be32 874 drivers/tty/serial/mpc52xx_uart.c out_be32(&FIFO_5125(port)->rximr, port->read_status_mask & 0x7f); out_be32 956 drivers/tty/serial/mpc52xx_uart.c out_be32(&PSC_5125(port)->sicr, val); out_be32 604 drivers/tty/serial/ucc_uart.c out_be32(&bdp->buf, cpu2qe_addr(bd_virt, qe_port)); out_be32 612 drivers/tty/serial/ucc_uart.c out_be32(&bdp->buf, cpu2qe_addr(bd_virt, qe_port)); out_be32 625 drivers/tty/serial/ucc_uart.c out_be32(&bdp->buf, cpu2qe_addr(bd_virt, qe_port)); out_be32 637 drivers/tty/serial/ucc_uart.c out_be32(&bdp->buf, cpu2qe_addr(bd_virt, qe_port)); out_be32 718 drivers/tty/serial/ucc_uart.c out_be32(&uccup->rx_state, 0); out_be32 719 drivers/tty/serial/ucc_uart.c out_be32(&uccup->rx_cnt, 0); out_be32 722 drivers/tty/serial/ucc_uart.c out_be32(&uccup->dump_ptr, 0x4000); out_be32 724 drivers/tty/serial/ucc_uart.c out_be32(&uccup->rx_frame_rem, 0); out_be32 132 drivers/uio/uio_fsl_elbc_gpcm.c out_be32(&bank->br, reg_new | BR_V); out_be32 140 drivers/uio/uio_fsl_elbc_gpcm.c out_be32(&bank->or, reg_new); out_be32 378 drivers/uio/uio_fsl_elbc_gpcm.c out_be32(&priv->lbc->bank[priv->bank].or, reg_or_new); out_be32 379 drivers/uio/uio_fsl_elbc_gpcm.c out_be32(&priv->lbc->bank[priv->bank].br, reg_br_new); out_be32 261 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&udc->ep_param[i]->tstate, 0); out_be32 295 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, R_E | R_I); out_be32 298 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, R_E | R_I | R_W); out_be32 302 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&bd->buf, 0); out_be32 303 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, 0); out_be32 306 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, T_W); out_be32 387 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&bd->buf, 0); out_be32 388 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, 0); out_be32 391 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&bd->buf, 0); out_be32 392 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, R_W); out_be32 396 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&bd->buf, 0); out_be32 397 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, 0); out_be32 400 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&bd->buf, 0); out_be32 401 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, T_W); out_be32 456 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&bd->buf, tmp); out_be32 457 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, (R_E | R_I)); out_be32 461 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&bd->buf, tmp); out_be32 462 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, (R_E | R_I | R_W)); out_be32 709 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)ep->e_rxbd, bdstatus); out_be32 729 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, bdstatus); out_be32 988 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK); out_be32 1089 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&bd->buf, paddr); out_be32 1110 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, bdstatus); out_be32 1366 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, bdstatus & T_W); out_be32 1367 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&bd->buf, 0); out_be32 1430 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, bdstatus & T_W); out_be32 1431 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&bd->buf, 0); out_be32 1533 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK)); out_be32 2349 drivers/usb/gadget/udc/fsl_qe_udc.c out_be32(&usbpram->rstate, 0); out_be32 102 drivers/usb/gadget/udc/fsl_udc_core.c out_be32(p, v); out_be32 87 drivers/usb/host/ehci-ppc-of.c out_be32(insreg_virt + 3, PPC440EPX_EHCI0_INSREG_BMT); out_be32 278 drivers/usb/host/fhci-hcd.c out_be32(&fhci->pram->rx_state, 0); out_be32 87 drivers/usb/host/fhci-tds.c out_be32(&ep->empty_td->buf_ptr, DUMMY_BD_BUFFER); out_be32 213 drivers/usb/host/fhci-tds.c out_be32(&td->buf_ptr, 0); out_be32 265 drivers/usb/host/fhci-tds.c out_be32(&ep->ep_pram_ptr->tx_state, 0); out_be32 309 drivers/usb/host/fhci-tds.c out_be32(&td->buf_ptr, 0); out_be32 405 drivers/usb/host/fhci-tds.c out_be32(&td->buf_ptr, virt_to_phys(pkt->data)); out_be32 487 drivers/usb/host/fhci-tds.c out_be32(&td->buf_ptr, DUMMY2_BD_BUFFER); out_be32 501 drivers/usb/host/fhci-tds.c out_be32(&td->buf_ptr, 0); out_be32 507 drivers/usb/host/fhci-tds.c out_be32(&td->buf_ptr, 0); out_be32 512 drivers/usb/host/fhci-tds.c out_be32(&ep->ep_pram_ptr->tx_state, 0); out_be32 546 drivers/usb/host/fhci-tds.c out_be32(&td->buf_ptr, 0); out_be32 562 drivers/usb/host/fhci-tds.c out_be32(&ep->ep_pram_ptr->tx_state, 0); out_be32 615 drivers/usb/host/fhci-tds.c out_be32(&old_td->buf_ptr, 0); out_be32 619 drivers/usb/host/fhci-tds.c out_be32(&old_td->buf_ptr, DUMMY2_BD_BUFFER); out_be32 316 drivers/usb/host/fsl-mph-dr-of.c out_be32(pdata->regs + ISIPHYCTRL, PHYCTRL_PHYE | PHYCTRL_PXE); out_be32 317 drivers/usb/host/fsl-mph-dr-of.c out_be32(pdata->regs + USBGENCTRL, reg); out_be32 85 drivers/usb/phy/phy-fsl-usb.c out_be32(p, v); out_be32 496 drivers/video/fbdev/fsl-diu-fb.c out_be32(reg, val); out_be32 612 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->diu_mode, MFB_MODE1); out_be32 621 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->diu_mode, 0); out_be32 829 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->gamma, DMA_ADDR(data, gamma)); out_be32 831 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->bgnd, 0x007F7F7F); /* Set background to grey */ out_be32 832 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->disp_size, (var->yres << 16) | var->xres); out_be32 839 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->hsyn_para, temp); out_be32 845 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->vsyn_para, temp); out_be32 861 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->plut, 0x01F5F666); out_be32 1051 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->curs_pos, yy << 16 | xx); out_be32 1112 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->cursor, DMA_ADDR(data, cursor)); out_be32 1114 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->cursor, DMA_ADDR(data, blank_cursor)); out_be32 1443 drivers/video/fbdev/fsl-diu-fb.c out_be32(&data->diu_reg->int_mask, 0xffffffff); out_be32 1586 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->diu_mode, 0); out_be32 1588 drivers/video/fbdev/fsl-diu-fb.c out_be32(&hw->diu_mode, 1); out_be32 1774 drivers/video/fbdev/fsl-diu-fb.c out_be32(&data->diu_reg->desc[0], 0); out_be32 1776 drivers/video/fbdev/fsl-diu-fb.c out_be32(&data->diu_reg->desc[1], data->dummy_ad.paddr); out_be32 1777 drivers/video/fbdev/fsl-diu-fb.c out_be32(&data->diu_reg->desc[2], data->dummy_ad.paddr); out_be32 1783 drivers/video/fbdev/fsl-diu-fb.c out_be32(&data->diu_reg->int_mask, 0xffffffff); out_be32 279 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[24].r, 7); /* turn display off */ out_be32 282 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[i+32].r, init->regs[i]); out_be32 284 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[26+32].r, (pinfo->total_vram == 0x100000 ? out_be32 287 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[16].r, (unsigned) pinfo->frame_buffer_phys+init->fb_offset+0x10); out_be32 288 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[18].r, init->pitch[cmode]); out_be32 289 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[19].r, (pinfo->total_vram == 0x100000 ? out_be32 292 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[20].r, (pinfo->total_vram == 0x100000 ? 0x11 : 0x1011)); out_be32 293 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[21].r, 0x100); out_be32 294 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[22].r, 1); out_be32 295 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[23].r, 1); out_be32 296 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[26].r, 0xc00); out_be32 297 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[27].r, 0x235); out_be32 308 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[24].r, 0); /* turn display on */ out_be32 414 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[23].r, 7); /* turn off drivers */ out_be32 419 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[23].r, 3); /* drive A low */ out_be32 422 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[23].r, 5); /* drive B low */ out_be32 426 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[23].r, 6); /* drive C low */ out_be32 430 drivers/video/fbdev/platinumfb.c out_be32(&platinum_regs->reg[23].r, 7); /* turn off drivers */ out_be32 584 drivers/video/fbdev/platinumfb.c out_be32(&pinfo->platinum_regs->reg[16].r, (unsigned)pinfo->frame_buffer_phys); out_be32 585 drivers/video/fbdev/platinumfb.c out_be32(&pinfo->platinum_regs->reg[20].r, 0x1011); /* select max vram */ out_be32 586 drivers/video/fbdev/platinumfb.c out_be32(&pinfo->platinum_regs->reg[24].r, 0); /* switch in vram */ out_be32 94 drivers/watchdog/mpc8xxx_wdt.c out_be32(&ddata->base->swcrr, tmp); out_be32 169 drivers/watchdog/mpc8xxx_wdt.c out_be32(rsr, wdt_type->rsr_mask); out_be32 83 drivers/watchdog/pika_wdt.c out_be32(pikawdt_private.fpga + 0x14, reset); out_be32 413 sound/drivers/ml403-ac97cr.c out_be32(CR_REG(ml403_ac97cr, PLAYFIFO), 0); out_be32 438 sound/drivers/ml403-ac97cr.c out_be32(CR_REG(ml403_ac97cr, PLAYFIFO), out_be32 542 sound/drivers/ml403-ac97cr.c out_be32(CR_REG(ml403_ac97cr, RESETFIFO), CR_PLAYRESET); out_be32 581 sound/drivers/ml403-ac97cr.c out_be32(CR_REG(ml403_ac97cr, RESETFIFO), CR_RECRESET); out_be32 878 sound/drivers/ml403-ac97cr.c out_be32(CR_REG(ml403_ac97cr, CODEC_ADDR), out_be32 986 sound/drivers/ml403-ac97cr.c out_be32(CR_REG(ml403_ac97cr, CODEC_DATAWRITE), out_be32 988 sound/drivers/ml403-ac97cr.c out_be32(CR_REG(ml403_ac97cr, CODEC_ADDR), out_be32 1061 sound/drivers/ml403-ac97cr.c out_be32(CR_REG(ml403_ac97cr, RESETFIFO), out_be32 63 sound/ppc/snd_ps3.c out_be32(the_card.mapped_mmio_vaddr + reg, val); out_be32 263 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->sr, sr2); out_be32 469 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->clndar, out_be32 471 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->eclndar, out_be32 475 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->bcr, 0); out_be32 507 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->mr, mr); out_be32 641 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->mr, mr); out_be32 777 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->mr, CCSR_DMA_MR_CA); out_be32 778 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->mr, 0); out_be32 781 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->sr, -1); out_be32 782 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->clndar, 0); out_be32 783 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->eclndar, 0); out_be32 784 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->satr, 0); out_be32 785 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->sar, 0); out_be32 786 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->datr, 0); out_be32 787 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->dar, 0); out_be32 788 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->bcr, 0); out_be32 789 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->nlndar, 0); out_be32 790 sound/soc/fsl/fsl_dma.c out_be32(&dma_channel->enlndar, 0); out_be32 50 sound/soc/fsl/mpc5200_psc_ac97.c out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24)); out_be32 89 sound/soc/fsl/mpc5200_psc_ac97.c out_be32(&psc_dma->psc_regs->ac97_cmd, out_be32 102 sound/soc/fsl/mpc5200_psc_ac97.c out_be32(®s->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR); out_be32 104 sound/soc/fsl/mpc5200_psc_ac97.c out_be32(®s->sicr, psc_dma->sicr); out_be32 119 sound/soc/fsl/mpc5200_psc_ac97.c out_be32(®s->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB); out_be32 169 sound/soc/fsl/mpc5200_psc_ac97.c out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000); out_be32 171 sound/soc/fsl/mpc5200_psc_ac97.c out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000); out_be32 189 sound/soc/fsl/mpc5200_psc_ac97.c out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); out_be32 198 sound/soc/fsl/mpc5200_psc_ac97.c out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); out_be32 308 sound/soc/fsl/mpc5200_psc_ac97.c out_be32(®s->sicr, psc_dma->sicr); out_be32 311 sound/soc/fsl/mpc5200_psc_ac97.c out_be32(®s->ac97_slots, 0x00000000); out_be32 68 sound/soc/fsl/mpc5200_psc_i2s.c out_be32(&psc_dma->psc_regs->sicr, psc_dma->sicr | mode); out_be32 182 sound/soc/fsl/mpc5200_psc_i2s.c out_be32(&psc_dma->psc_regs->sicr,