opp_regs 257 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c static const struct dce_opp_registers opp_regs[] = { opp_regs 258 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c opp_regs(0), opp_regs 259 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c opp_regs(1), opp_regs 260 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c opp_regs(2), opp_regs 261 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c opp_regs(3), opp_regs 262 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c opp_regs(4), opp_regs 263 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c opp_regs(5) opp_regs 598 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); opp_regs 283 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c static const struct dce_opp_registers opp_regs[] = { opp_regs 284 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c opp_regs(0), opp_regs 285 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c opp_regs(1), opp_regs 286 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c opp_regs(2), opp_regs 287 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c opp_regs(3), opp_regs 288 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c opp_regs(4), opp_regs 289 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c opp_regs(5) opp_regs 644 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); opp_regs 290 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c static const struct dce_opp_registers opp_regs[] = { opp_regs 291 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c opp_regs(0), opp_regs 292 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c opp_regs(1), opp_regs 293 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c opp_regs(2), opp_regs 294 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c opp_regs(3), opp_regs 295 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c opp_regs(4), opp_regs 296 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c opp_regs(5) opp_regs 617 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); opp_regs 301 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c static const struct dce_opp_registers opp_regs[] = { opp_regs 302 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c opp_regs(0), opp_regs 303 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c opp_regs(1), opp_regs 304 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c opp_regs(2), opp_regs 305 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c opp_regs(3), opp_regs 306 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c opp_regs(4), opp_regs 307 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c opp_regs(5) opp_regs 392 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); opp_regs 274 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c static const struct dce_opp_registers opp_regs[] = { opp_regs 275 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c opp_regs(0), opp_regs 276 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c opp_regs(1), opp_regs 277 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c opp_regs(2), opp_regs 278 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c opp_regs(3), opp_regs 279 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c opp_regs(4), opp_regs 280 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c opp_regs(5) opp_regs 478 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); opp_regs 347 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c static const struct dcn10_opp_registers opp_regs[] = { opp_regs 348 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c opp_regs(0), opp_regs 349 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c opp_regs(1), opp_regs 350 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c opp_regs(2), opp_regs 351 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c opp_regs(3), opp_regs 629 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c &opp_regs[inst], &opp_shift, &opp_mask); opp_regs 646 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c static const struct dcn20_opp_registers opp_regs[] = { opp_regs 647 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c opp_regs(0), opp_regs 648 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c opp_regs(1), opp_regs 649 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c opp_regs(2), opp_regs 650 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c opp_regs(3), opp_regs 651 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c opp_regs(4), opp_regs 652 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c opp_regs(5), opp_regs 1020 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c &opp_regs[inst], &opp_shift, &opp_mask); opp_regs 412 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c static const struct dcn20_opp_registers opp_regs[] = { opp_regs 413 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c opp_regs(0), opp_regs 414 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c opp_regs(1), opp_regs 415 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c opp_regs(2), opp_regs 416 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c opp_regs(3), opp_regs 417 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c opp_regs(4), opp_regs 418 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c opp_regs(5), opp_regs 1204 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c &opp_regs[inst], &opp_shift, &opp_mask);