opal_event_irqchip   36 arch/powerpc/platforms/powernv/opal-irqchip.c static struct opal_event_irqchip opal_event_irqchip;
opal_event_irqchip   46 arch/powerpc/platforms/powernv/opal-irqchip.c 	e = READ_ONCE(last_outstanding_events) & opal_event_irqchip.mask;
opal_event_irqchip   55 arch/powerpc/platforms/powernv/opal-irqchip.c 		virq = irq_find_mapping(opal_event_irqchip.domain, hwirq);
opal_event_irqchip   68 arch/powerpc/platforms/powernv/opal-irqchip.c 	e = be64_to_cpu(events) & opal_event_irqchip.mask;
opal_event_irqchip   75 arch/powerpc/platforms/powernv/opal-irqchip.c 	if (last_outstanding_events & opal_event_irqchip.mask)
opal_event_irqchip   82 arch/powerpc/platforms/powernv/opal-irqchip.c 	clear_bit(d->hwirq, &opal_event_irqchip.mask);
opal_event_irqchip   87 arch/powerpc/platforms/powernv/opal-irqchip.c 	set_bit(d->hwirq, &opal_event_irqchip.mask);
opal_event_irqchip  105 arch/powerpc/platforms/powernv/opal-irqchip.c static struct opal_event_irqchip opal_event_irqchip = {
opal_event_irqchip  118 arch/powerpc/platforms/powernv/opal-irqchip.c 	irq_set_chip_data(irq, &opal_event_irqchip);
opal_event_irqchip  119 arch/powerpc/platforms/powernv/opal-irqchip.c 	irq_set_chip_and_handler(irq, &opal_event_irqchip.irqchip,
opal_event_irqchip  197 arch/powerpc/platforms/powernv/opal-irqchip.c 	opal_event_irqchip.domain = irq_domain_add_linear(dn, MAX_NUM_EVENTS,
opal_event_irqchip  198 arch/powerpc/platforms/powernv/opal-irqchip.c 				&opal_event_domain_ops, &opal_event_irqchip);
opal_event_irqchip  200 arch/powerpc/platforms/powernv/opal-irqchip.c 	if (!opal_event_irqchip.domain) {
opal_event_irqchip  308 arch/powerpc/platforms/powernv/opal-irqchip.c 	if (WARN_ON_ONCE(!opal_event_irqchip.domain))
opal_event_irqchip  311 arch/powerpc/platforms/powernv/opal-irqchip.c 	return irq_create_mapping(opal_event_irqchip.domain, opal_event_nr);