omap_hwmod_read   299 arch/arm/mach-omap2/display.c 	v = omap_hwmod_read(oh, DISPC_CONTROL);
omap_hwmod_read   305 arch/arm/mach-omap2/display.c 		v = omap_hwmod_read(oh, DISPC_CONTROL2);
omap_hwmod_read   311 arch/arm/mach-omap2/display.c 		v = omap_hwmod_read(oh, DISPC_CONTROL3);
omap_hwmod_read   346 arch/arm/mach-omap2/display.c 	v = omap_hwmod_read(oh, DISPC_CONTROL);
omap_hwmod_read   352 arch/arm/mach-omap2/display.c 		v = omap_hwmod_read(oh, DISPC_CONTROL2);
omap_hwmod_read   359 arch/arm/mach-omap2/display.c 		v = omap_hwmod_read(oh, DISPC_CONTROL3);
omap_hwmod_read   365 arch/arm/mach-omap2/display.c 	while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) !=
omap_hwmod_read   405 arch/arm/mach-omap2/display.c 	omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
omap_hwmod_read    46 arch/arm/mach-omap2/hdq1w.c 	v = omap_hwmod_read(oh, HDQ_CTRL_STATUS_OFFSET);
omap_hwmod_read    51 arch/arm/mach-omap2/hdq1w.c 	omap_test_timeout((omap_hwmod_read(oh,
omap_hwmod_read    48 arch/arm/mach-omap2/i2c.c 	v = omap_hwmod_read(oh, i2c_con);
omap_hwmod_read    56 arch/arm/mach-omap2/i2c.c 	v = omap_hwmod_read(oh, i2c_con);
omap_hwmod_read    61 arch/arm/mach-omap2/i2c.c 	omap_test_timeout((omap_hwmod_read(oh,
omap_hwmod_read    59 arch/arm/mach-omap2/msdi.c 	omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
omap_hwmod_read   279 arch/arm/mach-omap2/omap_hwmod.c 	oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
omap_hwmod_read   500 arch/arm/mach-omap2/omap_hwmod.c 		omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
omap_hwmod_read   505 arch/arm/mach-omap2/omap_hwmod.c 		omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
omap_hwmod_read   638 arch/arm/mach-omap2/omap_hwmod.h u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
omap_hwmod_read    79 arch/arm/mach-omap2/omap_hwmod_reset.c 	omap_test_timeout(omap_hwmod_read(oh, OMAP_RTC_STATUS_REG)
omap_hwmod_read    83 arch/arm/mach-omap2/wd_timer.c 	omap_test_timeout((omap_hwmod_read(oh,