omap3_noncore_dpll_set_rate_and_parent  278 drivers/clk/ti/clock.h int omap3_noncore_dpll_set_rate_and_parent(struct clk_hw *hw,
omap3_noncore_dpll_set_rate_and_parent   39 drivers/clk/ti/dpll.c 	.set_rate_and_parent	= &omap3_noncore_dpll_set_rate_and_parent,
omap3_noncore_dpll_set_rate_and_parent   64 drivers/clk/ti/dpll.c 	.set_rate_and_parent	= &omap3_noncore_dpll_set_rate_and_parent,
omap3_noncore_dpll_set_rate_and_parent   77 drivers/clk/ti/dpll.c 	.set_rate_and_parent	= &omap3_noncore_dpll_set_rate_and_parent,
omap3_noncore_dpll_set_rate_and_parent  118 drivers/clk/ti/dpll.c 	.set_rate_and_parent	= &omap3_noncore_dpll_set_rate_and_parent,
omap3_noncore_dpll_set_rate_and_parent  130 drivers/clk/ti/dpll.c 	.set_rate_and_parent	= &omap3_noncore_dpll_set_rate_and_parent,
omap3_noncore_dpll_set_rate_and_parent  959 drivers/clk/ti/dpll3xxx.c 	return omap3_noncore_dpll_set_rate_and_parent(hw, rate, parent_rate,