omap3_noncore_dpll_set_rate  276 drivers/clk/ti/clock.h int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
omap3_noncore_dpll_set_rate   37 drivers/clk/ti/dpll.c 	.set_rate	= &omap3_noncore_dpll_set_rate,
omap3_noncore_dpll_set_rate   62 drivers/clk/ti/dpll.c 	.set_rate	= &omap3_noncore_dpll_set_rate,
omap3_noncore_dpll_set_rate   75 drivers/clk/ti/dpll.c 	.set_rate	= &omap3_noncore_dpll_set_rate,
omap3_noncore_dpll_set_rate  116 drivers/clk/ti/dpll.c 	.set_rate	= &omap3_noncore_dpll_set_rate,
omap3_noncore_dpll_set_rate  627 drivers/clk/ti/dpll3xxx.c 		ret = omap3_noncore_dpll_set_rate(hw, rate, parent_rate);
omap3_noncore_dpll_set_rate  936 drivers/clk/ti/dpll3xxx.c 	return omap3_noncore_dpll_set_rate(hw, rate, parent_rate);
omap3_noncore_dpll_set_rate 1027 drivers/clk/ti/dpll3xxx.c 	return omap3_noncore_dpll_set_rate(hw, rate, parent_rate);