nvkm_wo32 77 drivers/gpu/drm/nouveau/include/nvkm/core/memory.h nvkm_wo32((o), _addr, (_data & ~(m)) | (d)); \ nvkm_wo32 83 drivers/gpu/drm/nouveau/include/nvkm/core/memory.h nvkm_wo32((o), __a + 0, lower_32_bits(__d)); \ nvkm_wo32 84 drivers/gpu/drm/nouveau/include/nvkm/core/memory.h nvkm_wo32((o), __a + 4, upper_32_bits(__d)); \ nvkm_wo32 62 drivers/gpu/drm/nouveau/nvkm/core/gpuobj.c nvkm_wo32(gpuobj->memory, offset, data); nvkm_wo32 125 drivers/gpu/drm/nouveau/nvkm/core/gpuobj.c nvkm_wo32(gpuobj->parent, gpuobj->node->offset + offset, data); nvkm_wo32 197 drivers/gpu/drm/nouveau/nvkm/core/gpuobj.c nvkm_wo32(gpuobj, offset, 0x00000000); nvkm_wo32 267 drivers/gpu/drm/nouveau/nvkm/core/gpuobj.c nvkm_wo32(dst, dstoffset + i, *(u32 *)(src + i)); nvkm_wo32 93 drivers/gpu/drm/nouveau/nvkm/core/ramht.c nvkm_wo32(ramht->gpuobj, (co << 3) + 0, handle); nvkm_wo32 94 drivers/gpu/drm/nouveau/nvkm/core/ramht.c nvkm_wo32(ramht->gpuobj, (co << 3) + 4, context); nvkm_wo32 41 drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c nvkm_wo32(*pgpuobj, 0x00, object->oclass); nvkm_wo32 42 drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c nvkm_wo32(*pgpuobj, 0x04, 0x00000000); nvkm_wo32 43 drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c nvkm_wo32(*pgpuobj, 0x08, 0x00000000); nvkm_wo32 44 drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c nvkm_wo32(*pgpuobj, 0x0c, 0x00000000); nvkm_wo32 51 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0); nvkm_wo32 52 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(dmaobj->base.limit)); nvkm_wo32 53 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c nvkm_wo32(*pgpuobj, 0x08, lower_32_bits(dmaobj->base.start)); nvkm_wo32 54 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c nvkm_wo32(*pgpuobj, 0x0c, upper_32_bits(dmaobj->base.limit) << 24 | nvkm_wo32 56 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c nvkm_wo32(*pgpuobj, 0x10, 0x00000000); nvkm_wo32 57 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c nvkm_wo32(*pgpuobj, 0x14, dmaobj->flags5); nvkm_wo32 50 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0); nvkm_wo32 51 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c nvkm_wo32(*pgpuobj, 0x04, dmaobj->base.start >> 8); nvkm_wo32 52 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c nvkm_wo32(*pgpuobj, 0x08, dmaobj->base.limit >> 8); nvkm_wo32 53 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c nvkm_wo32(*pgpuobj, 0x0c, 0x00000000); nvkm_wo32 54 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c nvkm_wo32(*pgpuobj, 0x10, 0x00000000); nvkm_wo32 55 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c nvkm_wo32(*pgpuobj, 0x14, 0x00000000); nvkm_wo32 50 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergv100.c nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0); nvkm_wo32 51 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergv100.c nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(start)); nvkm_wo32 52 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergv100.c nvkm_wo32(*pgpuobj, 0x08, upper_32_bits(start)); nvkm_wo32 53 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergv100.c nvkm_wo32(*pgpuobj, 0x0c, lower_32_bits(limit)); nvkm_wo32 54 drivers/gpu/drm/nouveau/nvkm/engine/dma/usergv100.c nvkm_wo32(*pgpuobj, 0x10, upper_32_bits(limit)); nvkm_wo32 65 drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | (adjust << 20)); nvkm_wo32 66 drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c nvkm_wo32(*pgpuobj, 0x04, length); nvkm_wo32 67 drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c nvkm_wo32(*pgpuobj, 0x08, dmaobj->flags2 | offset); nvkm_wo32 68 drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c nvkm_wo32(*pgpuobj, 0x0c, dmaobj->flags2 | offset); nvkm_wo32 51 drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0); nvkm_wo32 52 drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(dmaobj->base.limit)); nvkm_wo32 53 drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c nvkm_wo32(*pgpuobj, 0x08, lower_32_bits(dmaobj->base.start)); nvkm_wo32 54 drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c nvkm_wo32(*pgpuobj, 0x0c, upper_32_bits(dmaobj->base.limit) << 24 | nvkm_wo32 56 drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c nvkm_wo32(*pgpuobj, 0x10, 0x00000000); nvkm_wo32 57 drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c nvkm_wo32(*pgpuobj, 0x14, dmaobj->flags5); nvkm_wo32 258 drivers/gpu/drm/nouveau/nvkm/engine/falcon.c nvkm_wo32(falcon->core, i, falcon->code.data[i / 4]); nvkm_wo32 121 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x00, 0x00000000); nvkm_wo32 122 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x04, 0x00000000); nvkm_wo32 123 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x08, 0x00000000); nvkm_wo32 124 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x0c, 0x00000000); nvkm_wo32 125 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x10, 0x00000000); nvkm_wo32 126 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x14, 0x00000000); nvkm_wo32 148 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x00, 0x00190000); nvkm_wo32 149 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x04, lower_32_bits(limit)); nvkm_wo32 150 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x08, lower_32_bits(start)); nvkm_wo32 151 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x0c, upper_32_bits(limit) << 24 | nvkm_wo32 153 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x10, 0x00000000); nvkm_wo32 154 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c nvkm_wo32(chan->eng, offset + 0x14, 0x00000000); nvkm_wo32 89 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x00, 0x00000000); nvkm_wo32 90 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x04, 0x00000000); nvkm_wo32 91 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x08, 0x00000000); nvkm_wo32 92 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x0c, 0x00000000); nvkm_wo32 93 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x10, 0x00000000); nvkm_wo32 94 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x14, 0x00000000); nvkm_wo32 117 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x00, 0x00190000); nvkm_wo32 118 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x04, lower_32_bits(limit)); nvkm_wo32 119 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x08, lower_32_bits(start)); nvkm_wo32 120 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x0c, upper_32_bits(limit) << 24 | nvkm_wo32 122 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x10, 0x00000000); nvkm_wo32 123 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nvkm_wo32(chan->eng, offset + 0x14, 0x00000000); nvkm_wo32 68 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x08, lower_32_bits(args->v0.offset)); nvkm_wo32 69 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x0c, upper_32_bits(args->v0.offset)); nvkm_wo32 70 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x10, lower_32_bits(args->v0.offset)); nvkm_wo32 71 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x14, upper_32_bits(args->v0.offset)); nvkm_wo32 72 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x3c, 0x003f6078); nvkm_wo32 73 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); nvkm_wo32 74 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x48, chan->base.push->node->offset >> 4); nvkm_wo32 75 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x4c, 0xffffffff); nvkm_wo32 76 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); nvkm_wo32 77 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x78, 0x00000000); nvkm_wo32 78 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x7c, 0x30000001); nvkm_wo32 79 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | nvkm_wo32 82 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x88, chan->cache->addr >> 10); nvkm_wo32 83 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c nvkm_wo32(chan->ramfc, 0x98, chan->base.inst->addr >> 12); nvkm_wo32 104 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_wo32(fctx, c->ctxp + data, cv | (rv << c->ctxs)); nvkm_wo32 149 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_wo32(imem->ramfc, chan->ramfc + c->ctxp, 0x00000000); nvkm_wo32 206 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); nvkm_wo32 207 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); nvkm_wo32 208 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x08, chan->base.push->addr >> 4); nvkm_wo32 209 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x10, nvkm_wo32 77 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); nvkm_wo32 78 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); nvkm_wo32 79 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4); nvkm_wo32 80 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x14, nvkm_wo32 78 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); nvkm_wo32 79 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); nvkm_wo32 80 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4); nvkm_wo32 81 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x14, nvkm_wo32 80 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + ctx, 0x00000000); nvkm_wo32 111 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + ctx, inst); nvkm_wo32 225 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); nvkm_wo32 226 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); nvkm_wo32 227 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4); nvkm_wo32 228 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x18, 0x30000000 | nvkm_wo32 235 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x3c, 0x0001ffff); nvkm_wo32 68 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x08, lower_32_bits(args->v0.offset)); nvkm_wo32 69 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x0c, upper_32_bits(args->v0.offset)); nvkm_wo32 70 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x10, lower_32_bits(args->v0.offset)); nvkm_wo32 71 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x14, upper_32_bits(args->v0.offset)); nvkm_wo32 72 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x3c, 0x003f6078); nvkm_wo32 73 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); nvkm_wo32 74 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x48, chan->base.push->node->offset >> 4); nvkm_wo32 75 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x4c, 0xffffffff); nvkm_wo32 76 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); nvkm_wo32 77 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x78, 0x00000000); nvkm_wo32 78 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x7c, 0x30000001); nvkm_wo32 79 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | nvkm_wo32 66 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c nvkm_wo32(cur, (nr * 8) + 0, chan->base.chid); nvkm_wo32 67 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c nvkm_wo32(cur, (nr * 8) + 4, 0x00000004); nvkm_wo32 241 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c nvkm_wo32(memory, offset + 0, chan->base.chid); nvkm_wo32 242 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c nvkm_wo32(memory, offset + 4, 0x00000000); nvkm_wo32 36 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.c nvkm_wo32(memory, offset + 0, (cgrp->chan_nr << 26) | (128 << 18) | nvkm_wo32 38 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.c nvkm_wo32(memory, offset + 4, 0x00000000); nvkm_wo32 36 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c nvkm_wo32(memory, offset + 0, chan->base.chid); nvkm_wo32 37 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c nvkm_wo32(memory, offset + 4, chan->base.inst->addr >> 12); nvkm_wo32 72 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c nvkm_wo32(chan->ramfc, 0x3c, 0x403f6078); nvkm_wo32 73 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); nvkm_wo32 74 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c nvkm_wo32(chan->ramfc, 0x48, chan->base.push->node->offset >> 4); nvkm_wo32 75 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c nvkm_wo32(chan->ramfc, 0x50, lower_32_bits(ioffset)); nvkm_wo32 76 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c nvkm_wo32(chan->ramfc, 0x54, upper_32_bits(ioffset) | (ilength << 16)); nvkm_wo32 77 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); nvkm_wo32 78 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c nvkm_wo32(chan->ramfc, 0x78, 0x00000000); nvkm_wo32 79 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c nvkm_wo32(chan->ramfc, 0x7c, 0x30000001); nvkm_wo32 80 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | nvkm_wo32 83 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c nvkm_wo32(chan->ramfc, 0x88, chan->cache->addr >> 10); nvkm_wo32 84 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c nvkm_wo32(chan->ramfc, 0x98, chan->base.inst->addr >> 12); nvkm_wo32 97 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(inst, offset + 0x00, 0x00000000); nvkm_wo32 98 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(inst, offset + 0x04, 0x00000000); nvkm_wo32 116 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(inst, offset + 0x00, lower_32_bits(addr) | 4); nvkm_wo32 117 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(inst, offset + 0x04, upper_32_bits(addr)); nvkm_wo32 268 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(fifo->user.mem, usermem + i, 0x00000000); nvkm_wo32 274 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0x08, lower_32_bits(usermem)); nvkm_wo32 275 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0x0c, upper_32_bits(usermem)); nvkm_wo32 276 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0x10, 0x0000face); nvkm_wo32 277 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0x30, 0xfffff902); nvkm_wo32 278 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0x48, lower_32_bits(ioffset)); nvkm_wo32 279 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0x4c, upper_32_bits(ioffset) | nvkm_wo32 281 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0x54, 0x00000002); nvkm_wo32 282 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0x84, 0x20400000); nvkm_wo32 283 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0x94, 0x30000001); nvkm_wo32 284 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0x9c, 0x00000100); nvkm_wo32 285 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0xa4, 0x1f1f1f1f); nvkm_wo32 286 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0xa8, 0x1f1f1f1f); nvkm_wo32 287 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0xac, 0x0000001f); nvkm_wo32 288 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0xb8, 0xf8000000); nvkm_wo32 289 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0xf8, 0x10003080); /* 0x002310 */ nvkm_wo32 290 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c nvkm_wo32(chan->base.inst, 0xfc, 0x10000010); /* 0x002350 */ nvkm_wo32 112 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(inst, (offset & 0xffff) + 0x00, 0x00000000); nvkm_wo32 113 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(inst, (offset & 0xffff) + 0x04, 0x00000000); nvkm_wo32 115 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(inst, offset + 0x00, 0x00000000); nvkm_wo32 116 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(inst, offset + 0x04, 0x00000000); nvkm_wo32 137 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(inst, (offset & 0xffff) + 0x00, datalo); nvkm_wo32 138 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(inst, (offset & 0xffff) + 0x04, datahi); nvkm_wo32 140 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(inst, offset + 0x00, datalo); nvkm_wo32 141 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(inst, offset + 0x04, datahi); nvkm_wo32 303 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(fifo->user.mem, usermem + i, 0x00000000); nvkm_wo32 309 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0x08, lower_32_bits(usermem)); nvkm_wo32 310 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0x0c, upper_32_bits(usermem)); nvkm_wo32 311 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0x10, 0x0000face); nvkm_wo32 312 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0x30, 0xfffff902); nvkm_wo32 313 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0x48, lower_32_bits(ioffset)); nvkm_wo32 314 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0x4c, upper_32_bits(ioffset) | nvkm_wo32 316 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0x84, 0x20400000); nvkm_wo32 317 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0x94, 0x30000001); nvkm_wo32 318 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0x9c, 0x00000100); nvkm_wo32 319 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0xac, 0x0000001f); nvkm_wo32 320 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0xe4, priv ? 0x00000020 : 0x00000000); nvkm_wo32 321 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0xe8, chan->base.chid); nvkm_wo32 322 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0xb8, 0xf8000000); nvkm_wo32 323 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0xf8, 0x10003080); /* 0x002310 */ nvkm_wo32 324 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c nvkm_wo32(chan->base.inst, 0xfc, 0x10000010); /* 0x002350 */ nvkm_wo32 82 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(inst, 0x0210, 0x00000000); nvkm_wo32 83 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(inst, 0x0214, 0x00000000); nvkm_wo32 102 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(inst, 0x210, lower_32_bits(addr) | 0x00000004); nvkm_wo32 103 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(inst, 0x214, upper_32_bits(addr)); nvkm_wo32 183 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(fifo->user.mem, usermem + i, 0x00000000); nvkm_wo32 203 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x008, lower_32_bits(usermem)); nvkm_wo32 204 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x00c, upper_32_bits(usermem)); nvkm_wo32 205 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x010, 0x0000face); nvkm_wo32 206 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x030, 0x7ffff902); nvkm_wo32 207 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x048, lower_32_bits(ioffset)); nvkm_wo32 208 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x04c, upper_32_bits(ioffset) | nvkm_wo32 210 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x084, 0x20400000); nvkm_wo32 211 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x094, 0x30000001); nvkm_wo32 212 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x0e4, priv ? 0x00000020 : 0x00000000); nvkm_wo32 213 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x0e8, chan->base.chid); nvkm_wo32 214 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x0f4, 0x00001000); nvkm_wo32 215 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x0f8, 0x10003080); nvkm_wo32 217 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x220, lower_32_bits(mthd)); nvkm_wo32 218 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c nvkm_wo32(chan->base.inst, 0x224, upper_32_bits(mthd)); nvkm_wo32 72 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c nvkm_wo32(chan->ramfc, 0x3c, 0x403f6078); nvkm_wo32 73 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); nvkm_wo32 74 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c nvkm_wo32(chan->ramfc, 0x48, chan->base.push->node->offset >> 4); nvkm_wo32 75 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c nvkm_wo32(chan->ramfc, 0x50, lower_32_bits(ioffset)); nvkm_wo32 76 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c nvkm_wo32(chan->ramfc, 0x54, upper_32_bits(ioffset) | (ilength << 16)); nvkm_wo32 77 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); nvkm_wo32 78 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c nvkm_wo32(chan->ramfc, 0x78, 0x00000000); nvkm_wo32 79 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c nvkm_wo32(chan->ramfc, 0x7c, 0x30000001); nvkm_wo32 80 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | nvkm_wo32 39 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c nvkm_wo32(memory, offset + 0x0, lower_32_bits(user)); nvkm_wo32 40 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c nvkm_wo32(memory, offset + 0x4, upper_32_bits(user)); nvkm_wo32 41 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c nvkm_wo32(memory, offset + 0x8, lower_32_bits(inst) | chan->base.chid); nvkm_wo32 42 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c nvkm_wo32(memory, offset + 0xc, upper_32_bits(inst)); nvkm_wo32 49 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c nvkm_wo32(memory, offset + 0x0, (128 << 24) | (3 << 16) | 0x00000001); nvkm_wo32 50 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c nvkm_wo32(memory, offset + 0x4, cgrp->chan_nr); nvkm_wo32 51 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c nvkm_wo32(memory, offset + 0x8, cgrp->id); nvkm_wo32 52 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c nvkm_wo32(memory, offset + 0xc, 0x00000000); nvkm_wo32 42 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c nvkm_wo32(cur, p++ * 4, i); nvkm_wo32 1512 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c nvkm_wo32(inst, 0x0210, lower_32_bits(ctx->addr + CB_RESERVED) | 4); nvkm_wo32 1513 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c nvkm_wo32(inst, 0x0214, upper_32_bits(ctx->addr + CB_RESERVED)); nvkm_wo32 1531 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c nvkm_wo32(data, 0x1c, 1); nvkm_wo32 1532 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c nvkm_wo32(data, 0x20, 0); nvkm_wo32 1533 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c nvkm_wo32(data, 0x28, 0); nvkm_wo32 1534 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c nvkm_wo32(data, 0x2c, 0); nvkm_wo32 585 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c nvkm_wo32(obj, offset * 4, 0x3f800000); nvkm_wo32 589 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c nvkm_wo32(obj, (offset + b0_offset + i) * 4, 0x00000001); nvkm_wo32 591 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c nvkm_wo32(obj, (offset + b1_offset + i) * 4, 0x3f800000); nvkm_wo32 129 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h nvkm_wo32(ctx->data, reg * 4, val); nvkm_wo32 789 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c nvkm_wo32(ctx->data, 4 * (ctx->ctxvals_pos + i), val); nvkm_wo32 1162 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c nvkm_wo32(ctx->data, 4 * (ctx->ctxvals_pos + (i << 3)), val); nvkm_wo32 334 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, i, gr->data[i / 4]); nvkm_wo32 337 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, 0x00, chan->mmio_nr / 2); nvkm_wo32 338 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, 0x04, chan->mmio_vma->addr >> 8); nvkm_wo32 340 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, 0xf4, 0); nvkm_wo32 341 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, 0xf8, 0); nvkm_wo32 342 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, 0x10, chan->mmio_nr / 2); nvkm_wo32 343 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, 0x14, lower_32_bits(chan->mmio_vma->addr)); nvkm_wo32 344 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, 0x18, upper_32_bits(chan->mmio_vma->addr)); nvkm_wo32 345 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, 0x1c, 1); nvkm_wo32 346 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, 0x20, 0); nvkm_wo32 347 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, 0x28, 0); nvkm_wo32 348 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(*pgpuobj, 0x2c, 0); nvkm_wo32 450 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(chan->mmio, chan->mmio_nr++ * 4, addr); nvkm_wo32 451 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c nvkm_wo32(chan->mmio, chan->mmio_nr++ * 4, data); nvkm_wo32 1050 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c nvkm_wo32(*pgpuobj, 0x00, object->oclass); nvkm_wo32 1054 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c nvkm_wo32(*pgpuobj, 0x04, 0x00000000); nvkm_wo32 1055 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c nvkm_wo32(*pgpuobj, 0x08, 0x00000000); nvkm_wo32 1056 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c nvkm_wo32(*pgpuobj, 0x0c, 0x00000000); nvkm_wo32 24 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(gr->ctxtab, chan->chid * 4, inst >> 4); nvkm_wo32 54 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(gr->ctxtab, chan->chid * 4, 0x00000000); nvkm_wo32 96 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x0000, 0x00000001 | (chan->chid << 24)); nvkm_wo32 97 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x033c, 0xffff0000); nvkm_wo32 98 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x03a0, 0x0fff0000); nvkm_wo32 99 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x03a4, 0x0fff0000); nvkm_wo32 100 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x047c, 0x00000101); nvkm_wo32 101 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x0490, 0x00000111); nvkm_wo32 102 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x04a8, 0x44400000); nvkm_wo32 104 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, i, 0x00030303); nvkm_wo32 106 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, i, 0x00080000); nvkm_wo32 108 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, i, 0x01012000); nvkm_wo32 110 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, i, 0x000105b8); nvkm_wo32 112 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, i, 0x00080008); nvkm_wo32 114 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, i, 0x07ff0000); nvkm_wo32 115 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x05a4, 0x4b7fffff); nvkm_wo32 116 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x05fc, 0x00000001); nvkm_wo32 117 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x0604, 0x00004000); nvkm_wo32 118 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x0610, 0x00000001); nvkm_wo32 119 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x0618, 0x00040000); nvkm_wo32 120 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x061c, 0x00010000); nvkm_wo32 122 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, (i + 0), 0x10700ff9); nvkm_wo32 123 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, (i + 4), 0x0436086c); nvkm_wo32 124 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, (i + 8), 0x000c001b); nvkm_wo32 126 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x281c, 0x3f800000); nvkm_wo32 127 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x2830, 0x3f800000); nvkm_wo32 128 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x285c, 0x40000000); nvkm_wo32 129 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x2860, 0x3f800000); nvkm_wo32 130 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x2864, 0x3f000000); nvkm_wo32 131 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x286c, 0x40000000); nvkm_wo32 132 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x2870, 0x3f800000); nvkm_wo32 133 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x2878, 0xbf800000); nvkm_wo32 134 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x2880, 0xbf800000); nvkm_wo32 135 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x34a4, 0x000fe000); nvkm_wo32 136 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x3530, 0x000003f8); nvkm_wo32 137 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, 0x3540, 0x002fe000); nvkm_wo32 139 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nvkm_wo32(chan->inst, i, 0x001c527c); nvkm_wo32 42 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); nvkm_wo32 43 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x035c, 0xffff0000); nvkm_wo32 44 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x03c0, 0x0fff0000); nvkm_wo32 45 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x03c4, 0x0fff0000); nvkm_wo32 46 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x049c, 0x00000101); nvkm_wo32 47 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x04b0, 0x00000111); nvkm_wo32 48 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x04c8, 0x00000080); nvkm_wo32 49 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x04cc, 0xffff0000); nvkm_wo32 50 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x04d0, 0x00000001); nvkm_wo32 51 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x04e4, 0x44400000); nvkm_wo32 52 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x04fc, 0x4b800000); nvkm_wo32 54 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, i, 0x00030303); nvkm_wo32 56 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, i, 0x00080000); nvkm_wo32 58 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, i, 0x01012000); nvkm_wo32 60 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, i, 0x000105b8); nvkm_wo32 62 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, i, 0x00080008); nvkm_wo32 64 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, i, 0x07ff0000); nvkm_wo32 65 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x05e0, 0x4b7fffff); nvkm_wo32 66 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x0620, 0x00000080); nvkm_wo32 67 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x0624, 0x30201000); nvkm_wo32 68 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x0628, 0x70605040); nvkm_wo32 69 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x062c, 0xb0a09080); nvkm_wo32 70 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x0630, 0xf0e0d0c0); nvkm_wo32 71 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x0664, 0x00000001); nvkm_wo32 72 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x066c, 0x00004000); nvkm_wo32 73 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x0678, 0x00000001); nvkm_wo32 74 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x0680, 0x00040000); nvkm_wo32 75 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x0684, 0x00010000); nvkm_wo32 77 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, (i + 0), 0x10700ff9); nvkm_wo32 78 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, (i + 4), 0x0436086c); nvkm_wo32 79 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, (i + 8), 0x000c001b); nvkm_wo32 81 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x2704, 0x3f800000); nvkm_wo32 82 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x2718, 0x3f800000); nvkm_wo32 83 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x2744, 0x40000000); nvkm_wo32 84 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x2748, 0x3f800000); nvkm_wo32 85 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x274c, 0x3f000000); nvkm_wo32 86 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x2754, 0x40000000); nvkm_wo32 87 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x2758, 0x3f800000); nvkm_wo32 88 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x2760, 0xbf800000); nvkm_wo32 89 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x2768, 0xbf800000); nvkm_wo32 90 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x308c, 0x000fe000); nvkm_wo32 91 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x3108, 0x000003f8); nvkm_wo32 92 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, 0x3468, 0x002fe000); nvkm_wo32 94 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nvkm_wo32(chan->inst, i, 0x001c527c); nvkm_wo32 42 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x0000, 0x00000001 | (chan->chid << 24)); nvkm_wo32 43 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x033c, 0xffff0000); nvkm_wo32 44 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x03a0, 0x0fff0000); nvkm_wo32 45 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x03a4, 0x0fff0000); nvkm_wo32 46 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x047c, 0x00000101); nvkm_wo32 47 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x0490, 0x00000111); nvkm_wo32 48 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x04a8, 0x44400000); nvkm_wo32 50 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, i, 0x00030303); nvkm_wo32 52 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, i, 0x00080000); nvkm_wo32 54 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, i, 0x01012000); nvkm_wo32 56 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, i, 0x000105b8); nvkm_wo32 58 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, i, 0x00080008); nvkm_wo32 60 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, i, 0x07ff0000); nvkm_wo32 61 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x05a4, 0x4b7fffff); nvkm_wo32 62 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x05fc, 0x00000001); nvkm_wo32 63 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x0604, 0x00004000); nvkm_wo32 64 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x0610, 0x00000001); nvkm_wo32 65 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x0618, 0x00040000); nvkm_wo32 66 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x061c, 0x00010000); nvkm_wo32 68 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, (i + 0), 0x10700ff9); nvkm_wo32 69 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, (i + 4), 0x0436086c); nvkm_wo32 70 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, (i + 8), 0x000c001b); nvkm_wo32 72 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x269c, 0x3f800000); nvkm_wo32 73 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x26b0, 0x3f800000); nvkm_wo32 74 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x26dc, 0x40000000); nvkm_wo32 75 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x26e0, 0x3f800000); nvkm_wo32 76 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x26e4, 0x3f000000); nvkm_wo32 77 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x26ec, 0x40000000); nvkm_wo32 78 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x26f0, 0x3f800000); nvkm_wo32 79 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x26f8, 0xbf800000); nvkm_wo32 80 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x2700, 0xbf800000); nvkm_wo32 81 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x3024, 0x000fe000); nvkm_wo32 82 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x30a0, 0x000003f8); nvkm_wo32 83 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, 0x33fc, 0x002fe000); nvkm_wo32 85 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nvkm_wo32(chan->inst, i, 0x001c527c); nvkm_wo32 43 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); nvkm_wo32 44 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0410, 0x00000101); nvkm_wo32 45 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0424, 0x00000111); nvkm_wo32 46 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0428, 0x00000060); nvkm_wo32 47 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0444, 0x00000080); nvkm_wo32 48 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0448, 0xffff0000); nvkm_wo32 49 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x044c, 0x00000001); nvkm_wo32 50 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0460, 0x44400000); nvkm_wo32 51 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x048c, 0xffff0000); nvkm_wo32 53 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i, 0x0fff0000); nvkm_wo32 54 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x04ec, 0x00011100); nvkm_wo32 56 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i, 0x07ff0000); nvkm_wo32 57 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0550, 0x4b7fffff); nvkm_wo32 58 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x058c, 0x00000080); nvkm_wo32 59 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0590, 0x30201000); nvkm_wo32 60 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0594, 0x70605040); nvkm_wo32 61 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0598, 0xb8a89888); nvkm_wo32 62 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x059c, 0xf8e8d8c8); nvkm_wo32 63 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x05b0, 0xb0000000); nvkm_wo32 65 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i, 0x00010588); nvkm_wo32 67 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i, 0x00030303); nvkm_wo32 69 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i, 0x0008aae4); nvkm_wo32 71 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i, 0x01012000); nvkm_wo32 73 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i, 0x00080008); nvkm_wo32 74 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x085c, 0x00040000); nvkm_wo32 75 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x0860, 0x00010000); nvkm_wo32 77 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i, 0x00040004); nvkm_wo32 79 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i + 0, 0x10700ff9); nvkm_wo32 80 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i + 4, 0x0436086c); nvkm_wo32 81 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i + 8, 0x000c001b); nvkm_wo32 84 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, i, 0x0000ffff); nvkm_wo32 85 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x344c, 0x3f800000); nvkm_wo32 86 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x3808, 0x3f800000); nvkm_wo32 87 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x381c, 0x3f800000); nvkm_wo32 88 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x3848, 0x40000000); nvkm_wo32 89 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x384c, 0x3f800000); nvkm_wo32 90 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x3850, 0x3f000000); nvkm_wo32 91 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x3858, 0x40000000); nvkm_wo32 92 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x385c, 0x3f800000); nvkm_wo32 93 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x3864, 0xbf800000); nvkm_wo32 94 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nvkm_wo32(chan->inst, 0x386c, 0xbf800000); nvkm_wo32 42 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); nvkm_wo32 43 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x040c, 0x01000101); nvkm_wo32 44 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0420, 0x00000111); nvkm_wo32 45 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0424, 0x00000060); nvkm_wo32 46 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0440, 0x00000080); nvkm_wo32 47 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0444, 0xffff0000); nvkm_wo32 48 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0448, 0x00000001); nvkm_wo32 49 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x045c, 0x44400000); nvkm_wo32 50 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0480, 0xffff0000); nvkm_wo32 52 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i, 0x0fff0000); nvkm_wo32 53 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x04e0, 0x00011100); nvkm_wo32 55 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i, 0x07ff0000); nvkm_wo32 56 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0544, 0x4b7fffff); nvkm_wo32 57 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x057c, 0x00000080); nvkm_wo32 58 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0580, 0x30201000); nvkm_wo32 59 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0584, 0x70605040); nvkm_wo32 60 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0588, 0xb8a89888); nvkm_wo32 61 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x058c, 0xf8e8d8c8); nvkm_wo32 62 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x05a0, 0xb0000000); nvkm_wo32 64 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i, 0x00010588); nvkm_wo32 66 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i, 0x00030303); nvkm_wo32 68 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i, 0x0008aae4); nvkm_wo32 70 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i, 0x01012000); nvkm_wo32 72 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i, 0x00080008); nvkm_wo32 73 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0850, 0x00040000); nvkm_wo32 74 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x0854, 0x00010000); nvkm_wo32 76 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i, 0x00040004); nvkm_wo32 78 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i + 0, 0x10700ff9); nvkm_wo32 79 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i + 4, 0x0436086c); nvkm_wo32 80 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i + 8, 0x000c001b); nvkm_wo32 83 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, i, 0x0000ffff); nvkm_wo32 84 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x2ae0, 0x3f800000); nvkm_wo32 85 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x2e9c, 0x3f800000); nvkm_wo32 86 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x2eb0, 0x3f800000); nvkm_wo32 87 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x2edc, 0x40000000); nvkm_wo32 88 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x2ee0, 0x3f800000); nvkm_wo32 89 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x2ee4, 0x3f000000); nvkm_wo32 90 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x2eec, 0x40000000); nvkm_wo32 91 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x2ef0, 0x3f800000); nvkm_wo32 92 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x2ef8, 0xbf800000); nvkm_wo32 93 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nvkm_wo32(chan->inst, 0x2f00, 0xbf800000); nvkm_wo32 42 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); nvkm_wo32 43 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x040c, 0x00000101); nvkm_wo32 44 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0420, 0x00000111); nvkm_wo32 45 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0424, 0x00000060); nvkm_wo32 46 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0440, 0x00000080); nvkm_wo32 47 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0444, 0xffff0000); nvkm_wo32 48 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0448, 0x00000001); nvkm_wo32 49 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x045c, 0x44400000); nvkm_wo32 50 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0488, 0xffff0000); nvkm_wo32 52 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i, 0x0fff0000); nvkm_wo32 53 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x04e8, 0x00011100); nvkm_wo32 55 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i, 0x07ff0000); nvkm_wo32 56 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x054c, 0x4b7fffff); nvkm_wo32 57 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0588, 0x00000080); nvkm_wo32 58 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x058c, 0x30201000); nvkm_wo32 59 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0590, 0x70605040); nvkm_wo32 60 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0594, 0xb8a89888); nvkm_wo32 61 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0598, 0xf8e8d8c8); nvkm_wo32 62 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x05ac, 0xb0000000); nvkm_wo32 64 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i, 0x00010588); nvkm_wo32 66 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i, 0x00030303); nvkm_wo32 68 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i, 0x0008aae4); nvkm_wo32 70 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i, 0x01012000); nvkm_wo32 72 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i, 0x00080008); nvkm_wo32 73 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0860, 0x00040000); nvkm_wo32 74 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x0864, 0x00010000); nvkm_wo32 76 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i, 0x00040004); nvkm_wo32 78 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i + 0, 0x10700ff9); nvkm_wo32 79 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i + 4, 0x0436086c); nvkm_wo32 80 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i + 8, 0x000c001b); nvkm_wo32 83 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, i, 0x0000ffff); nvkm_wo32 84 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x3450, 0x3f800000); nvkm_wo32 85 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x380c, 0x3f800000); nvkm_wo32 86 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x3820, 0x3f800000); nvkm_wo32 87 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x384c, 0x40000000); nvkm_wo32 88 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x3850, 0x3f800000); nvkm_wo32 89 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x3854, 0x3f000000); nvkm_wo32 90 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x385c, 0x40000000); nvkm_wo32 91 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x3860, 0x3f800000); nvkm_wo32 92 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x3868, 0xbf800000); nvkm_wo32 93 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nvkm_wo32(chan->inst, 0x3870, 0xbf800000); nvkm_wo32 51 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nvkm_wo32(*pgpuobj, 0x00, object->oclass); nvkm_wo32 52 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nvkm_wo32(*pgpuobj, 0x04, 0x00000000); nvkm_wo32 53 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nvkm_wo32(*pgpuobj, 0x08, 0x00000000); nvkm_wo32 57 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nvkm_wo32(*pgpuobj, 0x0c, 0x00000000); nvkm_wo32 58 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nvkm_wo32(*pgpuobj, 0x10, 0x00000000); nvkm_wo32 85 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nvkm_wo32(*pgpuobj, 0x00000, chan->inst >> 4); nvkm_wo32 50 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nvkm_wo32(*pgpuobj, 0x00, object->oclass); nvkm_wo32 51 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nvkm_wo32(*pgpuobj, 0x04, 0x00000000); nvkm_wo32 52 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nvkm_wo32(*pgpuobj, 0x08, 0x00000000); nvkm_wo32 53 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nvkm_wo32(*pgpuobj, 0x0c, 0x00000000); nvkm_wo32 46 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c nvkm_wo32(*pgpuobj, 0x00, object->oclass); nvkm_wo32 47 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c nvkm_wo32(*pgpuobj, 0x04, 0x00000000); nvkm_wo32 48 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c nvkm_wo32(*pgpuobj, 0x08, 0x00000000); nvkm_wo32 49 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c nvkm_wo32(*pgpuobj, 0x0c, 0x00000000); nvkm_wo32 61 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv44.c nvkm_wo32(*pgpuobj, 0x78, 0x02001ec1); nvkm_wo32 44 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv50.c nvkm_wo32(*pgpuobj, 0x70, 0x00801ec1); nvkm_wo32 45 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv50.c nvkm_wo32(*pgpuobj, 0x7c, 0x0000037c); nvkm_wo32 132 drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c nvkm_wo32(xtensa->gpu_fw, i * 4, *((u32 *)fw->data + i)); nvkm_wo32 156 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar2, 0x00, 0x7fc00000); nvkm_wo32 157 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar2, 0x04, lower_32_bits(limit)); nvkm_wo32 158 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar2, 0x08, lower_32_bits(start)); nvkm_wo32 159 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar2, 0x0c, upper_32_bits(limit) << 24 | nvkm_wo32 161 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar2, 0x10, 0x00000000); nvkm_wo32 162 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar2, 0x14, 0x00000000); nvkm_wo32 192 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x00, 0x7fc00000); nvkm_wo32 193 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x04, lower_32_bits(limit)); nvkm_wo32 194 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x08, lower_32_bits(start)); nvkm_wo32 195 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 | nvkm_wo32 197 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x10, 0x00000000); nvkm_wo32 198 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x14, 0x00000000); nvkm_wo32 41 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c nvkm_wo32(memory, i, iobj->suspend[i / 4]); nvkm_wo32 114 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c nvkm_wo32(memory, offset, 0x00000000); nvkm_wo32 43 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.c nvkm_wo32(inst, 0x21c, 0x00000000); nvkm_wo32 47 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.c nvkm_wo32(inst, 0x2a4 + (i * 0x10), data[1]); nvkm_wo32 48 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.c nvkm_wo32(inst, 0x2a0 + (i * 0x10), data[0]); nvkm_wo32 50 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.c nvkm_wo32(inst, 0x2a4 + (i * 0x10), 0x00000001); nvkm_wo32 51 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.c nvkm_wo32(inst, 0x2a0 + (i * 0x10), 0x00000001); nvkm_wo32 53 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.c nvkm_wo32(inst, 0x2a8 + (i * 0x10), 0x00000000); nvkm_wo32 56 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.c nvkm_wo32(inst, 0x298, lower_32_bits(mask)); nvkm_wo32 57 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.c nvkm_wo32(inst, 0x29c, upper_32_bits(mask)); nvkm_wo32 137 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv04.c nvkm_wo32(mem, 0x00000, 0x0002103d); /* PCI, RW, PT, !LN */ nvkm_wo32 138 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv04.c nvkm_wo32(mem, 0x00004, vmm->limit - 1); nvkm_wo32 461 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c nvkm_wo32(wpr_blob, pos, NVKM_SECBOOT_FALCON_INVALID); nvkm_wo32 313 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c nvkm_wo32(wpr_blob, pos, NVKM_SECBOOT_FALCON_INVALID);