nvkm_sw_chan 32 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c struct nvkm_sw_chan *chan; nvkm_sw_chan 53 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c struct nvkm_sw_chan *chan = nvkm_sw_chan(oclass->parent); nvkm_sw_chan 33 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c nvkm_sw_chan_mthd(struct nvkm_sw_chan *chan, int subc, u32 mthd, u32 data) nvkm_sw_chan 75 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c struct nvkm_sw_chan *chan = nvkm_sw_chan(object); nvkm_sw_chan 91 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c nvkm_sw_chan = { nvkm_sw_chan 98 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c struct nvkm_sw_chan *chan) nvkm_sw_chan 102 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c nvkm_object_ctor(&nvkm_sw_chan, oclass, &chan->object); nvkm_sw_chan 4 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.h #define nvkm_sw_chan(p) container_of((p), struct nvkm_sw_chan, object) nvkm_sw_chan 21 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.h void *(*dtor)(struct nvkm_sw_chan *); nvkm_sw_chan 22 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.h bool (*mthd)(struct nvkm_sw_chan *, int subc, u32 mthd, u32 data); nvkm_sw_chan 27 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.h struct nvkm_sw_chan *); nvkm_sw_chan 28 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.h bool nvkm_sw_chan_mthd(struct nvkm_sw_chan *, int subc, u32 mthd, u32 data); nvkm_sw_chan 57 drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c gf100_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data) nvkm_sw_chan 35 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c struct nvkm_sw_chan base; nvkm_sw_chan 77 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c nv04_nvsw_new(struct nvkm_sw_chan *chan, const struct nvkm_oclass *oclass, nvkm_sw_chan 88 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c nv04_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data) nvkm_sw_chan 42 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c struct nvkm_sw_chan *chan; nvkm_sw_chan 62 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c nv50_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data) nvkm_sw_chan 84 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c nv50_sw_chan_dtor(struct nvkm_sw_chan *base) nvkm_sw_chan 11 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h struct nvkm_sw_chan base; nvkm_sw_chan 20 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h void *nv50_sw_chan_dtor(struct nvkm_sw_chan *); nvkm_sw_chan 60 drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.c nvkm_nvsw_new_(const struct nvkm_nvsw_func *func, struct nvkm_sw_chan *chan, nvkm_sw_chan 81 drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.c nvkm_nvsw_new(struct nvkm_sw_chan *chan, const struct nvkm_oclass *oclass, nvkm_sw_chan 10 drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.h struct nvkm_sw_chan *chan; nvkm_sw_chan 17 drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.h int nvkm_nvsw_new_(const struct nvkm_nvsw_func *, struct nvkm_sw_chan *, nvkm_sw_chan 20 drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.h int nvkm_nvsw_new(struct nvkm_sw_chan *, const struct nvkm_oclass *, nvkm_sw_chan 6 drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h struct nvkm_sw_chan; nvkm_sw_chan 12 drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h int (*ctor)(struct nvkm_sw_chan *, const struct nvkm_oclass *,