nvkm_sw           177 drivers/gpu/drm/nouveau/include/nvkm/core/device.h 	struct nvkm_sw *sw;
nvkm_sw           250 drivers/gpu/drm/nouveau/include/nvkm/core/device.h 	int (*sw      )(struct nvkm_device *, int idx, struct nvkm_sw **);
nvkm_sw            13 drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h bool nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data);
nvkm_sw            15 drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h int nv04_sw_new(struct nvkm_device *, int, struct nvkm_sw **);
nvkm_sw            16 drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h int nv10_sw_new(struct nvkm_device *, int, struct nvkm_sw **);
nvkm_sw            17 drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h int nv50_sw_new(struct nvkm_device *, int, struct nvkm_sw **);
nvkm_sw            18 drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h int gf100_sw_new(struct nvkm_device *, int, struct nvkm_sw **);
nvkm_sw           110 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 	struct nvkm_sw *sw = device->sw;
nvkm_sw            30 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data)
nvkm_sw            61 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c 	struct nvkm_sw *sw = nvkm_sw(oclass->engine);
nvkm_sw            81 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c 	struct nvkm_sw *sw = nvkm_sw(oclass->engine);
nvkm_sw            88 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c 	return nvkm_sw(engine);
nvkm_sw            92 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c nvkm_sw = {
nvkm_sw           100 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c 	     int index, struct nvkm_sw **psw)
nvkm_sw           102 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c 	struct nvkm_sw *sw;
nvkm_sw           109 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c 	return nvkm_engine_ctor(&nvkm_sw, device, index, true, &sw->engine);
nvkm_sw            76 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c 	struct nvkm_sw *sw = chan->sw;
nvkm_sw            96 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c nvkm_sw_chan_ctor(const struct nvkm_sw_chan_func *func, struct nvkm_sw *sw,
nvkm_sw            13 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.h 	struct nvkm_sw *sw;
nvkm_sw            25 drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.h int nvkm_sw_chan_ctor(const struct nvkm_sw_chan_func *, struct nvkm_sw *,
nvkm_sw            43 drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c 	struct nvkm_sw *sw = chan->base.sw;
nvkm_sw           105 drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c gf100_sw_chan_new(struct nvkm_sw *sw, struct nvkm_fifo_chan *fifoch,
nvkm_sw           152 drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c gf100_sw_new(struct nvkm_device *device, int index, struct nvkm_sw **psw)
nvkm_sw           109 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c nv04_sw_chan_new(struct nvkm_sw *sw, struct nvkm_fifo_chan *fifo,
nvkm_sw           136 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c nv04_sw_new(struct nvkm_device *device, int index, struct nvkm_sw **psw)
nvkm_sw            39 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c nv10_sw_chan_new(struct nvkm_sw *sw, struct nvkm_fifo_chan *fifo,
nvkm_sw            65 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c nv10_sw_new(struct nvkm_device *device, int index, struct nvkm_sw **psw)
nvkm_sw            43 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c 	struct nvkm_sw *sw = chan->base.sw;
nvkm_sw           100 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c nv50_sw_chan_new(struct nvkm_sw *sw, struct nvkm_fifo_chan *fifoch,
nvkm_sw           145 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c nv50_sw_new(struct nvkm_device *device, int index, struct nvkm_sw **psw)
nvkm_sw             4 drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h #define nvkm_sw(p) container_of((p), struct nvkm_sw, engine)
nvkm_sw             9 drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h 		 int index, struct nvkm_sw **);
nvkm_sw            18 drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h 	int (*chan_new)(struct nvkm_sw *, struct nvkm_fifo_chan *,