nvkm_secboot 152 drivers/gpu/drm/nouveau/include/nvkm/core/device.h struct nvkm_secboot *secboot; nvkm_secboot 225 drivers/gpu/drm/nouveau/include/nvkm/core/device.h int (*secboot )(struct nvkm_device *, int idx, struct nvkm_secboot **); nvkm_secboot 31 drivers/gpu/drm/nouveau/include/nvkm/core/msgqueue.h int nvkm_msgqueue_new(u32, struct nvkm_falcon *, const struct nvkm_secboot *, nvkm_secboot 55 drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h #define nvkm_secboot(p) container_of((p), struct nvkm_secboot, subdev) nvkm_secboot 57 drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h bool nvkm_secboot_is_managed(struct nvkm_secboot *, enum nvkm_secboot_falcon); nvkm_secboot 58 drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h int nvkm_secboot_reset(struct nvkm_secboot *, unsigned long); nvkm_secboot 60 drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h int gm200_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); nvkm_secboot 61 drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h int gm20b_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); nvkm_secboot 62 drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h int gp102_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); nvkm_secboot 63 drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h int gp108_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); nvkm_secboot 64 drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h int gp10b_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); nvkm_secboot 1693 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c struct nvkm_secboot *sb = device->secboot; nvkm_secboot 495 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c const struct nvkm_secboot *sb, struct nvkm_msgqueue **queue) nvkm_secboot 206 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.h int msgqueue_0137c63d_new(struct nvkm_falcon *, const struct nvkm_secboot *, nvkm_secboot 208 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.h int msgqueue_0137bca5_new(struct nvkm_falcon *, const struct nvkm_secboot *, nvkm_secboot 210 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.h int msgqueue_0148cdec_new(struct nvkm_falcon *, const struct nvkm_secboot *, nvkm_secboot 390 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c msgqueue_0137c63d_new(struct nvkm_falcon *falcon, const struct nvkm_secboot *sb, nvkm_secboot 416 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c msgqueue_0137bca5_new(struct nvkm_falcon *falcon, const struct nvkm_secboot *sb, nvkm_secboot 250 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0148cdec.c msgqueue_0148cdec_new(struct nvkm_falcon *falcon, const struct nvkm_secboot *sb, nvkm_secboot 38 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr.h int (*oneinit)(struct nvkm_acr *, struct nvkm_secboot *); nvkm_secboot 39 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr.h int (*fini)(struct nvkm_acr *, struct nvkm_secboot *, bool); nvkm_secboot 42 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr.h int (*reset)(struct nvkm_acr *, struct nvkm_secboot *, unsigned long); nvkm_secboot 244 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c const struct nvkm_secboot *sb, nvkm_secboot 481 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c acr_r352_prepare_ls_blob(struct acr_r352 *acr, struct nvkm_secboot *sb) nvkm_secboot 597 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c acr_r352_fixup_hs_desc(struct acr_r352 *acr, struct nvkm_secboot *sb, nvkm_secboot 653 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c acr_r352_prepare_hs_blob(struct acr_r352 *acr, struct nvkm_secboot *sb, nvkm_secboot 715 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c acr_r352_load_blobs(struct acr_r352 *acr, struct nvkm_secboot *sb) nvkm_secboot 840 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c acr_r352_shutdown(struct acr_r352 *acr, struct nvkm_secboot *sb) nvkm_secboot 877 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c acr_r352_wpr_is_set(const struct acr_r352 *acr, const struct nvkm_secboot *sb) nvkm_secboot 904 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c acr_r352_bootstrap(struct acr_r352 *acr, struct nvkm_secboot *sb) nvkm_secboot 959 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c acr_r352_reset_nopmu(struct acr_r352 *acr, struct nvkm_secboot *sb, nvkm_secboot 995 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c acr_r352_reset(struct nvkm_acr *_acr, struct nvkm_secboot *sb, nvkm_secboot 1045 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c acr_r352_fini(struct nvkm_acr *_acr, struct nvkm_secboot *sb, bool suspend) nvkm_secboot 71 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h int (*load)(const struct nvkm_secboot *, int maxver, nvkm_secboot 73 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h int (*post_run)(const struct nvkm_acr *, const struct nvkm_secboot *); nvkm_secboot 90 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h void (*fixup_hs_desc)(struct acr_r352 *, struct nvkm_secboot *, void *); nvkm_secboot 95 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h const struct nvkm_secboot *, nvkm_secboot 159 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h const struct nvkm_secboot *, nvkm_secboot 165 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h void acr_r352_fixup_hs_desc(struct acr_r352 *, struct nvkm_secboot *, void *); nvkm_secboot 63 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r364.c acr_r364_fixup_hs_desc(struct acr_r352 *acr, struct nvkm_secboot *sb, nvkm_secboot 113 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c const struct nvkm_secboot *sb, nvkm_secboot 352 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c acr_r367_fixup_hs_desc(struct acr_r352 *acr, struct nvkm_secboot *sb, nvkm_secboot 28 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.h void acr_r367_fixup_hs_desc(struct acr_r352 *, struct nvkm_secboot *, void *); nvkm_secboot 31 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.h const struct nvkm_secboot *, nvkm_secboot 105 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c nvkm_secboot_reset(struct nvkm_secboot *sb, unsigned long falcon_mask) nvkm_secboot 120 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c nvkm_secboot_is_managed(struct nvkm_secboot *sb, enum nvkm_secboot_falcon fid) nvkm_secboot 131 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c struct nvkm_secboot *sb = nvkm_secboot(subdev); nvkm_secboot 166 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c struct nvkm_secboot *sb = nvkm_secboot(subdev); nvkm_secboot 178 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c struct nvkm_secboot *sb = nvkm_secboot(subdev); nvkm_secboot 188 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c nvkm_secboot = { nvkm_secboot 197 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c struct nvkm_secboot *sb) nvkm_secboot 201 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c nvkm_subdev_ctor(&nvkm_secboot, device, index, &sb->subdev); nvkm_secboot 37 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c gm200_secboot_run_blob(struct nvkm_secboot *sb, struct nvkm_gpuobj *blob, nvkm_secboot 105 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c gm200_secboot_oneinit(struct nvkm_secboot *sb) nvkm_secboot 139 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c gm200_secboot_fini(struct nvkm_secboot *sb, bool suspend) nvkm_secboot 150 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c gm200_secboot_dtor(struct nvkm_secboot *sb) nvkm_secboot 174 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c struct nvkm_secboot **psb) nvkm_secboot 29 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.h struct nvkm_secboot base; nvkm_secboot 37 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.h int gm200_secboot_oneinit(struct nvkm_secboot *); nvkm_secboot 38 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.h int gm200_secboot_fini(struct nvkm_secboot *, bool); nvkm_secboot 39 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.h void *gm200_secboot_dtor(struct nvkm_secboot *); nvkm_secboot 40 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.h int gm200_secboot_run_blob(struct nvkm_secboot *, struct nvkm_gpuobj *, nvkm_secboot 44 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c struct nvkm_secboot *sb = &gsb->base; nvkm_secboot 83 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c gm20b_secboot_oneinit(struct nvkm_secboot *sb) nvkm_secboot 105 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c struct nvkm_secboot **psb) nvkm_secboot 34 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c gp102_secboot_scrub_required(struct nvkm_secboot *sb) nvkm_secboot 47 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c gp102_run_secure_scrub(struct nvkm_secboot *sb) nvkm_secboot 121 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c gp102_secboot_run_blob(struct nvkm_secboot *sb, struct nvkm_gpuobj *blob, nvkm_secboot 146 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c struct nvkm_secboot **psb) nvkm_secboot 27 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp108.c struct nvkm_secboot **psb) nvkm_secboot 29 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp10b.c gp10b_secboot_oneinit(struct nvkm_secboot *sb) nvkm_secboot 51 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp10b.c struct nvkm_secboot **psb) nvkm_secboot 150 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h int acr_ls_ucode_load_fecs(const struct nvkm_secboot *, int, nvkm_secboot 152 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h int acr_ls_ucode_load_gpccs(const struct nvkm_secboot *, int, nvkm_secboot 154 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h int acr_ls_ucode_load_pmu(const struct nvkm_secboot *, int, nvkm_secboot 156 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h int acr_ls_pmu_post_run(const struct nvkm_acr *, const struct nvkm_secboot *); nvkm_secboot 157 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h int acr_ls_ucode_load_sec2(const struct nvkm_secboot *, int, nvkm_secboot 159 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h int acr_ls_sec2_post_run(const struct nvkm_acr *, const struct nvkm_secboot *); nvkm_secboot 149 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c acr_ls_ucode_load_fecs(const struct nvkm_secboot *sb, int maxver, nvkm_secboot 156 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c acr_ls_ucode_load_gpccs(const struct nvkm_secboot *sb, int maxver, nvkm_secboot 102 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c acr_ls_ucode_load_pmu(const struct nvkm_secboot *sb, int maxver, nvkm_secboot 122 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c acr_ls_pmu_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb) nvkm_secboot 140 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c acr_ls_ucode_load_sec2(const struct nvkm_secboot *sb, int maxver, nvkm_secboot 160 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c acr_ls_sec2_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb) nvkm_secboot 31 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h int (*oneinit)(struct nvkm_secboot *); nvkm_secboot 32 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h int (*fini)(struct nvkm_secboot *, bool suspend); nvkm_secboot 33 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h void *(*dtor)(struct nvkm_secboot *); nvkm_secboot 34 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h int (*run_blob)(struct nvkm_secboot *, struct nvkm_gpuobj *, nvkm_secboot 39 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h struct nvkm_device *, int, struct nvkm_secboot *); nvkm_secboot 40 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h int nvkm_secboot_falcon_reset(struct nvkm_secboot *); nvkm_secboot 41 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h int nvkm_secboot_falcon_run(struct nvkm_secboot *);