nvkm_pll_vals     121 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	struct nvkm_pll_vals *pv = &regp->pllvals;
nvkm_pll_vals      40 drivers/gpu/drm/nouveau/dispnv04/disp.h 	struct nvkm_pll_vals pllvals;
nvkm_pll_vals     132 drivers/gpu/drm/nouveau/dispnv04/hw.c 		      uint32_t pll2, struct nvkm_pll_vals *pllvals)
nvkm_pll_vals     164 drivers/gpu/drm/nouveau/dispnv04/hw.c 		       struct nvkm_pll_vals *pllvals)
nvkm_pll_vals     204 drivers/gpu/drm/nouveau/dispnv04/hw.c nouveau_hw_pllvals_to_clk(struct nvkm_pll_vals *pv)
nvkm_pll_vals     216 drivers/gpu/drm/nouveau/dispnv04/hw.c 	struct nvkm_pll_vals pllvals;
nvkm_pll_vals     263 drivers/gpu/drm/nouveau/dispnv04/hw.c 	struct nvkm_pll_vals pv;
nvkm_pll_vals      44 drivers/gpu/drm/nouveau/dispnv04/hw.h 			   struct nvkm_pll_vals *pllvals);
nvkm_pll_vals      45 drivers/gpu/drm/nouveau/dispnv04/hw.h int nouveau_hw_pllvals_to_clk(struct nvkm_pll_vals *pllvals);
nvkm_pll_vals       8 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h struct nvkm_pll_vals;
nvkm_pll_vals     118 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h 			struct nvkm_pll_vals *pv);
nvkm_pll_vals     119 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h 	int (*pll_prog)(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *pv);
nvkm_pll_vals      33 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c 		  int clk, struct nvkm_pll_vals *pv)
nvkm_pll_vals      49 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c nv04_clk_pll_prog(struct nvkm_clk *clk, u32 reg1, struct nvkm_pll_vals *pv)
nvkm_pll_vals      25 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h 		      struct nvkm_pll_vals *);
nvkm_pll_vals      26 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h int nv04_clk_pll_prog(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *);
nvkm_pll_vals     144 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	      struct nvkm_pll_vals *pv)
nvkm_pll_vals     199 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 		       struct nvkm_pll_vals *pv)
nvkm_pll_vals     277 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 		      struct nvkm_pll_vals *pv)
nvkm_pll_vals     360 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	struct nvkm_pll_vals pv;
nvkm_pll_vals       6 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.h struct nvkm_pll_vals;
nvkm_pll_vals      20 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.h void setPLL_single(struct nvkm_devinit *, u32, struct nvkm_pll_vals *);
nvkm_pll_vals      21 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.h void setPLL_double_highregs(struct nvkm_devinit *, u32, struct nvkm_pll_vals *);
nvkm_pll_vals      22 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.h void setPLL_double_lowregs(struct nvkm_devinit *, u32, struct nvkm_pll_vals *);