nvkm_mc_intr_mask   18 drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h void nvkm_mc_intr_mask(struct nvkm_device *, enum nvkm_devidx, bool enable);
nvkm_mc_intr_mask   32 drivers/gpu/drm/nouveau/nvkm/subdev/fault/gp100.c 	nvkm_mc_intr_mask(device, NVKM_SUBDEV_FAULT, enable);
nvkm_mc_intr_mask   75 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c 	nvkm_mc_intr_mask(sb->subdev.device, falcon->owner->index, false);
nvkm_mc_intr_mask   95 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c 	nvkm_mc_intr_mask(sb->subdev.device, falcon->owner->index, true);
nvkm_mc_intr_mask   93 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c 	nvkm_mc_intr_mask(device, falcon->owner->index, true);