nvkm_gr 164 drivers/gpu/drm/nouveau/include/nvkm/core/device.h struct nvkm_gr *gr; nvkm_gr 237 drivers/gpu/drm/nouveau/include/nvkm/core/device.h int (*gr )(struct nvkm_device *, int idx, struct nvkm_gr **); nvkm_gr 11 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h u64 nvkm_gr_units(struct nvkm_gr *); nvkm_gr 12 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nvkm_gr_tlb_flush(struct nvkm_gr *); nvkm_gr 17 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv04_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 18 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv10_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 19 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv15_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 20 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv17_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 21 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv20_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 22 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv25_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 23 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv2a_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 24 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv30_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 25 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv34_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 26 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv35_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 27 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv40_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 28 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv44_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 29 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int nv50_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 30 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int g84_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 31 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gt200_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 32 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int mcp79_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 33 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gt215_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 34 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int mcp89_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 35 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gf100_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 36 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gf104_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 37 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gf108_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 38 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gf110_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 39 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gf117_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 40 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gf119_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 41 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gk104_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 42 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gk110_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 43 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gk110b_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 44 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gk208_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 45 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gk20a_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 46 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gm107_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 47 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gm200_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 48 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gm20b_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 49 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gp100_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 50 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gp102_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 51 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gp104_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 52 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gp107_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 53 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gp10b_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 54 drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h int gv100_gr_new(struct nvkm_device *, int, struct nvkm_gr **); nvkm_gr 182 drivers/gpu/drm/nouveau/nouveau_abi16.c struct nvkm_gr *gr = nvxx_gr(device); nvkm_gr 31 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = device->gr; nvkm_gr 40 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = device->gr; nvkm_gr 49 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = device->gr; nvkm_gr 58 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = nvkm_gr(engine); nvkm_gr 67 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = nvkm_gr(engine); nvkm_gr 73 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c nvkm_gr_units(struct nvkm_gr *gr) nvkm_gr 81 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c nvkm_gr_tlb_flush(struct nvkm_gr *gr) nvkm_gr 91 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = nvkm_gr(oclass->engine); nvkm_gr 116 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = nvkm_gr(oclass->engine); nvkm_gr 125 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = nvkm_gr(engine); nvkm_gr 132 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = nvkm_gr(engine); nvkm_gr 141 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = nvkm_gr(engine); nvkm_gr 148 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = nvkm_gr(engine); nvkm_gr 157 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c struct nvkm_gr *gr = nvkm_gr(engine); nvkm_gr 164 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c nvkm_gr = { nvkm_gr 178 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c int index, bool enable, struct nvkm_gr *gr) nvkm_gr 181 drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c return nvkm_engine_ctor(&nvkm_gr, device, index, enable, &gr->engine); nvkm_gr 115 drivers/gpu/drm/nouveau/nvkm/engine/gr/g84.c g84_gr_tlb_flush(struct nvkm_gr *base) nvkm_gr 195 drivers/gpu/drm/nouveau/nvkm/engine/gr/g84.c g84_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 163 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine)); nvkm_gr 209 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine)); nvkm_gr 299 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_object_get(struct nvkm_gr *base, int index, struct nvkm_sclass *sclass) nvkm_gr 378 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_gr 719 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_ctxsw_inst(struct nvkm_gr *gr) nvkm_gr 745 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_fecs_start_ctxsw(struct nvkm_gr *base) nvkm_gr 760 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_fecs_stop_ctxsw(struct nvkm_gr *base) nvkm_gr 924 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_chsw_load(struct nvkm_gr *base) nvkm_gr 1100 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_units(struct nvkm_gr *base) nvkm_gr 1546 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_intr(struct nvkm_gr *base) nvkm_gr 1938 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_oneinit(struct nvkm_gr *base) nvkm_gr 1987 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_init_(struct nvkm_gr *base) nvkm_gr 2033 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_fini_(struct nvkm_gr *base, bool suspend) nvkm_gr 2056 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_dtor(struct nvkm_gr *base) nvkm_gr 2176 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c int index, struct nvkm_gr **pgr) nvkm_gr 2483 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 83 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h struct nvkm_gr base; nvkm_gr 146 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h int, struct nvkm_gr **); nvkm_gr 147 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h void *gf100_gr_dtor(struct nvkm_gr *); nvkm_gr 275 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h u64 gf100_gr_units(struct nvkm_gr *); nvkm_gr 322 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h struct nvkm_gr **); nvkm_gr 148 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c gf104_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 147 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.c gf108_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 123 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.c gf110_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 188 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c gf117_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 214 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf119.c gf119_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 493 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c gk104_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 389 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c gk110_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 140 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.c gk110b_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 198 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.c gk208_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 307 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c gk20a_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 433 drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c gm107_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 129 drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c int index, struct nvkm_gr **pgr) nvkm_gr 201 drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c gm200_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 89 drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c gm20b_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 139 drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c gp100_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 135 drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c gp102_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gp104.c gp104_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 65 drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.c gp107_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c gp10b_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 46 drivers/gpu/drm/nouveau/nvkm/engine/gr/gt200.c gt200_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 47 drivers/gpu/drm/nouveau/nvkm/engine/gr/gt215.c gt215_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 124 drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.c gv100_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 45 drivers/gpu/drm/nouveau/nvkm/engine/gr/mcp79.c mcp79_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 47 drivers/gpu/drm/nouveau/nvkm/engine/gr/mcp89.c mcp89_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 352 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c struct nvkm_gr base; nvkm_gr 1184 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c nv04_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_gr 1211 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c nv04_gr_idle(struct nvkm_gr *gr) nvkm_gr 1272 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c nv04_gr_intr(struct nvkm_gr *base) nvkm_gr 1328 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c nv04_gr_init(struct nvkm_gr *base) nvkm_gr 1416 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c nv04_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 392 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c struct nvkm_gr base; nvkm_gr 434 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c struct nvkm_gr *gr = &chan->gr->base; nvkm_gr 507 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c struct nvkm_gr *gr = &chan->gr->base; nvkm_gr 1002 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c nv10_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_gr 1049 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c nv10_gr_tile(struct nvkm_gr *base, int i, struct nvkm_fb_tile *tile) nvkm_gr 1081 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c nv10_gr_intr(struct nvkm_gr *base) nvkm_gr 1136 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c nv10_gr_init(struct nvkm_gr *base) nvkm_gr 1176 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c int index, struct nvkm_gr **pgr) nvkm_gr 1218 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c nv10_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 7 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.h struct nvkm_gr **); nvkm_gr 8 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.h int nv10_gr_init(struct nvkm_gr *); nvkm_gr 9 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.h void nv10_gr_intr(struct nvkm_gr *); nvkm_gr 10 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.h void nv10_gr_tile(struct nvkm_gr *, int, struct nvkm_fb_tile *); nvkm_gr 12 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.h int nv10_gr_chan_new(struct nvkm_gr *, struct nvkm_fifo_chan *, nvkm_gr 56 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv15.c nv15_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 56 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv17.c nv17_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 75 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nv20_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_gr 149 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nv20_gr_tile(struct nvkm_gr *base, int i, struct nvkm_fb_tile *tile) nvkm_gr 180 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nv20_gr_intr(struct nvkm_gr *base) nvkm_gr 220 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nv20_gr_oneinit(struct nvkm_gr *base) nvkm_gr 229 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nv20_gr_init(struct nvkm_gr *base) nvkm_gr 324 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nv20_gr_dtor(struct nvkm_gr *base) nvkm_gr 333 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c int index, struct nvkm_gr **pgr) nvkm_gr 373 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nv20_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 8 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h struct nvkm_gr base; nvkm_gr 13 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h int, struct nvkm_gr **); nvkm_gr 14 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h void *nv20_gr_dtor(struct nvkm_gr *); nvkm_gr 15 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h int nv20_gr_oneinit(struct nvkm_gr *); nvkm_gr 16 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h int nv20_gr_init(struct nvkm_gr *); nvkm_gr 17 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h void nv20_gr_intr(struct nvkm_gr *); nvkm_gr 18 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h void nv20_gr_tile(struct nvkm_gr *, int, struct nvkm_fb_tile *); nvkm_gr 20 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h int nv30_gr_init(struct nvkm_gr *); nvkm_gr 21 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nv25_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_gr 132 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nv25_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 21 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nv2a_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_gr 123 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nv2a_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 22 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nv30_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_gr 104 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nv30_gr_init(struct nvkm_gr *base) nvkm_gr 197 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nv30_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 21 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nv34_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_gr 134 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nv34_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 21 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nv35_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_gr 134 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nv35_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 34 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nv40_gr_units(struct nvkm_gr *gr) nvkm_gr 148 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nv40_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_gr 173 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nv40_gr_tile(struct nvkm_gr *base, int i, struct nvkm_fb_tile *tile) nvkm_gr 232 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nv40_gr_intr(struct nvkm_gr *base) nvkm_gr 287 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nv40_gr_init(struct nvkm_gr *base) nvkm_gr 432 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c int index, struct nvkm_gr **pgr) nvkm_gr 473 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nv40_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 8 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h struct nvkm_gr base; nvkm_gr 14 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h struct nvkm_gr **); nvkm_gr 15 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h int nv40_gr_init(struct nvkm_gr *); nvkm_gr 16 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h void nv40_gr_intr(struct nvkm_gr *); nvkm_gr 17 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h u64 nv40_gr_units(struct nvkm_gr *); nvkm_gr 30 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h int nv40_gr_chan_new(struct nvkm_gr *, struct nvkm_fifo_chan *, nvkm_gr 31 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv44.c nv44_gr_tile(struct nvkm_gr *base, int i, struct nvkm_fb_tile *tile) nvkm_gr 105 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv44.c nv44_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 33 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nv50_gr_units(struct nvkm_gr *gr) nvkm_gr 89 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nv50_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_gr 620 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nv50_gr_intr(struct nvkm_gr *base) nvkm_gr 679 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nv50_gr_init(struct nvkm_gr *base) nvkm_gr 764 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c int index, struct nvkm_gr **pgr) nvkm_gr 793 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nv50_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) nvkm_gr 8 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.h struct nvkm_gr base; nvkm_gr 15 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.h struct nvkm_gr **); nvkm_gr 16 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.h int nv50_gr_init(struct nvkm_gr *); nvkm_gr 17 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.h void nv50_gr_intr(struct nvkm_gr *); nvkm_gr 18 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.h u64 nv50_gr_units(struct nvkm_gr *); nvkm_gr 20 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.h int g84_gr_tlb_flush(struct nvkm_gr *); nvkm_gr 30 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.h int nv50_gr_chan_new(struct nvkm_gr *, struct nvkm_fifo_chan *, nvkm_gr 4 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h #define nvkm_gr(p) container_of((p), struct nvkm_gr, engine) nvkm_gr 11 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h int index, bool enable, struct nvkm_gr *); nvkm_gr 13 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h bool nv04_gr_idle(struct nvkm_gr *); nvkm_gr 16 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h void *(*dtor)(struct nvkm_gr *); nvkm_gr 17 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h int (*oneinit)(struct nvkm_gr *); nvkm_gr 18 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h int (*init)(struct nvkm_gr *); nvkm_gr 19 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h int (*fini)(struct nvkm_gr *, bool); nvkm_gr 20 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h void (*intr)(struct nvkm_gr *); nvkm_gr 21 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h void (*tile)(struct nvkm_gr *, int region, struct nvkm_fb_tile *); nvkm_gr 22 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h int (*tlb_flush)(struct nvkm_gr *); nvkm_gr 23 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h int (*chan_new)(struct nvkm_gr *, struct nvkm_fifo_chan *, nvkm_gr 25 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h int (*object_get)(struct nvkm_gr *, int, struct nvkm_sclass *); nvkm_gr 28 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h u64 (*units)(struct nvkm_gr *); nvkm_gr 29 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h bool (*chsw_load)(struct nvkm_gr *); nvkm_gr 31 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h int (*pause)(struct nvkm_gr *); nvkm_gr 32 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h int (*resume)(struct nvkm_gr *); nvkm_gr 33 drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h u32 (*inst)(struct nvkm_gr *);