nvkm_gpio_set 274 drivers/gpu/drm/nouveau/dispnv04/dac.c nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, dcb->type == DCB_OUTPUT_TV); nvkm_gpio_set 275 drivers/gpu/drm/nouveau/dispnv04/dac.c nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, dcb->type == DCB_OUTPUT_TV); nvkm_gpio_set 327 drivers/gpu/drm/nouveau/dispnv04/dac.c nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, saved_gpio1); nvkm_gpio_set 328 drivers/gpu/drm/nouveau/dispnv04/dac.c nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, saved_gpio0); nvkm_gpio_set 77 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, true); nvkm_gpio_set 78 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, true); nvkm_gpio_set 123 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, gpio1); nvkm_gpio_set 124 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, gpio0); nvkm_gpio_set 390 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, mode == DRM_MODE_DPMS_ON); nvkm_gpio_set 391 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, mode == DRM_MODE_DPMS_ON); nvkm_gpio_set 32 drivers/gpu/drm/nouveau/include/nvkm/subdev/gpio.h int nvkm_gpio_set(struct nvkm_gpio *, int idx, u8 tag, u8 line, int state); nvkm_gpio_set 585 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 1); nvkm_gpio_set 600 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 0); nvkm_gpio_set 47 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gf119.c nvkm_gpio_set(gpio, 0, func, line, defs); nvkm_gpio_set 51 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c nvkm_gpio_set(gpio, 0, func, line, defs); nvkm_gpio_set 54 drivers/gpu/drm/nouveau/nvkm/subdev/therm/fantog.c nvkm_gpio_set(gpio, 0, DCB_GPIO_FAN, 0xff, duty); nvkm_gpio_set 62 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gpio.c int ret = nvkm_gpio_set(gpio, 0, tags[i], 0xff, vid & 1);