nvkm_clk          117 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	struct nvkm_clk *clk = nvxx_clk(&drm->client.device);
nvkm_clk          260 drivers/gpu/drm/nouveau/dispnv04/hw.c 	struct nvkm_clk *clk = nvxx_clk(device);
nvkm_clk          470 drivers/gpu/drm/nouveau/dispnv04/hw.c 	struct nvkm_clk *clk = nvxx_clk(&drm->client.device);
nvkm_clk          135 drivers/gpu/drm/nouveau/include/nvkm/core/device.h 	struct nvkm_clk *clk;
nvkm_clk          208 drivers/gpu/drm/nouveau/include/nvkm/core/device.h 	int (*clk     )(struct nvkm_device *, int idx, struct nvkm_clk **);
nvkm_clk          117 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h 	int (*pll_calc)(struct nvkm_clk *, struct nvbios_pll *, int clk,
nvkm_clk          119 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h 	int (*pll_prog)(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *pv);
nvkm_clk          122 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int nvkm_clk_read(struct nvkm_clk *, enum nv_clk_src);
nvkm_clk          123 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int nvkm_clk_ustate(struct nvkm_clk *, int req, int pwr);
nvkm_clk          124 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int nvkm_clk_astate(struct nvkm_clk *, int req, int rel, bool wait);
nvkm_clk          125 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int nvkm_clk_dstate(struct nvkm_clk *, int req, int rel);
nvkm_clk          126 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int nvkm_clk_tstate(struct nvkm_clk *, u8 temperature);
nvkm_clk          128 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int nv04_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
nvkm_clk          129 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int nv40_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
nvkm_clk          130 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int nv50_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
nvkm_clk          131 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int g84_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
nvkm_clk          132 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int mcp77_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
nvkm_clk          133 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int gt215_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
nvkm_clk          134 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int gf100_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
nvkm_clk          135 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int gk104_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
nvkm_clk          136 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int gk20a_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
nvkm_clk          137 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h int gm20b_clk_new(struct nvkm_device *, int, struct nvkm_clk **);
nvkm_clk           40 drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c 	struct nvkm_clk *clk = ctrl->device->clk;
nvkm_clk           73 drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c 	struct nvkm_clk *clk = ctrl->device->clk;
nvkm_clk          146 drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c 	struct nvkm_clk *clk = ctrl->device->clk;
nvkm_clk           41 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust,
nvkm_clk           79 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate,
nvkm_clk          112 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate,
nvkm_clk          145 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
nvkm_clk          160 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
nvkm_clk          223 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate)
nvkm_clk          265 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
nvkm_clk          300 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	struct nvkm_clk *clk = container_of(work, typeof(*clk), work);
nvkm_clk          335 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_pstate_calc(struct nvkm_clk *clk, bool wait)
nvkm_clk          345 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate)
nvkm_clk          401 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_pstate_new(struct nvkm_clk *clk, int idx)
nvkm_clk          472 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_clk_ustate_update(struct nvkm_clk *clk, int req)
nvkm_clk          496 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_clk_nstate(struct nvkm_clk *clk, const char *mode, int arglen)
nvkm_clk          520 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_clk_ustate(struct nvkm_clk *clk, int req, int pwr)
nvkm_clk          532 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_clk_astate(struct nvkm_clk *clk, int req, int rel, bool wait)
nvkm_clk          542 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_clk_tstate(struct nvkm_clk *clk, u8 temp)
nvkm_clk          551 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_clk_dstate(struct nvkm_clk *clk, int req, int rel)
nvkm_clk          563 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	struct nvkm_clk *clk =
nvkm_clk          574 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_clk_read(struct nvkm_clk *clk, enum nv_clk_src src)
nvkm_clk          582 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	struct nvkm_clk *clk = nvkm_clk(subdev);
nvkm_clk          593 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	struct nvkm_clk *clk = nvkm_clk(subdev);
nvkm_clk          627 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	struct nvkm_clk *clk = nvkm_clk(subdev);
nvkm_clk          644 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_clk = {
nvkm_clk          652 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	      int index, bool allow_reclock, struct nvkm_clk *clk)
nvkm_clk          660 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	nvkm_subdev_ctor(&nvkm_clk, device, index, subdev);
nvkm_clk          719 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	      int index, bool allow_reclock, struct nvkm_clk **pclk)
nvkm_clk           44 drivers/gpu/drm/nouveau/nvkm/subdev/clk/g84.c g84_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
nvkm_clk           42 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 	struct nvkm_clk base;
nvkm_clk          158 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c gf100_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
nvkm_clk          325 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c gf100_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
nvkm_clk          416 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c gf100_clk_prog(struct nvkm_clk *base)
nvkm_clk          442 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c gf100_clk_tidy(struct nvkm_clk *base)
nvkm_clk          471 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c gf100_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
nvkm_clk           42 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 	struct nvkm_clk base;
nvkm_clk          189 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c gk104_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
nvkm_clk          339 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c gk104_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
nvkm_clk          448 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c gk104_clk_prog(struct nvkm_clk *base)
nvkm_clk          479 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c gk104_clk_tidy(struct nvkm_clk *base)
nvkm_clk          507 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c gk104_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
nvkm_clk          460 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c gk20a_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
nvkm_clk          480 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c gk20a_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
nvkm_clk          489 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c gk20a_clk_prog(struct nvkm_clk *base)
nvkm_clk          502 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c gk20a_clk_tidy(struct nvkm_clk *base)
nvkm_clk          543 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c gk20a_clk_fini(struct nvkm_clk *base)
nvkm_clk          565 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c gk20a_clk_init(struct nvkm_clk *base)
nvkm_clk          642 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c gk20a_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
nvkm_clk          117 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h 	struct nvkm_clk base;
nvkm_clk          151 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h void gk20a_clk_fini(struct nvkm_clk *);
nvkm_clk          152 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h int gk20a_clk_read(struct nvkm_clk *, enum nv_clk_src);
nvkm_clk          153 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h int gk20a_clk_calc(struct nvkm_clk *, struct nvkm_cstate *);
nvkm_clk          154 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h int gk20a_clk_prog(struct nvkm_clk *);
nvkm_clk          155 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h void gk20a_clk_tidy(struct nvkm_clk *);
nvkm_clk          464 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c gm20b_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
nvkm_clk          572 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c gm20b_clk_prog(struct nvkm_clk *base)
nvkm_clk          720 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c gm20b_clk_fini(struct nvkm_clk *base)
nvkm_clk          811 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c gm20b_clk_init(struct nvkm_clk *base)
nvkm_clk          912 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 		      struct nvkm_clk **pclk)
nvkm_clk         1017 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c gm20b_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
nvkm_clk           35 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 	struct nvkm_clk base;
nvkm_clk          143 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c gt215_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
nvkm_clk          187 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c gt215_clk_info(struct nvkm_clk *base, int idx, u32 khz,
nvkm_clk          235 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c gt215_pll_info(struct nvkm_clk *base, int idx, u32 pll, u32 khz,
nvkm_clk          307 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c gt215_clk_pre(struct nvkm_clk *clk, unsigned long *flags)
nvkm_clk          342 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c gt215_clk_post(struct nvkm_clk *clk, unsigned long *flags)
nvkm_clk          459 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c gt215_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
nvkm_clk          486 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c gt215_clk_prog(struct nvkm_clk *base)
nvkm_clk          516 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c gt215_clk_tidy(struct nvkm_clk *base)
nvkm_clk          540 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c gt215_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
nvkm_clk           16 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.h int  gt215_pll_info(struct nvkm_clk *, int, u32, u32, struct gt215_clk_info *);
nvkm_clk           17 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.h int  gt215_clk_pre(struct nvkm_clk *, unsigned long *flags);
nvkm_clk           18 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.h void gt215_clk_post(struct nvkm_clk *, unsigned long *flags);
nvkm_clk           33 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	struct nvkm_clk base;
nvkm_clk           81 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c mcp77_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
nvkm_clk          203 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c mcp77_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
nvkm_clk          299 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c mcp77_clk_prog(struct nvkm_clk *base)
nvkm_clk          394 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c mcp77_clk_tidy(struct nvkm_clk *base)
nvkm_clk          415 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c mcp77_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
nvkm_clk           32 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c nv04_clk_pll_calc(struct nvkm_clk *clock, struct nvbios_pll *info,
nvkm_clk           49 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c nv04_clk_pll_prog(struct nvkm_clk *clk, u32 reg1, struct nvkm_pll_vals *pv)
nvkm_clk           75 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c nv04_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
nvkm_clk           32 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 	struct nvkm_clk base;
nvkm_clk           97 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c nv40_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
nvkm_clk          146 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c nv40_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
nvkm_clk          186 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c nv40_clk_prog(struct nvkm_clk *base)
nvkm_clk          200 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c nv40_clk_tidy(struct nvkm_clk *obj)
nvkm_clk          221 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c nv40_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
nvkm_clk          192 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c nv50_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
nvkm_clk          368 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c nv50_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
nvkm_clk          495 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c nv50_clk_prog(struct nvkm_clk *base)
nvkm_clk          502 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c nv50_clk_tidy(struct nvkm_clk *base)
nvkm_clk          510 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 	      int index, bool allow_reclock, struct nvkm_clk **pclk)
nvkm_clk          558 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c nv50_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
nvkm_clk           19 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h 	struct nvkm_clk base;
nvkm_clk           24 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h 		  bool, struct nvkm_clk **);
nvkm_clk           25 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h int nv50_clk_read(struct nvkm_clk *, enum nv_clk_src);
nvkm_clk           26 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h int nv50_clk_calc(struct nvkm_clk *, struct nvkm_cstate *);
nvkm_clk           27 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h int nv50_clk_prog(struct nvkm_clk *);
nvkm_clk           28 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h void nv50_clk_tidy(struct nvkm_clk *);
nvkm_clk            4 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h #define nvkm_clk(p) container_of((p), struct nvkm_clk, subdev)
nvkm_clk            8 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h 	int (*init)(struct nvkm_clk *);
nvkm_clk            9 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h 	void (*fini)(struct nvkm_clk *);
nvkm_clk           10 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h 	int (*read)(struct nvkm_clk *, enum nv_clk_src);
nvkm_clk           11 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h 	int (*calc)(struct nvkm_clk *, struct nvkm_cstate *);
nvkm_clk           12 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h 	int (*prog)(struct nvkm_clk *);
nvkm_clk           13 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h 	void (*tidy)(struct nvkm_clk *);
nvkm_clk           20 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h 		  bool allow_reclock, struct nvkm_clk *);
nvkm_clk           22 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h 		  bool allow_reclock, struct nvkm_clk **);
nvkm_clk           24 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h int nv04_clk_pll_calc(struct nvkm_clk *, struct nvbios_pll *, int clk,
nvkm_clk           26 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h int nv04_clk_pll_prog(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *);
nvkm_clk          133 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c 	struct nvkm_clk *clk = device->clk;
nvkm_clk         1115 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c 	struct nvkm_clk *clk = ram->base.fb->subdev.device->clk;
nvkm_clk          161 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c 	struct nvkm_clk *clk = device->clk;
nvkm_clk           53 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c 	struct nvkm_clk *clk = pmu->base.subdev.device->clk;
nvkm_clk           61 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c 	struct nvkm_clk *clk = pmu->base.subdev.device->clk;
nvkm_clk           71 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c 	struct nvkm_clk *clk = pmu->base.subdev.device->clk;
nvkm_clk          122 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c 	struct nvkm_clk *clk = device->clk;