nvif_wr32 265 drivers/gpu/drm/nouveau/dispnv04/dac.c nvif_wr32(device, NV_PBUS_POWERCTRL_2, saved_powerctrl_2 & 0xd7ffffff); nvif_wr32 268 drivers/gpu/drm/nouveau/dispnv04/dac.c nvif_wr32(device, NV_PBUS_POWERCTRL_4, saved_powerctrl_4 & 0xffffffcf); nvif_wr32 323 drivers/gpu/drm/nouveau/dispnv04/dac.c nvif_wr32(device, NV_PBUS_POWERCTRL_4, saved_powerctrl_4); nvif_wr32 324 drivers/gpu/drm/nouveau/dispnv04/dac.c nvif_wr32(device, NV_PBUS_POWERCTRL_2, saved_powerctrl_2); nvif_wr32 680 drivers/gpu/drm/nouveau/dispnv04/hw.c nvif_wr32(device, NV_PVIDEO_STOP, 1); nvif_wr32 681 drivers/gpu/drm/nouveau/dispnv04/hw.c nvif_wr32(device, NV_PVIDEO_INTR_EN, 0); nvif_wr32 682 drivers/gpu/drm/nouveau/dispnv04/hw.c nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(0), 0); nvif_wr32 683 drivers/gpu/drm/nouveau/dispnv04/hw.c nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(1), 0); nvif_wr32 684 drivers/gpu/drm/nouveau/dispnv04/hw.c nvif_wr32(device, NV_PVIDEO_LIMIT(0), drm->client.device.info.ram_size - 1); nvif_wr32 685 drivers/gpu/drm/nouveau/dispnv04/hw.c nvif_wr32(device, NV_PVIDEO_LIMIT(1), drm->client.device.info.ram_size - 1); nvif_wr32 686 drivers/gpu/drm/nouveau/dispnv04/hw.c nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(0), drm->client.device.info.ram_size - 1); nvif_wr32 687 drivers/gpu/drm/nouveau/dispnv04/hw.c nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(1), drm->client.device.info.ram_size - 1); nvif_wr32 688 drivers/gpu/drm/nouveau/dispnv04/hw.c nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0); nvif_wr32 76 drivers/gpu/drm/nouveau/dispnv04/hw.h nvif_wr32(device, reg, val); nvif_wr32 96 drivers/gpu/drm/nouveau/dispnv04/hw.h nvif_wr32(device, reg, val); nvif_wr32 152 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_BASE(flip), 0); nvif_wr32 153 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_fb->nvbo->bo.offset); nvif_wr32 154 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); nvif_wr32 155 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_POINT_IN(flip), src_y << 16 | src_x); nvif_wr32 156 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_DS_DX(flip), (src_w << 20) / crtc_w); nvif_wr32 157 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_DT_DY(flip), (src_h << 20) / crtc_h); nvif_wr32 158 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_POINT_OUT(flip), crtc_y << 16 | crtc_x); nvif_wr32 159 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_SIZE_OUT(flip), crtc_h << 16 | crtc_w); nvif_wr32 173 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_UVPLANE_BASE(flip), 0); nvif_wr32 174 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_UVPLANE_OFFSET_BUFF(flip), nvif_wr32 177 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_FORMAT(flip), format | fb->pitches[0]); nvif_wr32 178 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_STOP, 0); nvif_wr32 180 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_BUFFER, flip ? 0x10 : 0x1); nvif_wr32 197 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_STOP, 1); nvif_wr32 223 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_LUMINANCE(0), luma); nvif_wr32 224 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_LUMINANCE(1), luma); nvif_wr32 225 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_CHROMINANCE(0), chroma); nvif_wr32 226 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_CHROMINANCE(1), chroma); nvif_wr32 227 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_COLOR_KEY, plane->colorkey & 0xffffff); nvif_wr32 393 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_OE_STATE, 0); nvif_wr32 394 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_SU_STATE, 0); nvif_wr32 395 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_RM_STATE, 0); nvif_wr32 398 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_BUFF0_START_ADDRESS + 4 * i, nvif_wr32 400 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_BUFF0_PITCH_LENGTH + 4 * i, nvif_wr32 402 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_BUFF0_OFFSET + 4 * i, 0); nvif_wr32 404 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_WINDOW_START, crtc_y << 16 | crtc_x); nvif_wr32 405 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_WINDOW_SIZE, crtc_h << 16 | crtc_w); nvif_wr32 406 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_STEP_SIZE, nvif_wr32 410 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_RED_CSC_OFFSET, 0x69 - brightness); nvif_wr32 411 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_GREEN_CSC_OFFSET, 0x3e + brightness); nvif_wr32 412 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_BLUE_CSC_OFFSET, 0x89 - brightness); nvif_wr32 413 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_CSC_ADJUST, 0); nvif_wr32 415 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_CONTROL_Y, 0x001); /* (BLUR_ON, LINE_HALF) */ nvif_wr32 416 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_CONTROL_X, 0x111); /* (WEIGHT_HEAVY, SHARPENING_ON, SMOOTHING_ON) */ nvif_wr32 418 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_FIFO_BURST_LENGTH, 0x03); nvif_wr32 419 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_FIFO_THRES_SIZE, 0x38); nvif_wr32 421 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_KEY, nv_plane->colorkey); nvif_wr32 428 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_OVERLAY, overlay); nvif_wr32 430 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_SU_STATE, nvif_rd32(dev, NV_PVIDEO_SU_STATE) ^ (1 << 16)); nvif_wr32 447 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_OE_STATE, 0); nvif_wr32 448 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_SU_STATE, 0); nvif_wr32 449 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_RM_STATE, 0); nvif_wr32 134 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h nvif_wr32(&device->object, reg, val); nvif_wr32 34 drivers/gpu/drm/nouveau/dispnv50/curs507a.c nvif_wr32(&wndw->wimm.base.user, 0x0080, 0x00000000); nvif_wr32 40 drivers/gpu/drm/nouveau/dispnv50/curs507a.c nvif_wr32(&wndw->wimm.base.user, 0x0084, asyw->point.y << 16 | nvif_wr32 28 drivers/gpu/drm/nouveau/dispnv50/cursc37a.c nvif_wr32(&wndw->wimm.base.user, 0x0200, 0x00000001); nvif_wr32 34 drivers/gpu/drm/nouveau/dispnv50/cursc37a.c nvif_wr32(&wndw->wimm.base.user, 0x0208, asyw->point.y << 16 | nvif_wr32 209 drivers/gpu/drm/nouveau/dispnv50/disp.c nvif_wr32(&device->object, 0x070000, 0x00000001); nvif_wr32 229 drivers/gpu/drm/nouveau/dispnv50/disp.c nvif_wr32(&dmac->base.user, 0x0000, 0x00000000); nvif_wr32 252 drivers/gpu/drm/nouveau/dispnv50/disp.c nvif_wr32(&dmac->base.user, 0x0000, (push - dmac->ptr) << 2); nvif_wr32 67 drivers/gpu/drm/nouveau/include/nvif/object.h nvif_wr32(__object, _addr, (_data & ~(c)) | (d)); \ nvif_wr32 86 drivers/gpu/drm/nouveau/nouveau_backlight.c nvif_wr32(device, NV40_PMC_BACKLIGHT, nvif_wr32 140 drivers/gpu/drm/nouveau/nouveau_backlight.c nvif_wr32(device, NV50_PDISP_SOR_PWM_CTL(or), nvif_wr32 181 drivers/gpu/drm/nouveau/nouveau_backlight.c nvif_wr32(device, NV50_PDISP_SOR_PWM_CTL(or), nvif_wr32 251 drivers/gpu/drm/nouveau/nouveau_bios.c nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0); nvif_wr32 1944 drivers/gpu/drm/nouveau/nouveau_bios.c nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset])); nvif_wr32 1949 drivers/gpu/drm/nouveau/nouveau_bios.c nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4])); nvif_wr32 1952 drivers/gpu/drm/nouveau/nouveau_bios.c nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18); nvif_wr32 102 drivers/gpu/drm/nouveau/nouveau_dma.c nvif_wr32(&chan->user, 0x8c, chan->dma.ib_put); nvif_wr32 141 drivers/gpu/drm/nouveau/nouveau_dma.h nvif_wr32(&chan->user, chan->user_put, ((val) << 2) + chan->push.addr);\ nvif_wr32 72 drivers/gpu/drm/nouveau/nouveau_led.c nvif_wr32(device, 0x61c880, div); nvif_wr32 73 drivers/gpu/drm/nouveau/nouveau_led.c nvif_wr32(device, 0x61c884, 0xc0000000 | duty); nvif_wr32 564 drivers/gpu/drm/nouveau/nouveau_svm.c nvif_wr32(device, buffer->getaddr, buffer->get); nvif_wr32 21 drivers/gpu/drm/nouveau/nouveau_vga.c nvif_wr32(device, 0x088060, state); nvif_wr32 24 drivers/gpu/drm/nouveau/nouveau_vga.c nvif_wr32(device, 0x088054, state); nvif_wr32 26 drivers/gpu/drm/nouveau/nouveau_vga.c nvif_wr32(device, 0x001854, state); nvif_wr32 27 drivers/gpu/drm/nouveau/nvif/userc361.c nvif_wr32(&user->object, 0x90, token);