nvbios_pll_type   163 drivers/gpu/drm/nouveau/dispnv04/hw.c nouveau_hw_get_pllvals(struct drm_device *dev, enum nvbios_pll_type plltype,
nvbios_pll_type   214 drivers/gpu/drm/nouveau/dispnv04/hw.c nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
nvbios_pll_type   264 drivers/gpu/drm/nouveau/dispnv04/hw.c 	enum nvbios_pll_type pll = head ? PLL_VPLL1 : PLL_VPLL0;
nvbios_pll_type    43 drivers/gpu/drm/nouveau/dispnv04/hw.h int nouveau_hw_get_pllvals(struct drm_device *, enum nvbios_pll_type plltype,
nvbios_pll_type    46 drivers/gpu/drm/nouveau/dispnv04/hw.h int nouveau_hw_get_clock(struct drm_device *, enum nvbios_pll_type plltype);
nvbios_pll_type    45 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pll.h 	enum nvbios_pll_type type;