nv_clk_src_core   430 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	cstate->domain[nv_clk_src_core] = perfE.core;
nv_clk_src_core    35 drivers/gpu/drm/nouveau/nvkm/subdev/clk/g84.c 		{ nv_clk_src_core   , 0xff, 0, "core", 1000 },
nv_clk_src_core   153 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 	case nv_clk_src_core:
nv_clk_src_core   462 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 	struct gt215_clk_info *core = &clk->eng[nv_clk_src_core];
nv_clk_src_core   465 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 	if ((ret = calc_clk(clk, cstate, 0x10, 0x4200, nv_clk_src_core)) ||
nv_clk_src_core   489 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 	struct gt215_clk_info *core = &clk->eng[nv_clk_src_core];
nv_clk_src_core   501 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 	prog_core(clk,  nv_clk_src_core);
nv_clk_src_core   528 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 		{ nv_clk_src_core     , 0x00, 0, "core", 1000 },
nv_clk_src_core   106 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	case nv_clk_src_core:
nv_clk_src_core   118 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 			return nvkm_clk_read(&clk->base, nv_clk_src_core);
nv_clk_src_core   121 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 			return nvkm_clk_read(&clk->base, nv_clk_src_core);
nv_clk_src_core   149 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 			return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
nv_clk_src_core   207 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	const int core = cstate->domain[nv_clk_src_core];
nv_clk_src_core   233 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		clk->csrc = nv_clk_src_core;
nv_clk_src_core   246 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		if (clk->csrc == nv_clk_src_core)
nv_clk_src_core   252 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 			clk->ssrc = nv_clk_src_core;
nv_clk_src_core   285 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	else if (clk->ssrc == nv_clk_src_core)
nv_clk_src_core   323 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	case nv_clk_src_core:
nv_clk_src_core   340 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	case nv_clk_src_core:
nv_clk_src_core   375 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	if (clk->csrc != nv_clk_src_core) {
nv_clk_src_core   407 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		{ nv_clk_src_core   , 0xff, 0, "core", 1000 },
nv_clk_src_core   109 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 	case nv_clk_src_core:
nv_clk_src_core   149 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 	int gclk = cstate->domain[nv_clk_src_core];
nv_clk_src_core   213 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 		{ nv_clk_src_core   , 0xff, 0, "core", 1000 },
nv_clk_src_core   219 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 	case nv_clk_src_core:
nv_clk_src_core   267 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 					return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
nv_clk_src_core   276 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
nv_clk_src_core   282 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
nv_clk_src_core   375 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 	const int core = cstate->domain[nv_clk_src_core];
nv_clk_src_core   550 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		{ nv_clk_src_core   , 0xff, 0, "core", 1000 },