nv50_gr            95 drivers/gpu/drm/nouveau/nvkm/engine/gr/g84.c nvkm_gr_vstatus_print(struct nv50_gr *gr, int r,
nv50_gr           117 drivers/gpu/drm/nouveau/nvkm/engine/gr/g84.c 	struct nv50_gr *gr = nv50_gr(base);
nv50_gr            72 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 	struct nv50_gr *gr = nv50_gr_chan(object)->gr;
nv50_gr            92 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 	struct nv50_gr *gr = nv50_gr(base);
nv50_gr           240 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nv50_gr_prop_trap(struct nv50_gr *gr, u32 ustatus_addr, u32 ustatus, u32 tp)
nv50_gr           282 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nv50_gr_mp_trap(struct nv50_gr *gr, int tpid, int display)
nv50_gr           325 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nv50_gr_tp_trap(struct nv50_gr *gr, int type, u32 ustatus_old,
nv50_gr           395 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nv50_gr_trap_handler(struct nv50_gr *gr, u32 display,
nv50_gr           622 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 	struct nv50_gr *gr = nv50_gr(base);
nv50_gr           681 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 	struct nv50_gr *gr = nv50_gr(base);
nv50_gr           766 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 	struct nv50_gr *gr;
nv50_gr           777 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nv50_gr = {
nv50_gr           795 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 	return nv50_gr_new_(&nv50_gr, device, index, pgr);
nv50_gr             4 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.h #define nv50_gr(p) container_of((p), struct nv50_gr, base)
nv50_gr            27 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.h 	struct nv50_gr *gr;