nv50_fifo          94 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c 	struct nv50_fifo *fifo = chan->fifo;
nv50_fifo         208 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c 	struct nv50_fifo *fifo = chan->fifo;
nv50_fifo         232 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c g84_fifo_chan_ctor(struct nv50_fifo *fifo, u64 vmm, u64 push,
nv50_fifo          50 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c 	struct nv50_fifo *fifo = chan->fifo;
nv50_fifo         182 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c 	struct nv50_fifo *fifo = chan->fifo;
nv50_fifo         196 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c 	struct nv50_fifo *fifo = chan->fifo;
nv50_fifo         231 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c nv50_fifo_chan_ctor(struct nv50_fifo *fifo, u64 vmm, u64 push,
nv50_fifo           9 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.h 	struct nv50_fifo *fifo;
nv50_fifo          21 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.h int nv50_fifo_chan_ctor(struct nv50_fifo *, u64 vmm, u64 push,
nv50_fifo          28 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.h int g84_fifo_chan_ctor(struct nv50_fifo *, u64 vmm, u64 push,
nv50_fifo          41 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c 	struct nv50_fifo *fifo = nv50_fifo(base);
nv50_fifo          41 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c 	struct nv50_fifo *fifo = nv50_fifo(base);
nv50_fifo          41 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c 	struct nv50_fifo *fifo = nv50_fifo(base);
nv50_fifo          41 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c 	struct nv50_fifo *fifo = nv50_fifo(base);
nv50_fifo          30 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c nv50_fifo_runlist_update_locked(struct nv50_fifo *fifo)
nv50_fifo          52 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c nv50_fifo_runlist_update(struct nv50_fifo *fifo)
nv50_fifo          62 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c 	struct nv50_fifo *fifo = nv50_fifo(base);
nv50_fifo          78 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c 	struct nv50_fifo *fifo = nv50_fifo(base);
nv50_fifo         102 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c 	struct nv50_fifo *fifo = nv50_fifo(base);
nv50_fifo         112 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c 	struct nv50_fifo *fifo;
nv50_fifo         129 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c nv50_fifo = {
nv50_fifo         146 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c 	return nv50_fifo_new_(&nv50_fifo, device, index, pfifo);
nv50_fifo           4 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h #define nv50_fifo(p) container_of((p), struct nv50_fifo, base)
nv50_fifo          19 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h void nv50_fifo_runlist_update(struct nv50_fifo *);