nv50_disp_chan     52 drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c gf119_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
nv50_disp_chan     30 drivers/gpu/drm/nouveau/nvkm/engine/disp/changv100.c gv100_disp_chan_user(struct nv50_disp_chan *chan, u64 *psize)
nv50_disp_chan     67 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c nv50_disp_chan_mthd(struct nv50_disp_chan *chan, int debug)
nv50_disp_chan    137 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp_chan *chan = nv50_disp_chan(object);
nv50_disp_chan    161 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c nv50_disp_chan_user(struct nv50_disp_chan *chan, u64 *psize)
nv50_disp_chan    168 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c nv50_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
nv50_disp_chan    179 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp_chan *chan = nv50_disp_chan(object);
nv50_disp_chan    189 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp_chan *chan = nv50_disp_chan(object);
nv50_disp_chan    200 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp_chan *chan = nv50_disp_chan(object);
nv50_disp_chan    216 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp_chan *chan = nv50_disp_chan(object);
nv50_disp_chan    247 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp_chan *chan = nv50_disp_chan(oclass->parent);
nv50_disp_chan    276 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp_chan *chan = nv50_disp_chan(object);
nv50_disp_chan    300 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp_chan *chan = nv50_disp_chan(object);
nv50_disp_chan    309 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp_chan *chan = nv50_disp_chan(object);
nv50_disp_chan    317 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp_chan *chan = nv50_disp_chan(object);
nv50_disp_chan    326 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c nv50_disp_chan = {
nv50_disp_chan    344 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp_chan *chan;
nv50_disp_chan    350 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	nvkm_object_ctor(&nv50_disp_chan, oclass, &chan->object);
nv50_disp_chan      4 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h #define nv50_disp_chan(p) container_of((p), struct nv50_disp_chan, object)
nv50_disp_chan     27 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 	int (*init)(struct nv50_disp_chan *);
nv50_disp_chan     28 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 	void (*fini)(struct nv50_disp_chan *);
nv50_disp_chan     29 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 	void (*intr)(struct nv50_disp_chan *, bool en);
nv50_disp_chan     30 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 	u64 (*user)(struct nv50_disp_chan *, u64 *size);
nv50_disp_chan     31 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 	int (*bind)(struct nv50_disp_chan *, struct nvkm_object *, u32 handle);
nv50_disp_chan     43 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h void nv50_disp_chan_intr(struct nv50_disp_chan *, bool);
nv50_disp_chan     44 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h u64 nv50_disp_chan_user(struct nv50_disp_chan *, u64 *);
nv50_disp_chan     47 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h int nv50_disp_dmac_bind(struct nv50_disp_chan *, struct nvkm_object *, u32);
nv50_disp_chan     50 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h void gf119_disp_chan_intr(struct nv50_disp_chan *, bool);
nv50_disp_chan     53 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h void gf119_disp_dmac_fini(struct nv50_disp_chan *);
nv50_disp_chan     54 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h int gf119_disp_dmac_bind(struct nv50_disp_chan *, struct nvkm_object *, u32);
nv50_disp_chan     56 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h void gf119_disp_core_fini(struct nv50_disp_chan *);
nv50_disp_chan     60 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h u64 gv100_disp_chan_user(struct nv50_disp_chan *, u64 *);
nv50_disp_chan     61 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h int gv100_disp_dmac_init(struct nv50_disp_chan *);
nv50_disp_chan     62 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h void gv100_disp_dmac_fini(struct nv50_disp_chan *);
nv50_disp_chan     63 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h int gv100_disp_dmac_bind(struct nv50_disp_chan *, struct nvkm_object *, u32);
nv50_disp_chan    170 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h void nv50_disp_chan_mthd(struct nv50_disp_chan *, int debug);
nv50_disp_chan    170 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregf119.c gf119_disp_core_fini(struct nv50_disp_chan *chan)
nv50_disp_chan    188 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregf119.c gf119_disp_core_init(struct nv50_disp_chan *chan)
nv50_disp_chan     29 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp102.c gp102_disp_core_init(struct nv50_disp_chan *chan)
nv50_disp_chan    136 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregv100.c gv100_disp_core_idle(struct nv50_disp_chan *chan)
nv50_disp_chan    148 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregv100.c gv100_disp_core_user(struct nv50_disp_chan *chan, u64 *psize)
nv50_disp_chan    155 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregv100.c gv100_disp_core_intr(struct nv50_disp_chan *chan, bool en)
nv50_disp_chan    164 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregv100.c gv100_disp_core_fini(struct nv50_disp_chan *chan)
nv50_disp_chan    173 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregv100.c gv100_disp_core_init(struct nv50_disp_chan *chan)
nv50_disp_chan    167 drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c nv50_disp_core_fini(struct nv50_disp_chan *chan)
nv50_disp_chan    185 drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c nv50_disp_core_init(struct nv50_disp_chan *chan)
nv50_disp_chan     27 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c gv100_disp_curs_idle(struct nv50_disp_chan *chan)
nv50_disp_chan     40 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c gv100_disp_curs_intr(struct nv50_disp_chan *chan, bool en)
nv50_disp_chan     49 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c gv100_disp_curs_fini(struct nv50_disp_chan *chan)
nv50_disp_chan     59 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c gv100_disp_curs_init(struct nv50_disp_chan *chan)
nv50_disp_chan     30 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgf119.c gf119_disp_dmac_bind(struct nv50_disp_chan *chan,
nv50_disp_chan     39 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgf119.c gf119_disp_dmac_fini(struct nv50_disp_chan *chan)
nv50_disp_chan     59 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgf119.c gf119_disp_dmac_init(struct nv50_disp_chan *chan)
nv50_disp_chan     29 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp102.c gp102_disp_dmac_init(struct nv50_disp_chan *chan)
nv50_disp_chan     28 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c gv100_disp_dmac_idle(struct nv50_disp_chan *chan)
nv50_disp_chan     41 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c gv100_disp_dmac_bind(struct nv50_disp_chan *chan,
nv50_disp_chan     50 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c gv100_disp_dmac_fini(struct nv50_disp_chan *chan)
nv50_disp_chan     60 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c gv100_disp_dmac_init(struct nv50_disp_chan *chan)
nv50_disp_chan     41 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 	struct nv50_disp_chan *chan;
nv50_disp_chan     46 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 	chan = nv50_disp_chan(*pobject);
nv50_disp_chan     70 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c nv50_disp_dmac_bind(struct nv50_disp_chan *chan,
nv50_disp_chan     80 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c nv50_disp_dmac_fini(struct nv50_disp_chan *chan)
nv50_disp_chan    100 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c nv50_disp_dmac_init(struct nv50_disp_chan *chan)
nv50_disp_chan     40 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h 	struct nv50_disp_chan *chan[81];
nv50_disp_chan     30 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocgf119.c gf119_disp_pioc_fini(struct nv50_disp_chan *chan)
nv50_disp_chan     49 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocgf119.c gf119_disp_pioc_init(struct nv50_disp_chan *chan)
nv50_disp_chan     30 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocnv50.c nv50_disp_pioc_fini(struct nv50_disp_chan *chan)
nv50_disp_chan     49 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocnv50.c nv50_disp_pioc_init(struct nv50_disp_chan *chan)
nv50_disp_chan     30 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c gv100_disp_wimm_intr(struct nv50_disp_chan *chan, bool en)
nv50_disp_chan    131 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c gv100_disp_wndw_intr(struct nv50_disp_chan *chan, bool en)