nv50_disp          43 drivers/gpu/drm/nouveau/dispnv50/base.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp         265 drivers/gpu/drm/nouveau/dispnv50/base507c.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp          61 drivers/gpu/drm/nouveau/dispnv50/core.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp          92 drivers/gpu/drm/nouveau/dispnv50/core507d.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp          43 drivers/gpu/drm/nouveau/dispnv50/curs.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp          54 drivers/gpu/drm/nouveau/dispnv50/curs507a.c 	u32 handle = nv50_disp(wndw->plane.dev)->core->chan.vram.handle;
nv50_disp         116 drivers/gpu/drm/nouveau/dispnv50/curs507a.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp         262 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(nv_encoder->base.base.dev);
nv50_disp         281 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp         379 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_core *core = nv50_disp(encoder->dev)->core;
nv50_disp         392 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_core *core = nv50_disp(encoder->dev)->core;
nv50_disp         406 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(encoder->dev);
nv50_disp         486 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(encoder->dev);
nv50_disp         507 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(encoder->dev);
nv50_disp         539 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(encoder->dev);
nv50_disp         560 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(encoder->dev);
nv50_disp        1410 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(nv_encoder->base.base.dev);
nv50_disp        1470 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(encoder->dev);
nv50_disp        1610 drivers/gpu/drm/nouveau/dispnv50/disp.c 		struct nv50_disp *disp = nv50_disp(encoder->dev);
nv50_disp        1664 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_core *core = nv50_disp(encoder->dev)->core;
nv50_disp        1678 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_core *core = nv50_disp(encoder->dev)->core;
nv50_disp        1778 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp        1833 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(dev);
nv50_disp        2276 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_core *core = nv50_disp(dev)->core;
nv50_disp        2303 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(dev);
nv50_disp        2323 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp;
nv50_disp          27 drivers/gpu/drm/nouveau/dispnv50/disp.h static inline struct nv50_disp *
nv50_disp         214 drivers/gpu/drm/nouveau/dispnv50/head.c 	struct nv50_disp *disp = nv50_disp(head->base.base.dev);
nv50_disp         480 drivers/gpu/drm/nouveau/dispnv50/head.c 	struct nv50_disp *disp = nv50_disp(dev);
nv50_disp          28 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          41 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          55 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          82 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         109 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         121 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         161 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         173 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         203 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_disp *disp = nv50_disp(head->base.base.dev);
nv50_disp         235 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         247 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         288 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         312 drivers/gpu/drm/nouveau/dispnv50/head507d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          28 drivers/gpu/drm/nouveau/dispnv50/head827d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          42 drivers/gpu/drm/nouveau/dispnv50/head827d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          58 drivers/gpu/drm/nouveau/dispnv50/head827d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          80 drivers/gpu/drm/nouveau/dispnv50/head827d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          94 drivers/gpu/drm/nouveau/dispnv50/head827d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          28 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          44 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          57 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          71 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          99 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         126 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         140 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         156 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         168 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         190 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         204 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         243 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         268 drivers/gpu/drm/nouveau/dispnv50/head907d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          28 drivers/gpu/drm/nouveau/dispnv50/head917d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          42 drivers/gpu/drm/nouveau/dispnv50/head917d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          29 drivers/gpu/drm/nouveau/dispnv50/headc37d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          57 drivers/gpu/drm/nouveau/dispnv50/headc37d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          71 drivers/gpu/drm/nouveau/dispnv50/headc37d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          85 drivers/gpu/drm/nouveau/dispnv50/headc37d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          99 drivers/gpu/drm/nouveau/dispnv50/headc37d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         126 drivers/gpu/drm/nouveau/dispnv50/headc37d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         138 drivers/gpu/drm/nouveau/dispnv50/headc37d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         164 drivers/gpu/drm/nouveau/dispnv50/headc37d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         188 drivers/gpu/drm/nouveau/dispnv50/headc37d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          29 drivers/gpu/drm/nouveau/dispnv50/headc57d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          57 drivers/gpu/drm/nouveau/dispnv50/headc57d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          75 drivers/gpu/drm/nouveau/dispnv50/headc57d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          87 drivers/gpu/drm/nouveau/dispnv50/headc57d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp         170 drivers/gpu/drm/nouveau/dispnv50/headc57d.c 	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
nv50_disp          67 drivers/gpu/drm/nouveau/dispnv50/lut.c nv50_lut_init(struct nv50_disp *disp, struct nvif_mmu *mmu,
nv50_disp           6 drivers/gpu/drm/nouveau/dispnv50/lut.h struct nv50_disp;
nv50_disp          12 drivers/gpu/drm/nouveau/dispnv50/lut.h int nv50_lut_init(struct nv50_disp *, struct nvif_mmu *, struct nv50_lut *);
nv50_disp          41 drivers/gpu/drm/nouveau/dispnv50/oimm.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp          33 drivers/gpu/drm/nouveau/dispnv50/oimm507b.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp          43 drivers/gpu/drm/nouveau/dispnv50/ovly.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp         176 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp          38 drivers/gpu/drm/nouveau/dispnv50/wimm.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp          67 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp         104 drivers/gpu/drm/nouveau/dispnv50/wndw.c 	struct nv50_disp *disp = nv50_disp(wndw->plane.dev);
nv50_disp         169 drivers/gpu/drm/nouveau/dispnv50/wndw.c 	struct nv50_disp *disp = nv50_disp(wndw->plane.dev);
nv50_disp         636 drivers/gpu/drm/nouveau/dispnv50/wndw.c 	struct nv50_disp *disp = nv50_disp(dev);
nv50_disp         712 drivers/gpu/drm/nouveau/dispnv50/wndw.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp         284 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c 	struct nv50_disp *disp = nv50_disp(drm->dev);
nv50_disp          70 drivers/gpu/drm/nouveau/nvkm/engine/disp/baseg84.c 		  struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp         104 drivers/gpu/drm/nouveau/nvkm/engine/disp/basegf119.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          28 drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp102.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          35 drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c 		    struct nv50_disp *disp, int chid,
nv50_disp         115 drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c 		   struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          29 drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c 	struct nv50_disp *disp = container_of(event, typeof(*disp), uevent);
nv50_disp          38 drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c 	struct nv50_disp *disp = container_of(event, typeof(*disp), uevent);
nv50_disp          38 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c nv50_disp_mthd_list(struct nv50_disp *disp, int debug, u32 base, int c,
nv50_disp          69 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp *disp = chan->disp;
nv50_disp         109 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp *disp = container_of(event, typeof(*disp), uevent);
nv50_disp         118 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp *disp = container_of(event, typeof(*disp), uevent);
nv50_disp         125 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c nv50_disp_chan_uevent_send(struct nv50_disp *disp, int chid)
nv50_disp         201 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp *disp = chan->disp;
nv50_disp         226 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp *disp;
nv50_disp         248 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp *disp = chan->disp;
nv50_disp         318 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	struct nv50_disp *disp = chan->disp;
nv50_disp         340 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 		    struct nv50_disp *disp, int ctrl, int user, int head,
nv50_disp          12 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 	struct nv50_disp *disp;
nv50_disp          36 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, int ctrl, int user, int head,
nv50_disp          40 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, int chid, int head, u64 push,
nv50_disp          66 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, int ctrl, int user,
nv50_disp          70 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, int ctrl, int user,
nv50_disp          75 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, int chid,
nv50_disp          80 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, int chid,
nv50_disp          85 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, int chid,
nv50_disp          90 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 		       struct nv50_disp *, struct nvkm_object **);
nv50_disp          92 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 		       struct nv50_disp *, struct nvkm_object **);
nv50_disp          94 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 		       struct nv50_disp *, struct nvkm_object **);
nv50_disp          96 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 		       struct nv50_disp *, struct nvkm_object **);
nv50_disp          98 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 		       struct nv50_disp *, struct nvkm_object **);
nv50_disp         101 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 		      struct nv50_disp *, struct nvkm_object **);
nv50_disp         103 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 		      struct nv50_disp *, struct nvkm_object **);
nv50_disp         105 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 		      struct nv50_disp *, struct nvkm_object **);
nv50_disp         108 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 		      struct nv50_disp *, struct nvkm_object **);
nv50_disp         111 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         114 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         116 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         118 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         120 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         122 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         125 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         127 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         130 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         132 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         134 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         136 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         138 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         141 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         143 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         145 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         147 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, struct nvkm_object **);
nv50_disp         107 drivers/gpu/drm/nouveau/nvkm/engine/disp/coreg84.c 		  struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          53 drivers/gpu/drm/nouveau/nvkm/engine/disp/coreg94.c 		  struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp         225 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregf119.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp         122 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregk104.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          66 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp102.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp         200 drivers/gpu/drm/nouveau/nvkm/engine/disp/coregv100.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          35 drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c 		    struct nv50_disp *disp, int chid,
nv50_disp         228 drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c 		   struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          28 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgf119.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          28 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgp102.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          77 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          34 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c 		    struct nv50_disp *disp, int ctrl, int user,
nv50_disp          60 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c 		   struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          36 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 		    struct nv50_disp *disp, int chid, int head, u64 push,
nv50_disp          36 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 	struct nv50_disp *disp =
nv50_disp          37 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 		container_of(work, struct nv50_disp, supervisor);
nv50_disp          90 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c gf119_disp_intr_error(struct nv50_disp *disp, int chid)
nv50_disp         122 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c gf119_disp_intr(struct nv50_disp *disp)
nv50_disp         178 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c gf119_disp_fini(struct nv50_disp *disp)
nv50_disp         186 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c gf119_disp_init(struct nv50_disp *disp)
nv50_disp          31 drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c gp102_disp_intr_error(struct nv50_disp *disp, int chid)
nv50_disp          42 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c 	struct nv50_disp *disp =
nv50_disp          43 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c 		container_of(work, struct nv50_disp, supervisor);
nv50_disp          97 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_exception(struct nv50_disp *disp, int chid)
nv50_disp         128 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_intr_ctrl_disp(struct nv50_disp *disp)
nv50_disp         170 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_intr_exc_other(struct nv50_disp *disp)
nv50_disp         199 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_intr_exc_winim(struct nv50_disp *disp)
nv50_disp         219 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_intr_exc_win(struct nv50_disp *disp)
nv50_disp         239 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_intr_head_timing(struct nv50_disp *disp, int head)
nv50_disp         264 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_intr(struct nv50_disp *disp)
nv50_disp         304 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_fini(struct nv50_disp *disp)
nv50_disp         311 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_init(struct nv50_disp *disp)
nv50_disp          42 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	return nv50_disp(base)->func->root;
nv50_disp          48 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nv50_disp *disp = nv50_disp(base);
nv50_disp          55 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nv50_disp *disp = nv50_disp(base);
nv50_disp          62 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nv50_disp *disp = nv50_disp(base);
nv50_disp          69 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nv50_disp *disp = nv50_disp(base);
nv50_disp          84 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nv50_disp *disp = nv50_disp(base);
nv50_disp         159 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nv50_disp *disp;
nv50_disp         306 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_super_3_0(struct nv50_disp *disp, struct nvkm_head *head)
nv50_disp         431 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_super_2_2(struct nv50_disp *disp, struct nvkm_head *head)
nv50_disp         478 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_super_2_1(struct nv50_disp *disp, struct nvkm_head *head)
nv50_disp         488 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_super_2_0(struct nv50_disp *disp, struct nvkm_head *head)
nv50_disp         512 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_super_1_0(struct nv50_disp *disp, struct nvkm_head *head)
nv50_disp         527 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_super_1(struct nv50_disp *disp)
nv50_disp         546 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nv50_disp *disp =
nv50_disp         547 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		container_of(work, struct nv50_disp, supervisor);
nv50_disp         614 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_intr_error(struct nv50_disp *disp, int chid)
nv50_disp         648 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_intr(struct nv50_disp *disp)
nv50_disp         684 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_fini(struct nv50_disp *disp)
nv50_disp         693 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_init(struct nv50_disp *disp)
nv50_disp         758 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp = {
nv50_disp         774 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	return nv50_disp_new_(&nv50_disp, device, index, pdisp);
nv50_disp           4 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h #define nv50_disp(p) container_of((p), struct nv50_disp, base)
nv50_disp          43 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_super_1(struct nv50_disp *);
nv50_disp          44 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_super_1_0(struct nv50_disp *, struct nvkm_head *);
nv50_disp          45 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_super_2_0(struct nv50_disp *, struct nvkm_head *);
nv50_disp          46 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_super_2_1(struct nv50_disp *, struct nvkm_head *);
nv50_disp          47 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_super_2_2(struct nv50_disp *, struct nvkm_head *);
nv50_disp          48 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_super_3_0(struct nv50_disp *, struct nvkm_head *);
nv50_disp          54 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h 	int (*init)(struct nv50_disp *);
nv50_disp          55 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h 	void (*fini)(struct nv50_disp *);
nv50_disp          56 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h 	void (*intr)(struct nv50_disp *);
nv50_disp          57 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h 	void (*intr_error)(struct nv50_disp *, int chid);
nv50_disp          72 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h int nv50_disp_init(struct nv50_disp *);
nv50_disp          73 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_fini(struct nv50_disp *);
nv50_disp          74 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_intr(struct nv50_disp *);
nv50_disp          78 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h int gf119_disp_init(struct nv50_disp *);
nv50_disp          79 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void gf119_disp_fini(struct nv50_disp *);
nv50_disp          80 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void gf119_disp_intr(struct nv50_disp *);
nv50_disp          82 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void gf119_disp_intr_error(struct nv50_disp *, int);
nv50_disp          84 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void gv100_disp_fini(struct nv50_disp *);
nv50_disp          85 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void gv100_disp_intr(struct nv50_disp *);
nv50_disp          89 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_dptmds_war_2(struct nv50_disp *, struct dcb_output *);
nv50_disp          90 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_dptmds_war_3(struct nv50_disp *, struct dcb_output *);
nv50_disp          91 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_update_sppll1(struct nv50_disp *);
nv50_disp          96 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h void nv50_disp_chan_uevent_send(struct nv50_disp *, int);
nv50_disp          28 drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmgf119.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          28 drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmgp102.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          34 drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c 		    struct nv50_disp *disp, int ctrl, int user,
nv50_disp          60 drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c 		   struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          67 drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlyg84.c 		  struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          91 drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygf119.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          93 drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygk104.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          28 drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygp102.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          70 drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygt200.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          35 drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c 		    struct nv50_disp *disp, int chid,
nv50_disp         103 drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c 		   struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp          32 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocgf119.c 	struct nv50_disp *disp = chan->disp;
nv50_disp          51 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocgf119.c 	struct nv50_disp *disp = chan->disp;
nv50_disp          32 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocnv50.c 	struct nv50_disp *disp = chan->disp;
nv50_disp          51 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocnv50.c 	struct nv50_disp *disp = chan->disp;
nv50_disp          44 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 	struct nv50_disp *disp = root->disp;
nv50_disp         281 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 	struct nv50_disp *disp = nv50_disp_root(oclass->parent)->disp;
nv50_disp         322 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 	struct nv50_disp *disp = nv50_disp(base);
nv50_disp          10 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h 	struct nv50_disp *disp;
nv50_disp          19 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h 			    struct nv50_disp *, struct nvkm_object **);
nv50_disp          32 drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c tu102_disp_init(struct nv50_disp *disp)
nv50_disp          49 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c 		     struct nv50_disp *disp, int chid,
nv50_disp          78 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)
nv50_disp         151 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c 		     struct nv50_disp *disp, int chid,
nv50_disp         180 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c 		    struct nv50_disp *disp, struct nvkm_object **pobject)