nv20_gr            20 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	struct nv20_gr *gr = chan->gr;
nv20_gr            33 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	struct nv20_gr *gr = chan->gr;
nv20_gr            78 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	struct nv20_gr *gr = nv20_gr(base);
nv20_gr           151 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	struct nv20_gr *gr = nv20_gr(base);
nv20_gr           182 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	struct nv20_gr *gr = nv20_gr(base);
nv20_gr           222 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	struct nv20_gr *gr = nv20_gr(base);
nv20_gr           231 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	struct nv20_gr *gr = nv20_gr(base);
nv20_gr           326 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	struct nv20_gr *gr = nv20_gr(base);
nv20_gr           335 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	struct nv20_gr *gr;
nv20_gr           345 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nv20_gr = {
nv20_gr           375 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	return nv20_gr_new_(&nv20_gr, device, index, pgr);
nv20_gr             4 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h #define nv20_gr(p) container_of((p), struct nv20_gr, base)
nv20_gr            27 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h 	struct nv20_gr *gr;
nv20_gr            24 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c 	struct nv20_gr *gr = nv20_gr(base);
nv20_gr            24 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c 	struct nv20_gr *gr = nv20_gr(base);
nv20_gr            25 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c 	struct nv20_gr *gr = nv20_gr(base);
nv20_gr           106 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c 	struct nv20_gr *gr = nv20_gr(base);
nv20_gr            24 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c 	struct nv20_gr *gr = nv20_gr(base);
nv20_gr            24 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c 	struct nv20_gr *gr = nv20_gr(base);